Workgroup Manager (SPI)

The Shader Processor Input (SPI) is the RDNA front-end unit that accepts dispatched work from the command processor and schedules wavefronts onto WGPs. In profiler terminology it fills the Workgroup Manager role: it bridges kernel launches to runnable waves and tracks SPI-side utilization.

The sections below list RDNA3.5 (gfx1151) metric descriptions for SPI.

Note

For Instinct-centric shader-engine coverage, see Shader engine (SE).

SPI utilization

RDNA 3.5 (gfx1151)

Metric	Description	Unit
SPI Busy	Percentage of GPU active cycles where the Shader Processor Input is busy dispatching wavefronts. High SPI busy indicates active workload dispatch. Low values may suggest insufficient parallelism or dispatch bottlenecks limiting GPU utilization.	Percent

Wave dispatch statistics

RDNA 3.5 (gfx1151)

Metric	Description	Unit
Compute Wave Dispatches	Total number of compute wavefronts dispatched by the Shader Processor Input. This represents the work scheduled for execution on the shader engines. Compare with completed waves to identify dispatch-related bottlenecks.	Count per Normalization Unit
Wave Dispatch Rate	Average wavefronts dispatched per GPU active cycle. Values greater than one indicate parallel dispatch across multiple shader engines. Low dispatch rates may indicate workload submission bottlenecks or insufficient parallelism in the application.	Waves/cycle