GL2

On gfx1151, GL2C (RDNA naming for what Instinct documentation refers to as L2/TCC) is the last-level on-chip cache for most clients.

Traffic leaving GL2 heads toward GCEA and DRAM through the DRAM read/write, SARB, and return interfaces in the panel YAMLs.

For Instinct L2 (TCC) coherence, channel hashing, and fabric metrics on CDNA architecture across MI-series GPUs, see L2 cache (TCC) under CDNA-CDNA4.

GL2C panels

GL2C cache performance

RDNA 3.5 (gfx1151)

Metric	Description	Unit
GL2C Hit Rate	Percentage of GL2C requests that hit in the cache. GL2C is the last-level cache before system memory.	Percent
GL2C Hits	Number of requests that hit in the GL2C cache.	Count per Normalization Unit
GL2C Misses	Number of requests that missed in the GL2C cache and went to memory.	Count per Normalization Unit

GL2C request statistics

RDNA 3.5 (gfx1151)

Metric	Description	Unit
Total Requests	Number of requests of all types to the GL2C cache (counter GL2C_REQ). This is measured at the tag block (request path into GL2C tag / lookup). Not guaranteed to equal Read + Write + Atomic; those use separate perf events and may omit or overlap traffic relative to this aggregate.	Count per Normalization Unit
Read Requests	Number of read requests to the GL2C cache (GL2C_READ).	Count per Normalization Unit
Write Requests	Number of write requests to the GL2C cache (GL2C_WRITE).	Count per Normalization Unit
Atomic Requests	Number of atomic requests at the GL2C cache (GL2C_ATOMIC).	Count per Normalization Unit
EA Read Requests (DRAM)	Number of GL2C/EA read requests destined for DRAM (memory controller). gl2c_perf_sel_ea_rdreq_dram (GL2C_EA_RDREQ_DRAM). Reported values are summed over GL2C instances.	Count per Normalization Unit
EA Write Requests (DRAM)	Number of GL2C/EA write requests destined for DRAM (memory controller). gl2c_perf_sel_ea_wrreq_dram (GL2C_EA_WRREQ_DRAM). Reported values are summed over GL2C instances.	Count per Normalization Unit

GL2C bandwidth

RDNA 3.5 (gfx1151)

Metric	Description	Unit
GL2C Read BW	Read bandwidth from GL2C_READ_{32,64,128}_REQ byte accounting plus GL2C_COMPRESSED_READ_96_REQ (96 B compressed reads). EA 96 B reads use GL2C_EA_RDREQ_96B.	Bytes/s
GL2C Write BW	Achieved write bandwidth at the GL2C level.	Bytes/s

GCEA and DRAM interfaces

DRAM read interface

RDNA 3.5 (gfx1151)

Metric	Description	Unit
DRAM Read Requests	Number of read requests sent to system memory (DRAM) per client group. RDNA3.5 uses DDR5/LPDDR5 system memory instead of HBM.	Count per Normalization Unit
DRAM Read Chained Requests	Number of chained (sequential) read request chains sent to DRAM. Chained requests improve memory efficiency for sequential access patterns.	Count per Normalization Unit
DRAM Read Banks Active	Number of DRAM banks with pending read requests (saturates at 16). More active banks indicate better memory parallelism.	Count per Normalization Unit
DRAM Read Size (32B increments)	Total size of DRAM read requests in 32-byte increments.	Count per Normalization Unit

DRAM write interface

RDNA 3.5 (gfx1151)

Metric	Description	Unit
DRAM Write Requests	Number of write requests sent to system memory (DRAM) per client group.	Count per Normalization Unit
DRAM Write Chained Requests	Number of chained (sequential) write request chains sent to DRAM.	Count per Normalization Unit
DRAM Write Banks Active	Number of DRAM banks with pending write requests (saturates at 16).	Count per Normalization Unit
DRAM Write Size (32B increments)	Total size of DRAM write requests in 32-byte increments.	Count per Normalization Unit

System Arbiter (SARB)

RDNA 3.5 (gfx1151)

Metric	Description	Unit
SARB Busy	Percentage of cycles the System Arbiter was actively processing requests. Per sample: 100 * GCEA_SARB_BUSY / GCEA_ALWAYS_COUNT (when GCEA_ALWAYS_COUNT != 0). GCEA_ALWAYS_COUNT is the cycle-count denominator for these percentages.	Percent
SARB Stalled	Percentage of cycles the System Arbiter was stalled (has valid request but downstream not ready). Per sample: 100 * GCEA_SARB_STALLED / GCEA_ALWAYS_COUNT (when GCEA_ALWAYS_COUNT != 0).	Percent
SARB Starving	Percentage of cycles the System Arbiter was starving (no valid requests but downstream ready). Per sample: 100 * GCEA_SARB_STARVING / GCEA_ALWAYS_COUNT (when GCEA_ALWAYS_COUNT != 0).	Percent
SARB Total Requests	Total requests per virtual channel through the System Arbiter.	Count per Normalization Unit
SARB DRAM Requests	DRAM-bound requests per virtual channel through the System Arbiter.	Count per Normalization Unit

Return interface

RDNA 3.5 (gfx1151)

Metric	Description	Unit
Read Returns	Number of read data returns from the external memory interface.	Count per Normalization Unit
Write Returns	Number of write acknowledgements from the external memory interface.	Count per Normalization Unit
Probe Requests	Number of probe-invalidate requests (cache coherency operations).	Count per Normalization Unit