rocm_smi.h

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/*
 * =============================================================================
 * The University of Illinois/NCSA
 * Open Source License (NCSA)
 *
 * Copyright (c) 2017-2023, Advanced Micro Devices, Inc.
 * All rights reserved.
 *
 * Developed by:
 *
 *                 AMD Research and AMD ROC Software Development
 *
 *                 Advanced Micro Devices, Inc.
 *
 *                 www.amd.com
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to
 * deal with the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 *  - Redistributions of source code must retain the above copyright notice,
 *    this list of conditions and the following disclaimers.
 *  - Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimers in
 *    the documentation and/or other materials provided with the distribution.
 *  - Neither the names of <Name of Development Group, Name of Institution>,
 *    nor the names of its contributors may be used to endorse or promote
 *    products derived from this Software without specific prior written
 *    permission.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS WITH THE SOFTWARE.
 *
 */
#ifndef ROCM_SMI_ROCM_SMI_H_
#define ROCM_SMI_ROCM_SMI_H_
 
#ifdef __cplusplus
extern "C" {
#include <cstdint>
#else
#include <stdint.h>
#endif  // __cplusplus
 
#include <stddef.h>
#include <stdbool.h>
 
#include "rocm_smi/kfd_ioctl.h"
 
#define RSMI_MAX_NUM_FREQUENCIES 33
 
#define RSMI_MAX_FAN_SPEED 255
 
#define RSMI_NUM_VOLTAGE_CURVE_POINTS 3
 
 
typedef enum {
  RSMI_STATUS_SUCCESS = 0x0,             
  RSMI_STATUS_INVALID_ARGS,              
  RSMI_STATUS_NOT_SUPPORTED,             
  RSMI_STATUS_FILE_ERROR,                
  RSMI_STATUS_PERMISSION,                
  RSMI_STATUS_OUT_OF_RESOURCES,          
  RSMI_STATUS_INTERNAL_EXCEPTION,        
  RSMI_STATUS_INPUT_OUT_OF_BOUNDS,       
  RSMI_STATUS_INIT_ERROR,                
  RSMI_INITIALIZATION_ERROR = RSMI_STATUS_INIT_ERROR,
  RSMI_STATUS_NOT_YET_IMPLEMENTED,       
  RSMI_STATUS_NOT_FOUND,                 
  RSMI_STATUS_INSUFFICIENT_SIZE,         
  RSMI_STATUS_INTERRUPT,                 
  RSMI_STATUS_UNEXPECTED_SIZE,           
  RSMI_STATUS_NO_DATA,                   
  RSMI_STATUS_UNEXPECTED_DATA,           
  RSMI_STATUS_BUSY,                      
  RSMI_STATUS_REFCOUNT_OVERFLOW,         
  RSMI_STATUS_SETTING_UNAVAILABLE,       
  RSMI_STATUS_AMDGPU_RESTART_ERR,        
 
  RSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF,  
} rsmi_status_t;
 
typedef enum {
  RSMI_INIT_FLAG_ALL_GPUS   = 0x1,       
  RSMI_INIT_FLAG_THRAD_ONLY_MUTEX = 0x400000000000000,   
  RSMI_INIT_FLAG_RESRV_TEST1 = 0x800000000000000,  
} rsmi_init_flags_t;
 
typedef enum {
  RSMI_DEV_PERF_LEVEL_AUTO = 0,       
  RSMI_DEV_PERF_LEVEL_FIRST = RSMI_DEV_PERF_LEVEL_AUTO,
 
  RSMI_DEV_PERF_LEVEL_LOW,              
  RSMI_DEV_PERF_LEVEL_HIGH,             
  RSMI_DEV_PERF_LEVEL_MANUAL,           
  RSMI_DEV_PERF_LEVEL_STABLE_STD,       
  RSMI_DEV_PERF_LEVEL_STABLE_PEAK,      
  RSMI_DEV_PERF_LEVEL_STABLE_MIN_MCLK,  
  RSMI_DEV_PERF_LEVEL_STABLE_MIN_SCLK,  
  RSMI_DEV_PERF_LEVEL_DETERMINISM,      
 
  RSMI_DEV_PERF_LEVEL_LAST = RSMI_DEV_PERF_LEVEL_DETERMINISM,
 
  RSMI_DEV_PERF_LEVEL_UNKNOWN = 0x100   
} rsmi_dev_perf_level_t;
typedef rsmi_dev_perf_level_t rsmi_dev_perf_level;
 
typedef enum {
  RSMI_SW_COMP_FIRST = 0x0,
 
  RSMI_SW_COMP_DRIVER = RSMI_SW_COMP_FIRST,    
 
  RSMI_SW_COMP_LAST = RSMI_SW_COMP_DRIVER
} rsmi_sw_component_t;
 
typedef uintptr_t rsmi_event_handle_t;
 
typedef enum {
  RSMI_EVNT_GRP_XGMI = 0,         
  RSMI_EVNT_GRP_XGMI_DATA_OUT = 10,  
  RSMI_EVNT_GRP_INVALID = 0xFFFFFFFF
} rsmi_event_group_t;
 
typedef enum {
  RSMI_EVNT_FIRST = RSMI_EVNT_GRP_XGMI,
 
  RSMI_EVNT_XGMI_FIRST = RSMI_EVNT_GRP_XGMI,
  RSMI_EVNT_XGMI_0_NOP_TX = RSMI_EVNT_XGMI_FIRST,  
  RSMI_EVNT_XGMI_0_REQUEST_TX,                    
  RSMI_EVNT_XGMI_0_RESPONSE_TX,                   
 
  // ie, Throughput = BEATS/time_running 10^9  bytes/sec
  RSMI_EVNT_XGMI_0_BEATS_TX,
  RSMI_EVNT_XGMI_1_NOP_TX,                        
  RSMI_EVNT_XGMI_1_REQUEST_TX,                        
  RSMI_EVNT_XGMI_1_RESPONSE_TX,                   
  RSMI_EVNT_XGMI_1_BEATS_TX,                      
 
  RSMI_EVNT_XGMI_LAST = RSMI_EVNT_XGMI_1_BEATS_TX,   // 5
 
  RSMI_EVNT_XGMI_DATA_OUT_FIRST = RSMI_EVNT_GRP_XGMI_DATA_OUT,  // 10
 
  /*
   * @brief Events in the RSMI_EVNT_GRP_XGMI_DATA_OUT group measure
   * the number of beats sent on an XGMI link. Each beat represents
   * 32 bytes. RSMI_EVNT_XGMI_DATA_OUT_n represents the number of
   * outbound beats (each representing 32 bytes) on link n.<br><br>
   *
   * XGMI throughput can be calculated by multiplying a event
   * such as ::RSMI_EVNT_XGMI_DATA_OUT_n by 32 and dividing by
   * the time for which event collection occurred,
   * ::rsmi_counter_value_t.time_running (which is in nanoseconds). To get
   * bytes per second, multiply this value by 10<sup>9</sup>.<br>
   * <br>
   * Throughput = BEATS/time_running * 10<sup>9</sup>  (bytes/second)<br>
   */
  // ie, Throughput = BEATS/time_running 10^9  bytes/sec
  RSMI_EVNT_XGMI_DATA_OUT_0 = RSMI_EVNT_XGMI_DATA_OUT_FIRST,
  RSMI_EVNT_XGMI_DATA_OUT_1,   
  RSMI_EVNT_XGMI_DATA_OUT_2,   
  RSMI_EVNT_XGMI_DATA_OUT_3,   
  RSMI_EVNT_XGMI_DATA_OUT_4,   
  RSMI_EVNT_XGMI_DATA_OUT_5,   
  RSMI_EVNT_XGMI_DATA_OUT_LAST = RSMI_EVNT_XGMI_DATA_OUT_5,
 
  RSMI_EVNT_LAST = RSMI_EVNT_XGMI_DATA_OUT_LAST,
} rsmi_event_type_t;
 
typedef enum {
  RSMI_CNTR_CMD_START = 0,  
  RSMI_CNTR_CMD_STOP,       
} rsmi_counter_command_t;
 
typedef struct {
  uint64_t value;            
  uint64_t time_enabled;     
  uint64_t time_running;     
} rsmi_counter_value_t;
 
typedef enum {
  RSMI_EVT_NOTIF_NONE = KFD_SMI_EVENT_NONE,        
  RSMI_EVT_NOTIF_VMFAULT = KFD_SMI_EVENT_VMFAULT,  
  RSMI_EVT_NOTIF_FIRST = RSMI_EVT_NOTIF_VMFAULT,
  RSMI_EVT_NOTIF_THERMAL_THROTTLE = KFD_SMI_EVENT_THERMAL_THROTTLE,
  RSMI_EVT_NOTIF_GPU_PRE_RESET = KFD_SMI_EVENT_GPU_PRE_RESET,
  RSMI_EVT_NOTIF_GPU_POST_RESET = KFD_SMI_EVENT_GPU_POST_RESET,
  RSMI_EVT_NOTIF_RING_HANG = KFD_SMI_EVENT_RING_HANG,
 
  RSMI_EVT_NOTIF_LAST = RSMI_EVT_NOTIF_RING_HANG
} rsmi_evt_notification_type_t;
 
#define RSMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))
 
#define MAX_EVENT_NOTIFICATION_MSG_SIZE 64
 
typedef struct {
    uint32_t dv_ind;        
    rsmi_evt_notification_type_t event;     
    char message[MAX_EVENT_NOTIFICATION_MSG_SIZE];  
} rsmi_evt_notification_data_t;
 
typedef enum {
  RSMI_CLK_TYPE_SYS = 0x0,            
  RSMI_CLK_TYPE_FIRST = RSMI_CLK_TYPE_SYS,
  RSMI_CLK_TYPE_DF,                   
  RSMI_CLK_TYPE_DCEF,                 
  RSMI_CLK_TYPE_SOC,                  
  RSMI_CLK_TYPE_MEM,                  
  RSMI_CLK_TYPE_PCIE,                 
 
  // Add new clocks to the end (not in the middle) and update
  // RSMI_CLK_TYPE_LAST
  RSMI_CLK_TYPE_LAST = RSMI_CLK_TYPE_MEM,
  RSMI_CLK_INVALID = 0xFFFFFFFF
} rsmi_clk_type_t;
typedef rsmi_clk_type_t rsmi_clk_type;
 
typedef enum {
  RSMI_COMPUTE_PARTITION_INVALID = 0,
  RSMI_COMPUTE_PARTITION_SPX, 
  RSMI_COMPUTE_PARTITION_DPX, 
  RSMI_COMPUTE_PARTITION_TPX, 
  RSMI_COMPUTE_PARTITION_QPX, 
  RSMI_COMPUTE_PARTITION_CPX  
} rsmi_compute_partition_type_t;
typedef rsmi_compute_partition_type_t rsmi_compute_partition_type;
 
typedef enum {
  RSMI_MEMORY_PARTITION_UNKNOWN = 0,
  RSMI_MEMORY_PARTITION_NPS1,  
  RSMI_MEMORY_PARTITION_NPS2,  
  RSMI_MEMORY_PARTITION_NPS4,  
  RSMI_MEMORY_PARTITION_NPS8,  
} rsmi_memory_partition_type_t;
typedef rsmi_memory_partition_type_t rsmi_memory_partition_type;
 
typedef enum {
  RSMI_TEMP_CURRENT = 0x0,   
  RSMI_TEMP_FIRST = RSMI_TEMP_CURRENT,
 
  RSMI_TEMP_MAX,             
  RSMI_TEMP_MIN,             
  RSMI_TEMP_MAX_HYST,        
  RSMI_TEMP_MIN_HYST,        
  RSMI_TEMP_CRITICAL,        
  RSMI_TEMP_CRITICAL_HYST,   
  RSMI_TEMP_EMERGENCY,       
  RSMI_TEMP_EMERGENCY_HYST,  
  RSMI_TEMP_CRIT_MIN,        
  RSMI_TEMP_CRIT_MIN_HYST,   
  RSMI_TEMP_OFFSET,          
  RSMI_TEMP_LOWEST,          
  RSMI_TEMP_HIGHEST,         
 
  RSMI_TEMP_LAST = RSMI_TEMP_HIGHEST
} rsmi_temperature_metric_t;
typedef rsmi_temperature_metric_t rsmi_temperature_metric;
 
typedef enum {
  RSMI_TEMP_TYPE_FIRST = 0,
 
  RSMI_TEMP_TYPE_EDGE = RSMI_TEMP_TYPE_FIRST,  
  RSMI_TEMP_TYPE_JUNCTION,                     
  RSMI_TEMP_TYPE_MEMORY,                       
  RSMI_TEMP_TYPE_HBM_0,                        
  RSMI_TEMP_TYPE_HBM_1,                        
  RSMI_TEMP_TYPE_HBM_2,                        
  RSMI_TEMP_TYPE_HBM_3,                        
  RSMI_TEMP_TYPE_LAST = RSMI_TEMP_TYPE_HBM_3,
  RSMI_TEMP_TYPE_INVALID = 0xFFFFFFFF          
} rsmi_temperature_type_t;
 
typedef enum {
  /* Utilization */
  RSMI_ACTIVITY_GFX = (0x1 << 0),
  RSMI_ACTIVITY_UMC = (0x1 << 1),   
  RSMI_ACTIVITY_MM  = (0x1 << 2)    
} rsmi_activity_metric_t;
 
 
typedef enum {
  RSMI_VOLT_CURRENT = 0x0,               
 
  RSMI_VOLT_FIRST = RSMI_VOLT_CURRENT,
  RSMI_VOLT_MAX,                         
  RSMI_VOLT_MIN_CRIT,                    
  RSMI_VOLT_MIN,                         
  RSMI_VOLT_MAX_CRIT,                    
  RSMI_VOLT_AVERAGE,                     
  RSMI_VOLT_LOWEST,                      
  RSMI_VOLT_HIGHEST,                     
 
  RSMI_VOLT_LAST = RSMI_VOLT_HIGHEST
} rsmi_voltage_metric_t;
 
typedef enum {
  RSMI_VOLT_TYPE_FIRST = 0,
 
  RSMI_VOLT_TYPE_VDDGFX = RSMI_VOLT_TYPE_FIRST,  
  RSMI_VOLT_TYPE_LAST = RSMI_VOLT_TYPE_VDDGFX,
  RSMI_VOLT_TYPE_INVALID = 0xFFFFFFFF            
} rsmi_voltage_type_t;
 
typedef enum {
  RSMI_PWR_PROF_PRST_CUSTOM_MASK = 0x1,        
  RSMI_PWR_PROF_PRST_VIDEO_MASK = 0x2,         
  RSMI_PWR_PROF_PRST_POWER_SAVING_MASK = 0x4,  
  RSMI_PWR_PROF_PRST_COMPUTE_MASK = 0x8,       
  RSMI_PWR_PROF_PRST_VR_MASK = 0x10,           
 
  RSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK = 0x20,
  RSMI_PWR_PROF_PRST_BOOTUP_DEFAULT = 0x40,    
  RSMI_PWR_PROF_PRST_LAST = RSMI_PWR_PROF_PRST_BOOTUP_DEFAULT,
 
  RSMI_PWR_PROF_PRST_INVALID = 0xFFFFFFFFFFFFFFFF
} rsmi_power_profile_preset_masks_t;
typedef rsmi_power_profile_preset_masks_t rsmi_power_profile_preset_masks;
 
typedef enum {
  RSMI_GPU_BLOCK_INVALID =   0x0000000000000000,  
  RSMI_GPU_BLOCK_FIRST =     0x0000000000000001,
 
  RSMI_GPU_BLOCK_UMC = RSMI_GPU_BLOCK_FIRST,      
  RSMI_GPU_BLOCK_SDMA =      0x0000000000000002,  
  RSMI_GPU_BLOCK_GFX =       0x0000000000000004,  
  RSMI_GPU_BLOCK_MMHUB =     0x0000000000000008,  
  RSMI_GPU_BLOCK_ATHUB =     0x0000000000000010,  
  RSMI_GPU_BLOCK_PCIE_BIF =  0x0000000000000020,  
  RSMI_GPU_BLOCK_HDP =       0x0000000000000040,  
  RSMI_GPU_BLOCK_XGMI_WAFL = 0x0000000000000080,  
  RSMI_GPU_BLOCK_DF =        0x0000000000000100,  
  RSMI_GPU_BLOCK_SMN =       0x0000000000000200,  
  RSMI_GPU_BLOCK_SEM =       0x0000000000000400,  
  RSMI_GPU_BLOCK_MP0 =       0x0000000000000800,  
  RSMI_GPU_BLOCK_MP1 =       0x0000000000001000,  
  RSMI_GPU_BLOCK_FUSE =      0x0000000000002000,  
 
  RSMI_GPU_BLOCK_LAST = RSMI_GPU_BLOCK_FUSE,       
  RSMI_GPU_BLOCK_RESERVED =  0x8000000000000000
} rsmi_gpu_block_t;
typedef rsmi_gpu_block_t rsmi_gpu_block;
 
typedef enum {
  RSMI_RAS_ERR_STATE_NONE = 0,   
  RSMI_RAS_ERR_STATE_DISABLED,   
  RSMI_RAS_ERR_STATE_PARITY,     
  RSMI_RAS_ERR_STATE_SING_C,     
  RSMI_RAS_ERR_STATE_MULT_UC,    
  RSMI_RAS_ERR_STATE_POISON,     
  RSMI_RAS_ERR_STATE_ENABLED,    
 
  RSMI_RAS_ERR_STATE_LAST = RSMI_RAS_ERR_STATE_ENABLED,
  RSMI_RAS_ERR_STATE_INVALID = 0xFFFFFFFF
} rsmi_ras_err_state_t;
 
typedef enum {
  RSMI_MEM_TYPE_FIRST = 0,
 
  RSMI_MEM_TYPE_VRAM = RSMI_MEM_TYPE_FIRST,  
  RSMI_MEM_TYPE_VIS_VRAM,                    
  RSMI_MEM_TYPE_GTT,                         
 
  RSMI_MEM_TYPE_LAST = RSMI_MEM_TYPE_GTT
} rsmi_memory_type_t;
 
typedef enum {
  RSMI_FREQ_IND_MIN = 0,  
  RSMI_FREQ_IND_MAX = 1,  
  RSMI_FREQ_IND_INVALID = 0xFFFFFFFF  
} rsmi_freq_ind_t;
typedef rsmi_freq_ind_t rsmi_freq_ind;
 
 
typedef enum {
  RSMI_FW_BLOCK_FIRST = 0,
 
  RSMI_FW_BLOCK_ASD = RSMI_FW_BLOCK_FIRST,
  RSMI_FW_BLOCK_CE,
  RSMI_FW_BLOCK_DMCU,
  RSMI_FW_BLOCK_MC,
  RSMI_FW_BLOCK_ME,
  RSMI_FW_BLOCK_MEC,
  RSMI_FW_BLOCK_MEC2,
  RSMI_FW_BLOCK_MES,
  RSMI_FW_BLOCK_MES_KIQ,
  RSMI_FW_BLOCK_PFP,
  RSMI_FW_BLOCK_RLC,
  RSMI_FW_BLOCK_RLC_SRLC,
  RSMI_FW_BLOCK_RLC_SRLG,
  RSMI_FW_BLOCK_RLC_SRLS,
  RSMI_FW_BLOCK_SDMA,
  RSMI_FW_BLOCK_SDMA2,
  RSMI_FW_BLOCK_SMC,
  RSMI_FW_BLOCK_SOS,
  RSMI_FW_BLOCK_TA_RAS,
  RSMI_FW_BLOCK_TA_XGMI,
  RSMI_FW_BLOCK_UVD,
  RSMI_FW_BLOCK_VCE,
  RSMI_FW_BLOCK_VCN,
 
  RSMI_FW_BLOCK_LAST = RSMI_FW_BLOCK_VCN
} rsmi_fw_block_t;
 
typedef enum {
  RSMI_XGMI_STATUS_NO_ERRORS = 0,
  RSMI_XGMI_STATUS_ERROR,
  RSMI_XGMI_STATUS_MULTIPLE_ERRORS,
} rsmi_xgmi_status_t;
 
typedef uint64_t rsmi_bit_field_t;
typedef rsmi_bit_field_t rsmi_bit_field;
 
typedef enum {
  RSMI_MEM_PAGE_STATUS_RESERVED = 0,  
  RSMI_MEM_PAGE_STATUS_PENDING,       
  RSMI_MEM_PAGE_STATUS_UNRESERVABLE   
} rsmi_memory_page_status_t;
 
typedef enum _RSMI_IO_LINK_TYPE {
  RSMI_IOLINK_TYPE_UNDEFINED      = 0,          
  RSMI_IOLINK_TYPE_PCIEXPRESS,                  
  RSMI_IOLINK_TYPE_XGMI,                        
  RSMI_IOLINK_TYPE_NUMIOLINKTYPES,              
  RSMI_IOLINK_TYPE_SIZE           = 0xFFFFFFFF  
} RSMI_IO_LINK_TYPE;
 
#define CPU_NODE_INDEX 0xFFFFFFFF
 
typedef enum {
  RSMI_UTILIZATION_COUNTER_FIRST = 0,
  RSMI_COARSE_GRAIN_GFX_ACTIVITY  = RSMI_UTILIZATION_COUNTER_FIRST,
  RSMI_COARSE_GRAIN_MEM_ACTIVITY,    
  RSMI_UTILIZATION_COUNTER_LAST = RSMI_COARSE_GRAIN_MEM_ACTIVITY
} RSMI_UTILIZATION_COUNTER_TYPE;
 
typedef enum {
  RSMI_AVERAGE_POWER = 0,            
  RSMI_CURRENT_POWER,                
  RSMI_INVALID_POWER = 0xFFFFFFFF    
} RSMI_POWER_TYPE;
 
typedef struct  {
  RSMI_UTILIZATION_COUNTER_TYPE type;   
  uint64_t value;                       
} rsmi_utilization_counter_t;
 
typedef struct {
  uint64_t page_address;                  
  uint64_t page_size;                     
  rsmi_memory_page_status_t status;       
} rsmi_retired_page_record_t;
 
#define RSMI_MAX_NUM_POWER_PROFILES (sizeof(rsmi_bit_field_t) * 8)
 
typedef struct {
    rsmi_bit_field_t available_profiles;
 
    rsmi_power_profile_preset_masks_t current;
 
    uint32_t num_profiles;
} rsmi_power_profile_status_t;
typedef rsmi_power_profile_status_t rsmi_power_profile_status;
 
typedef struct {
    bool has_deep_sleep;
 
    uint32_t num_supported;
 
    uint32_t current;
 
    uint64_t frequency[RSMI_MAX_NUM_FREQUENCIES];
} rsmi_frequencies_t;
typedef rsmi_frequencies_t rsmi_frequencies;
 
typedef struct {
    rsmi_frequencies_t transfer_rate;
 
    uint32_t lanes[RSMI_MAX_NUM_FREQUENCIES];
} rsmi_pcie_bandwidth_t;
 
typedef rsmi_pcie_bandwidth_t rsmi_pcie_bandwidth;
 
typedef struct {
  /* Utilization */
  uint16_t average_gfx_activity;  
  uint16_t average_umc_activity;  
  uint16_t average_mm_activity;   
} rsmi_activity_metric_counter_t;
 
typedef struct {
    uint32_t major;     
    uint32_t minor;     
    uint32_t patch;     
    const char *build;  
} rsmi_version_t;
typedef rsmi_version_t rsmi_version;
 
typedef struct {
    uint64_t lower_bound;      
    uint64_t upper_bound;      
} rsmi_range_t;
typedef rsmi_range_t rsmi_range;
 
typedef struct {
    uint64_t frequency;      
    uint64_t voltage;        
} rsmi_od_vddc_point_t;
typedef rsmi_od_vddc_point_t rsmi_od_vddc_point;
 
typedef struct {
    rsmi_range_t freq_range;  
    rsmi_range_t volt_range;  
} rsmi_freq_volt_region_t;
typedef rsmi_freq_volt_region_t rsmi_freq_volt_region;
 
typedef struct {
    rsmi_od_vddc_point_t vc_points[RSMI_NUM_VOLTAGE_CURVE_POINTS];
} rsmi_od_volt_curve_t;
typedef rsmi_od_volt_curve_t rsmi_od_volt_curve;
 
typedef struct {
  rsmi_range_t curr_sclk_range;          
  rsmi_range_t curr_mclk_range;          
  rsmi_range_t sclk_freq_limits;         
  rsmi_range_t mclk_freq_limits;         
 
  rsmi_od_volt_curve_t curve;
  uint32_t num_regions;                
} rsmi_od_volt_freq_data_t;
typedef rsmi_od_volt_freq_data_t rsmi_od_volt_freq_data;
 
 
struct metrics_table_header_t {
  // TODO(amd) Doxygen documents
  // Note: This should match: AMDGpuMetricsHeader_v1_t
  uint16_t      structure_size;
  uint8_t       format_revision;
  uint8_t       content_revision;
};
typedef struct metrics_table_header_t metrics_table_header_t;
 
#define CENTRIGRADE_TO_MILLI_CENTIGRADE 1000
 
#define RSMI_NUM_HBM_INSTANCES 4
 
#define RSMI_MAX_NUM_VCNS 4
 
#define RSMI_MAX_NUM_JPEG_ENGS 32
 
#define RSMI_MAX_NUM_CLKS 4
 
#define RSMI_MAX_NUM_XGMI_LINKS 8
 
#define RSMI_MAX_NUM_GFX_CLKS 8
 
 
typedef struct {
  // TODO(amd) Doxygen documents
  // Note:  This structure is extended to fit the needs of different GPU metric
  //        versions when exposing data through the structure.
  //        Depending on the version, some data members will hold data, and
  //        some will not. A good example is the set of 'current clocks':
  //          - current_gfxclk, current_socclk, current_vclk0, current_dclk0
  //        These are single-valued data members, up to version 1.3.
  //        For version 1.4 and up these are multi-valued data members (arrays)
  //        and their counterparts;
  //          - current_gfxclks[], current_socclks[], current_vclk0s[],
  //            current_dclk0s[]
  //        will hold the data
 
  /*
   * v1.0 Base
   */
  struct metrics_table_header_t common_header;
 
  // Temperature
  uint16_t temperature_edge;
  uint16_t temperature_hotspot;
  uint16_t temperature_mem;
  uint16_t temperature_vrgfx;
  uint16_t temperature_vrsoc;
  uint16_t temperature_vrmem;
 
  // Utilization
  uint16_t average_gfx_activity;
  uint16_t average_umc_activity;    // memory controller
  uint16_t average_mm_activity;     // UVD or VCN
 
  // Power/Energy
  uint16_t average_socket_power;
  uint64_t energy_accumulator;      // v1 mod. (32->64)
 
  // Driver attached timestamp (in ns)
  uint64_t system_clock_counter;    // v1 mod. (moved from top of struct)
 
  // Average clocks
  uint16_t average_gfxclk_frequency;
  uint16_t average_socclk_frequency;
  uint16_t average_uclk_frequency;
  uint16_t average_vclk0_frequency;
  uint16_t average_dclk0_frequency;
  uint16_t average_vclk1_frequency;
  uint16_t average_dclk1_frequency;
 
  // Current clocks
  uint16_t current_gfxclk;
  uint16_t current_socclk;
  uint16_t current_uclk;
  uint16_t current_vclk0;
  uint16_t current_dclk0;
  uint16_t current_vclk1;
  uint16_t current_dclk1;
 
  // Throttle status
  uint32_t throttle_status;
 
  // Fans
  uint16_t current_fan_speed;
 
  // Link width/speed
  uint16_t pcie_link_width;         // v1 mod.(8->16)
  uint16_t pcie_link_speed;         // in 0.1 GT/s; v1 mod. (8->16)
 
 
  /*
   * v1.1 additions
   */
  uint32_t gfx_activity_acc;        // new in v1
  uint32_t mem_activity_acc;        // new in v1
  uint16_t temperature_hbm[RSMI_NUM_HBM_INSTANCES];  // new in v1
 
 
  /*
   * v1.2 additions
   */
    // PMFW attached timestamp (10ns resolution)
  uint64_t firmware_timestamp;
 
 
  /*
   * v1.3 additions
   */
  // Voltage (mV)
  uint16_t voltage_soc;
  uint16_t voltage_gfx;
  uint16_t voltage_mem;
 
  // Throttle status
  uint64_t indep_throttle_status;
 
 
  /*
   * v1.4 additions
   */
  // Power (Watts)
  uint16_t current_socket_power;
 
  // Utilization (%)
  uint16_t vcn_activity[RSMI_MAX_NUM_VCNS]; // VCN instances activity percent (encode/decode)
 
  // Clock Lock Status. Each bit corresponds to clock instance
  uint32_t gfxclk_lock_status;
 
    // XGMI bus width and bitrate (in Gbps)
  uint16_t xgmi_link_width;
  uint16_t xgmi_link_speed;
 
  // PCIE accumulated bandwidth (GB/sec)
  uint64_t pcie_bandwidth_acc;
 
    // PCIE instantaneous bandwidth (GB/sec)
  uint64_t pcie_bandwidth_inst;
 
  // PCIE L0 to recovery state transition accumulated count
  uint64_t pcie_l0_to_recov_count_acc;
 
  // PCIE replay accumulated count
  uint64_t pcie_replay_count_acc;
 
  // PCIE replay rollover accumulated count
  uint64_t pcie_replay_rover_count_acc;
 
  // XGMI accumulated data transfer size(KiloBytes)
  uint64_t xgmi_read_data_acc[RSMI_MAX_NUM_XGMI_LINKS];
  uint64_t xgmi_write_data_acc[RSMI_MAX_NUM_XGMI_LINKS];
 
  // XGMI accumulated data transfer size(KiloBytes)
  uint16_t current_gfxclks[RSMI_MAX_NUM_GFX_CLKS];
  uint16_t current_socclks[RSMI_MAX_NUM_CLKS];
  uint16_t current_vclk0s[RSMI_MAX_NUM_CLKS];
  uint16_t current_dclk0s[RSMI_MAX_NUM_CLKS];
 
  /*
   * v1.5 additions
   */
  // JPEG activity percent (encode/decode)
  uint16_t jpeg_activity[RSMI_MAX_NUM_JPEG_ENGS];
 
  // PCIE NAK sent accumulated count
  uint32_t pcie_nak_sent_count_acc;
 
  // PCIE NAK received accumulated count
  uint32_t pcie_nak_rcvd_count_acc;
 
 
} rsmi_gpu_metrics_t;
 
typedef struct {
    uint64_t correctable_err;            
    uint64_t uncorrectable_err;          
} rsmi_error_count_t;
 
typedef struct {
    uint32_t process_id;      
    uint32_t pasid;           
    uint64_t vram_usage;      
    uint64_t sdma_usage;      
    uint32_t cu_occupancy;    
} rsmi_process_info_t;
 
#define CU_OCCUPANCY_INVALID 0xFFFFFFFF
 
typedef struct rsmi_func_id_iter_handle * rsmi_func_id_iter_handle_t;
 
#define RSMI_DEFAULT_VARIANT 0xFFFFFFFFFFFFFFFF
 
typedef union id {
        uint64_t id;           
        const char *name;      
        union {
            rsmi_memory_type_t memory_type;
            rsmi_temperature_metric_t temp_metric;
            rsmi_event_type_t evnt_type;
            rsmi_event_group_t evnt_group;
            rsmi_clk_type_t clk_type;
            rsmi_fw_block_t fw_block;
            rsmi_gpu_block_t gpu_block_type;
        };
} rsmi_func_id_value_t;
 
 
/*****************************************************************************/
rsmi_status_t rsmi_init(uint64_t init_flags);
 
rsmi_status_t rsmi_shut_down(void);
  // end of InitShut
 
/*****************************************************************************/
rsmi_status_t rsmi_num_monitor_devices(uint32_t *num_devices);
 
rsmi_status_t rsmi_dev_id_get(uint32_t dv_ind, uint16_t *id);
 
rsmi_status_t rsmi_dev_revision_get(uint32_t dv_ind, uint16_t *revision);
 
rsmi_status_t rsmi_dev_sku_get(uint32_t dv_ind, uint16_t *sku);
 
rsmi_status_t rsmi_dev_vendor_id_get(uint32_t dv_ind, uint16_t *id);
 
rsmi_status_t rsmi_dev_name_get(uint32_t dv_ind, char *name, size_t len);
 
rsmi_status_t rsmi_dev_brand_get(uint32_t dv_ind, char *brand, uint32_t len);
 
rsmi_status_t rsmi_dev_vendor_name_get(uint32_t dv_ind, char *name,
                                                                  size_t len);
 
rsmi_status_t rsmi_dev_vram_vendor_get(uint32_t dv_ind, char *brand,
                                                                uint32_t len);
 
rsmi_status_t rsmi_dev_serial_number_get(uint32_t dv_ind,
                                              char *serial_num, uint32_t len);
rsmi_status_t rsmi_dev_subsystem_id_get(uint32_t dv_ind, uint16_t *id);
 
rsmi_status_t
rsmi_dev_subsystem_name_get(uint32_t dv_ind, char *name, size_t len);
 
rsmi_status_t
rsmi_dev_drm_render_minor_get(uint32_t dv_ind, uint32_t *minor);
 
rsmi_status_t rsmi_dev_subsystem_vendor_id_get(uint32_t dv_ind, uint16_t *id);
 
rsmi_status_t rsmi_dev_unique_id_get(uint32_t dv_ind, uint64_t *id);
 
rsmi_status_t rsmi_dev_xgmi_physical_id_get(uint32_t dv_ind, uint16_t *id);
 
rsmi_status_t rsmi_dev_guid_get(uint32_t dv_ind, uint64_t *guid);
 
rsmi_status_t rsmi_dev_node_id_get(uint32_t dv_ind, uint32_t *node_id);
 
  // end of IDQuer
 
/*****************************************************************************/
rsmi_status_t
rsmi_dev_pci_bandwidth_get(uint32_t dv_ind, rsmi_pcie_bandwidth_t *bandwidth);
 
rsmi_status_t rsmi_dev_pci_id_get(uint32_t dv_ind, uint64_t *bdfid);
 
rsmi_status_t rsmi_topo_numa_affinity_get(uint32_t dv_ind, int32_t *numa_node);
 
rsmi_status_t rsmi_dev_pci_throughput_get(uint32_t dv_ind, uint64_t *sent,
                                    uint64_t *received, uint64_t *max_pkt_sz);
 
rsmi_status_t rsmi_dev_pci_replay_counter_get(uint32_t dv_ind,
                                                           uint64_t *counter);
  // end of PCIeQuer
/*****************************************************************************/
rsmi_status_t rsmi_dev_pci_bandwidth_set(uint32_t dv_ind, uint64_t bw_bitmask);
  // end of PCIeCont
 
/*****************************************************************************/
rsmi_status_t
rsmi_dev_power_ave_get(uint32_t dv_ind, uint32_t sensor_ind, uint64_t *power);
 
rsmi_status_t
rsmi_dev_current_socket_power_get(uint32_t dv_ind, uint64_t *socket_power);
 
rsmi_status_t rsmi_dev_power_get(uint32_t dv_ind, uint64_t *power,
                                 RSMI_POWER_TYPE *type);
 
rsmi_status_t
rsmi_dev_energy_count_get(uint32_t dv_ind, uint64_t *power,
                          float *counter_resolution, uint64_t *timestamp);
 
rsmi_status_t
rsmi_dev_power_cap_get(uint32_t dv_ind, uint32_t sensor_ind, uint64_t *cap);
 
rsmi_status_t
rsmi_dev_power_cap_default_get(uint32_t dv_ind, uint64_t *default_cap);
 
rsmi_status_t
rsmi_dev_power_cap_range_get(uint32_t dv_ind, uint32_t sensor_ind,
                                                uint64_t *max, uint64_t *min);
  // end of PowerQuer
 
/*****************************************************************************/
rsmi_status_t
rsmi_dev_power_cap_set(uint32_t dv_ind, uint32_t sensor_ind, uint64_t cap);
 
rsmi_status_t
rsmi_dev_power_profile_set(uint32_t dv_ind, uint32_t reserved,
                                   rsmi_power_profile_preset_masks_t profile);  // end of PowerCont
/*****************************************************************************/
 
 
 
/*****************************************************************************/
rsmi_status_t
rsmi_dev_memory_total_get(uint32_t dv_ind, rsmi_memory_type_t mem_type,
                                                             uint64_t *total);
 
rsmi_status_t
rsmi_dev_memory_usage_get(uint32_t dv_ind, rsmi_memory_type_t mem_type,
                                                              uint64_t *used);
 
rsmi_status_t
rsmi_dev_memory_busy_percent_get(uint32_t dv_ind, uint32_t *busy_percent);
 
rsmi_status_t
rsmi_dev_memory_reserved_pages_get(uint32_t dv_ind, uint32_t *num_pages,
                                         rsmi_retired_page_record_t *records);  // end of MemQuer
 
rsmi_status_t rsmi_dev_fan_rpms_get(uint32_t dv_ind, uint32_t sensor_ind,
                                                              int64_t *speed);
 
rsmi_status_t rsmi_dev_fan_speed_get(uint32_t dv_ind,
                                        uint32_t sensor_ind, int64_t *speed);
 
rsmi_status_t rsmi_dev_fan_speed_max_get(uint32_t dv_ind,
                                    uint32_t sensor_ind, uint64_t *max_speed);
 
rsmi_status_t rsmi_dev_temp_metric_get(uint32_t dv_ind, uint32_t sensor_type,
                      rsmi_temperature_metric_t metric, int64_t *temperature);
 
rsmi_status_t rsmi_dev_volt_metric_get(uint32_t dv_ind,
                               rsmi_voltage_type_t sensor_type,
                              rsmi_voltage_metric_t metric, int64_t *voltage);  // end of PhysQuer
 
/*****************************************************************************/
rsmi_status_t rsmi_dev_fan_reset(uint32_t dv_ind, uint32_t sensor_ind);
 
rsmi_status_t rsmi_dev_fan_speed_set(uint32_t dv_ind, uint32_t sensor_ind,
                                                              uint64_t speed);
  // end of PhysCont
/*****************************************************************************/
rsmi_status_t
rsmi_dev_busy_percent_get(uint32_t dv_ind, uint32_t *busy_percent);
 
rsmi_status_t
rsmi_utilization_count_get(uint32_t dv_ind,
                rsmi_utilization_counter_t utilization_counters[],
                uint32_t count,
                uint64_t *timestamp);
 
rsmi_status_t
rsmi_dev_activity_metric_get(uint32_t dv_ind,
                             rsmi_activity_metric_t activity_metric_type,
                             rsmi_activity_metric_counter_t* activity_metric_counter);
 
rsmi_status_t
rsmi_dev_activity_avg_mm_get(uint32_t dv_ind, uint16_t* avg_activity);
 
rsmi_status_t rsmi_dev_perf_level_get(uint32_t dv_ind,
                                                 rsmi_dev_perf_level_t *perf);
 
rsmi_status_t rsmi_perf_determinism_mode_set(uint32_t dv_ind,
                                             uint64_t clkvalue);
 
rsmi_status_t rsmi_dev_overdrive_level_get(uint32_t dv_ind, uint32_t *od);
 
rsmi_status_t rsmi_dev_mem_overdrive_level_get(uint32_t dv_ind, uint32_t *od);
 
rsmi_status_t rsmi_dev_gpu_clk_freq_get(uint32_t dv_ind,
                             rsmi_clk_type_t clk_type, rsmi_frequencies_t *f);
 
rsmi_status_t rsmi_dev_gpu_reset(uint32_t dv_ind);
 
rsmi_status_t rsmi_dev_od_volt_info_get(uint32_t dv_ind,
                                               rsmi_od_volt_freq_data_t *odv);
 
rsmi_status_t rsmi_dev_gpu_metrics_info_get(uint32_t dv_ind,
                                            rsmi_gpu_metrics_t *pgpu_metrics);
 
rsmi_status_t rsmi_dev_clk_range_set(uint32_t dv_ind, uint64_t minclkvalue,
                                       uint64_t maxclkvalue,
                                       rsmi_clk_type_t clkType);
 
rsmi_status_t rsmi_dev_clk_extremum_set(uint32_t dv_ind, rsmi_freq_ind_t level,
                                       uint64_t clkvalue,
                                       rsmi_clk_type_t clkType);
 
rsmi_status_t rsmi_dev_od_clk_info_set(uint32_t dv_ind, rsmi_freq_ind_t level,
                                       uint64_t clkvalue,
                                       rsmi_clk_type_t clkType);
 
rsmi_status_t rsmi_dev_od_volt_info_set(uint32_t dv_ind, uint32_t vpoint,
                                        uint64_t clkvalue, uint64_t voltvalue);
 
rsmi_status_t rsmi_dev_od_volt_curve_regions_get(uint32_t dv_ind,
                      uint32_t *num_regions, rsmi_freq_volt_region_t *buffer);
 
rsmi_status_t
rsmi_dev_power_profile_presets_get(uint32_t dv_ind, uint32_t sensor_ind,
                                         rsmi_power_profile_status_t *status);
  // end of PerfQuer
/*****************************************************************************/
 
rsmi_status_t
rsmi_dev_perf_level_set(uint32_t dv_ind, rsmi_dev_perf_level_t perf_lvl);
 
rsmi_status_t
rsmi_dev_perf_level_set_v1(uint32_t dv_ind, rsmi_dev_perf_level_t perf_lvl);
 
rsmi_status_t rsmi_dev_overdrive_level_set(uint32_t dv_ind, uint32_t od);
 
rsmi_status_t rsmi_dev_overdrive_level_set_v1(uint32_t dv_ind, uint32_t od);
 
rsmi_status_t rsmi_dev_gpu_clk_freq_set(uint32_t dv_ind,
                             rsmi_clk_type_t clk_type, uint64_t freq_bitmask);
  // end of PerfCont
 
/*****************************************************************************/
rsmi_status_t
rsmi_version_get(rsmi_version_t *version);
 
rsmi_status_t
rsmi_version_str_get(rsmi_sw_component_t component, char *ver_str,
                                                                uint32_t len);
 
rsmi_status_t
rsmi_dev_vbios_version_get(uint32_t dv_ind, char *vbios, uint32_t len);
 
rsmi_status_t
rsmi_dev_firmware_version_get(uint32_t dv_ind, rsmi_fw_block_t block,
                                                        uint64_t *fw_version);
 
rsmi_status_t rsmi_dev_target_graphics_version_get(uint32_t dv_ind,
                                                  uint64_t *gfx_version);
  // end of VersQuer
 
/*****************************************************************************/
rsmi_status_t rsmi_dev_ecc_count_get(uint32_t dv_ind,
                              rsmi_gpu_block_t block, rsmi_error_count_t *ec);
 
rsmi_status_t rsmi_dev_ecc_enabled_get(uint32_t dv_ind,
                                                    uint64_t *enabled_blocks);
 
rsmi_status_t rsmi_dev_ecc_status_get(uint32_t dv_ind, rsmi_gpu_block_t block,
                                                  rsmi_ras_err_state_t *state);
rsmi_status_t
rsmi_status_string(rsmi_status_t status, const char **status_string);
  // end of ErrQuer
 
/*****************************************************************************/
rsmi_status_t
rsmi_dev_counter_group_supported(uint32_t dv_ind, rsmi_event_group_t group);
 
rsmi_status_t
rsmi_dev_counter_create(uint32_t dv_ind, rsmi_event_type_t type,
                                            rsmi_event_handle_t *evnt_handle);
 
rsmi_status_t
rsmi_dev_counter_destroy(rsmi_event_handle_t evnt_handle);
 
rsmi_status_t
rsmi_counter_control(rsmi_event_handle_t evt_handle,
                                  rsmi_counter_command_t cmd, void *cmd_args);
 
rsmi_status_t
rsmi_counter_read(rsmi_event_handle_t evt_handle,
                                                 rsmi_counter_value_t *value);
 
rsmi_status_t
rsmi_counter_available_counters_get(uint32_t dv_ind,
                                 rsmi_event_group_t grp, uint32_t *available);  // end of PerfCntr
 
/*****************************************************************************/
rsmi_status_t
rsmi_compute_process_info_get(rsmi_process_info_t *procs, uint32_t *num_items);
 
rsmi_status_t
rsmi_compute_process_info_by_pid_get(uint32_t pid, rsmi_process_info_t *proc);
 
rsmi_status_t
rsmi_compute_process_gpus_get(uint32_t pid, uint32_t *dv_indices,
                                            uint32_t *num_devices);
 
rsmi_status_t
rsmi_compute_process_info_by_device_get(uint32_t pid, uint32_t dv_ind,
                                                rsmi_process_info_t *proc);
  // end of SysInfo
 
/*****************************************************************************/
rsmi_status_t
rsmi_dev_xgmi_error_status(uint32_t dv_ind, rsmi_xgmi_status_t *status);
 
rsmi_status_t
rsmi_dev_xgmi_error_reset(uint32_t dv_ind);
 
rsmi_status_t
rsmi_dev_xgmi_hive_id_get(uint32_t dv_ind, uint64_t *hive_id);
  // end of SysInfo
 
/*****************************************************************************/
rsmi_status_t
rsmi_topo_get_numa_node_number(uint32_t dv_ind, uint32_t *numa_node);
 
rsmi_status_t
rsmi_topo_get_link_weight(uint32_t dv_ind_src, uint32_t dv_ind_dst,
                          uint64_t *weight);
 
rsmi_status_t
rsmi_minmax_bandwidth_get(uint32_t dv_ind_src, uint32_t dv_ind_dst,
                          uint64_t *min_bandwidth, uint64_t *max_bandwidth);
 
rsmi_status_t
rsmi_topo_get_link_type(uint32_t dv_ind_src, uint32_t dv_ind_dst,
                        uint64_t *hops, RSMI_IO_LINK_TYPE *type);
 
rsmi_status_t
rsmi_is_P2P_accessible(uint32_t dv_ind_src, uint32_t dv_ind_dst,
                       bool *accessible);
  // end of HWTopo
 
/*****************************************************************************/
rsmi_status_t
rsmi_dev_compute_partition_get(uint32_t dv_ind, char *compute_partition,
                               uint32_t len);
 
rsmi_status_t
rsmi_dev_compute_partition_set(uint32_t dv_ind,
                               rsmi_compute_partition_type_t compute_partition);
 
rsmi_status_t rsmi_dev_compute_partition_reset(uint32_t dv_ind);
 
rsmi_status_t rsmi_dev_partition_id_get(uint32_t dv_ind, uint32_t *partition_id);
  // end of ComputePartition
 
/*****************************************************************************/
rsmi_status_t
rsmi_dev_memory_partition_get(uint32_t dv_ind, char *memory_partition,
                              uint32_t len);
 
rsmi_status_t
rsmi_dev_memory_partition_set(uint32_t dv_ind,
                              rsmi_memory_partition_type_t memory_partition);
 
rsmi_status_t rsmi_dev_memory_partition_reset(uint32_t dv_ind);
  // end of memory_partition
 
/*****************************************************************************/
rsmi_status_t
rsmi_dev_supported_func_iterator_open(uint32_t dv_ind,
                                          rsmi_func_id_iter_handle_t *handle);
 
rsmi_status_t
rsmi_dev_supported_variant_iterator_open(rsmi_func_id_iter_handle_t obj_h,
                                        rsmi_func_id_iter_handle_t *var_iter);
 
rsmi_status_t
rsmi_func_iter_next(rsmi_func_id_iter_handle_t handle);
 
rsmi_status_t
rsmi_dev_supported_func_iterator_close(rsmi_func_id_iter_handle_t *handle);
 
rsmi_status_t
rsmi_func_iter_value_get(rsmi_func_id_iter_handle_t handle,
                                                 rsmi_func_id_value_t *value);
  // end of APISupport
 
/*****************************************************************************/
rsmi_status_t
rsmi_event_notification_init(uint32_t dv_ind);
 
rsmi_status_t
rsmi_event_notification_mask_set(uint32_t dv_ind, uint64_t mask);
 
rsmi_status_t
rsmi_event_notification_get(int timeout_ms,
                     uint32_t *num_elem, rsmi_evt_notification_data_t *data);
 
rsmi_status_t rsmi_event_notification_stop(uint32_t dv_ind);
  // end of EvntNotif
 
 
/*****************************************************************************/
rsmi_status_t
rsmi_dev_metrics_header_info_get(uint32_t dv_ind, metrics_table_header_t* header_value);
 
rsmi_status_t
rsmi_dev_metrics_xcd_counter_get(uint32_t dv_ind, uint16_t* xcd_counter_value);
 
rsmi_status_t
rsmi_dev_metrics_log_get(uint32_t dv_ind);
  // end of DevMetricsHeaderInfoGet
 
#ifdef __cplusplus
}
#endif  // __cplusplus
#endif  // ROCM_SMI_ROCM_SMI_H_