What is hipSPARSELt?#
hipSPARSELt is a SPARSE marshalling library supporting multiple backends. It presents a common interface that provides Basic Linear Algebra Subroutines (BLAS) for sparse computation, implemented on top of the AMD ROCm runtime and toolchains. Through supported backends, hipSPARSELt enables structured sparse matrix multiplication that can take advantage of AMD sparse MFMA Matrix Core acceleration on supported AMD GPUs.
hipSPARSELt sits between the application and a “worker” SPARSE library, marshalling inputs into the backend library and results back to the application. It exports a uniform interface that doesn’t require client-side changes when switching backends. The supported backends are: rocSPARSELt and NVIDIA CUDA cuSPARSELt v0.6.3.
The hipSPARSELt library is created using the HIP programming language and is optimized for the latest AMD discrete GPUs.
Key features#
- Mixed-precision computation:
FP16input/output withFP32matrix core accumulateBFLOAT16input/output withFP32matrix core accumulateINT8input/output withINT32matrix core accumulateINT8input withFP16output andINT32matrix core accumulateFP8input withFP32output andFP32matrix core accumulateBF8input withFP32output andFP32matrix core accumulate
- Sparse matrix capabilities:
Matrix pruning and compression functionalities
Auto-tuning functionality (see
hipsparseLtMatmulSearch())
- Batched sparse GEMM:
Single sparse matrix/multiple dense matrices (broadcast)
Multiple sparse and dense matrices
Batched bias vector
- Fused activation support in SpMM kernels:
ReLU
ClippedReLU
GeLU
GeLU scaling
Abs
LeakyReLU
Sigmoid
Tanh