amdsmi.h File Reference#
amdsmi.h File Reference
AMD System Management Interface API. More...
#include <stdbool.h>#include <stdlib.h>#include <stdint.h>Go to the source code of this file.
Data Structures | |
| struct | amdsmi_hsmp_driver_version_t |
| This structure holds HSMP Driver version information. More... | |
| struct | amdsmi_range_t |
| This structure represents a range (e.g., frequencies or voltages). More... | |
| struct | amdsmi_xgmi_info_t |
| XGMI Information. More... | |
| struct | amdsmi_vram_usage_t |
| VRam Usage. More... | |
| struct | amdsmi_violation_status_t |
| This structure hold violation status information. Note: for MI3x asics and higher, older ASICs will show unsupported. More... | |
| struct | amdsmi_frequency_range_t |
| Frequency Range. More... | |
| union | amdsmi_bdf_t |
| bdf types More... | |
| struct | amdsmi_bdf_t::bdf_ |
| struct | amdsmi_enumeration_info_t |
| Structure holds enumeration information. More... | |
| struct | amdsmi_pcie_info_t |
| pcie information More... | |
| struct | amdsmi_pcie_info_t::pcie_static_ |
| struct | amdsmi_pcie_info_t::pcie_metric_ |
| struct | amdsmi_power_cap_info_t |
| Power Cap Information. More... | |
| struct | amdsmi_vbios_info_t |
| VBios Information. More... | |
| struct | amdsmi_gpu_cache_info_t |
| GPU Cache Information. More... | |
| struct | amdsmi_gpu_cache_info_t::cache_ |
| struct | amdsmi_fw_info_t |
| Firmware Information. More... | |
| struct | amdsmi_fw_info_t::fw_info_list_ |
| struct | amdsmi_asic_info_t |
| ASIC Information. More... | |
| struct | amdsmi_kfd_info_t |
| Structure holds kfd information. More... | |
| union | amdsmi_nps_caps_t |
| This union holds memory partition bitmask. More... | |
| struct | amdsmi_nps_caps_t::nps_flags_ |
| struct | amdsmi_memory_partition_config_t |
| Memory Partition Configuration. This structure is used to identify various memory partition configurations. More... | |
| struct | amdsmi_memory_partition_config_t::numa_range_ |
| struct | amdsmi_accelerator_partition_profile_t |
| Accelerator Partition Resource Profile. More... | |
| struct | amdsmi_accelerator_partition_resource_profile_t |
| Accelerator Partition Resources. This struct is used to identify various partition resource profiles. More... | |
| struct | amdsmi_accelerator_partition_profile_config_t |
| Accelerator Partition Profile Configurations. More... | |
| struct | amdsmi_cpu_util_t |
| This structure holds CPU utilization information. More... | |
| struct | amdsmi_link_metrics_t |
| Link Metrics. More... | |
| struct | amdsmi_link_metrics_t::_links |
| struct | amdsmi_vram_info_t |
| VRam Information. More... | |
| struct | amdsmi_driver_info_t |
| Driver Information. More... | |
| struct | amdsmi_board_info_t |
| Board Information. More... | |
| struct | amdsmi_power_info_t |
| Power Information. More... | |
| struct | amdsmi_clk_info_t |
| Clock Information. More... | |
| struct | amdsmi_engine_usage_t |
| Engine Usage amdsmi_engine_usage_t: This structure holds common GPU activity values seen in both BM or SRIOV. More... | |
| struct | amdsmi_proc_info_t |
| Process Information. More... | |
| struct | amdsmi_proc_info_t::engine_usage_ |
| struct | amdsmi_proc_info_t::memory_usage_ |
| struct | amdsmi_p2p_capability_t |
| IO Link P2P Capability. More... | |
| struct | amdsmi_counter_value_t |
| Counter value. More... | |
| struct | amdsmi_evt_notification_data_t |
| Event notification data returned from event notification API. More... | |
| struct | amdsmi_gpu_ras_policy_v4_0_t |
| Ras policy v4.0. More... | |
| struct | amdsmi_gpu_ras_policy_info_t |
| Ras policy info structure for storing version and different ras policy version structures. More... | |
| union | amdsmi_gpu_ras_policy_info_t::policy_data_ |
| struct | amdsmi_utilization_counter_t |
| The utilization counter data. More... | |
| struct | amdsmi_retired_page_record_t |
| Reserved Memory Page Record. More... | |
| struct | amdsmi_power_profile_status_t |
| This structure contains information about which power profiles are supported by the system for a given device, and which power profile is currently active. More... | |
| struct | amdsmi_frequencies_t |
| This structure holds information about clock frequencies. More... | |
| struct | amdsmi_dpm_policy_entry_t |
| The dpm policy. More... | |
| struct | amdsmi_dpm_policy_t |
| DPM Policy. More... | |
| struct | amdsmi_pcie_bandwidth_t |
| This structure holds information about the possible PCIe bandwidths. Specifically, the possible transfer rates and their associated numbers of lanes are stored here. More... | |
| struct | amdsmi_version_t |
| This structure holds version information. More... | |
| struct | amdsmi_od_vddc_point_t |
| This structure represents a point on the frequency-voltage plane. More... | |
| struct | amdsmi_freq_volt_region_t |
| This structure holds 2 amdsmi_range_t's, one for frequency and one for voltage. These 2 ranges indicate the range of possible values for the corresponding amdsmi_od_vddc_point_t. More... | |
| struct | amdsmi_od_volt_curve_t |
| OD Vold Curve AMDSMI_NUM_VOLTAGE_CURVE_POINTS number of amdsmi_od_vddc_point_t's. More... | |
| struct | amdsmi_od_volt_freq_data_t |
| This structure holds the frequency-voltage values for a device. More... | |
| struct | amd_metrics_table_header_t |
| Structure holds the gpu metrics table header for a device. More... | |
| struct | amdsmi_gpu_xcp_metrics_t |
| The following structures hold the gpu statistics for a device. More... | |
| struct | amdsmi_apu_metrics_t |
| APU metrics auxiliary data. More... | |
| struct | amdsmi_gpu_metrics_t |
| Structure holds the gpu metrics values for a device. More... | |
| struct | amdsmi_xgmi_link_status_t |
| XGMI Link Status. More... | |
| struct | amdsmi_name_value_t |
| This structure holds the name value pairs. More... | |
| struct | amdsmi_ras_feature_t |
| This structure holds ras feature information. More... | |
| struct | amdsmi_ras_feature_t::ras_info_ |
| struct | amdsmi_error_count_t |
| This structure holds error counts. More... | |
| struct | amdsmi_process_info_t |
| This structure contains information specific to a process. Sum of the process memory is not expected to be the total memory usage. More... | |
| struct | amdsmi_topology_nearest_t |
| Topology Nearest. More... | |
| struct | amdsmi_npm_info_t |
| NPM info. More... | |
| struct | amdsmi_smu_fw_version_t |
| This structure holds SMU Firmware version information. More... | |
| struct | amdsmi_ddr_bw_metrics_t |
| DDR bandwidth metrics. More... | |
| struct | amdsmi_temp_range_refresh_rate_t |
| temperature range and refresh rate metrics of a DIMM More... | |
| struct | amdsmi_dimm_power_t |
| DIMM Power(mW), power update rate(ms) and dimm address. More... | |
| struct | amdsmi_dimm_thermal_t |
| DIMM temperature(°C) and update rate(ms) and dimm address. More... | |
| struct | amdsmi_link_id_bw_type_t |
| LINK name and Bandwidth type Information.It contains link names i.e valid link names are "P0", "P1", "P2", "P3", "P4", "G0", "G1", "G2", "G3", "G4" "G5", "G6", "G7" Valid bandwidth types 1(Aggregate_BW), 2 (Read BW), 4 (Write BW). More... | |
| struct | amdsmi_dpm_level_t |
| max and min LCLK DPM level on a given NBIO ID. Valid max and min DPM level values are 0 - 1. More... | |
| struct | amdsmi_hsmp_metrics_table_t |
| HSMP Metrics table (supported only with hsmp proto version 6). More... | |
| struct | amdsmi_cpu_info_t |
| cpu info data More... | |
| struct | amdsmi_sock_info_t |
| cpu socket info data More... | |
| struct | amdsmi_nic_stat_t |
| Structure for NIC statistic name-value pairs. More... | |
| struct | amdsmi_nic_asic_info_t |
| NIC asic information. More... | |
| struct | amdsmi_nic_bus_info_t |
| NIC bus information. More... | |
| struct | amdsmi_nic_numa_info_t |
| NIC NUMA information. More... | |
| struct | amdsmi_nic_fw_t |
| NIC firmware information. More... | |
| struct | amdsmi_nic_fw_info_t |
| NIC firmware information collection. More... | |
| struct | amdsmi_nic_port_t |
| NIC port information. More... | |
| struct | amdsmi_nic_port_info_t |
| NIC port information collection. More... | |
| struct | amdsmi_nic_driver_info_t |
| NIC driver information. More... | |
| struct | amdsmi_nic_rdma_port_info_t |
| NIC RDMA port information. More... | |
| struct | amdsmi_nic_rdma_dev_info_t |
| NIC RDMA device information. More... | |
| struct | amdsmi_nic_rdma_devices_info_t |
| NIC RDMA devices information collection. More... | |
| struct | amdsmi_cper_guid_t |
| Cper. More... | |
| struct | amdsmi_cper_timestamp_t |
| union | amdsmi_cper_valid_bits_t |
| struct | amdsmi_cper_valid_bits_t::valid_bits_ |
| struct | amdsmi_cper_hdr_t |
| struct | amdsmi_uma_carveout_option_t |
| struct | amdsmi_uma_carveout_info_t |
| struct | amdsmi_ttm_info_t |
Macros | |
| #define | AMDSMI_MAX_MM_IP_COUNT 8 |
| Maximum size definitions. | |
| #define | AMDSMI_MAX_STRING_LENGTH 256 |
| Maximum length for string buffers. | |
| #define | AMDSMI_MAX_DEVICES 32 |
| Maximum number of devices supported. | |
| #define | AMDSMI_MAX_CACHE_TYPES 10 |
| Maximum number of cache types. | |
| #define | AMDSMI_MAX_ACCELERATOR_PROFILE 32 |
| Maximum number of accelerator profiles. | |
| #define | AMDSMI_MAX_CP_PROFILE_RESOURCES 32 |
| Maximum number of compute profile resources. | |
| #define | AMDSMI_MAX_ACCELERATOR_PARTITIONS 8 |
| Maximum number of accelerator partitions. | |
| #define | AMDSMI_MAX_NUM_NUMA_NODES 32 |
| Maximum number of NUMA nodes. | |
| #define | AMDSMI_GPU_UUID_SIZE 38 |
| Size of GPU UUID string. | |
| #define | AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64 |
| Common defines. | |
| #define | AMDSMI_MAX_CONTAINER_TYPE 2 |
| Maximum number of container types. | |
| #define | CENTRIGRADE_TO_MILLI_CENTIGRADE 1000 |
| The following structure holds the gpu metrics values for a device. | |
| #define | AMDSMI_NUM_HBM_INSTANCES 4 |
| This should match NUM_HBM_INSTANCES. | |
| #define | AMDSMI_MAX_NUM_VCN 4 |
| This should match MAX_NUM_VCN. | |
| #define | AMDSMI_MAX_NUM_CLKS 4 |
| This should match MAX_NUM_CLKS. | |
| #define | AMDSMI_MAX_NUM_XGMI_LINKS 8 |
| This should match MAX_NUM_XGMI_LINKS. | |
| #define | AMDSMI_MAX_NUM_GFX_CLKS 8 |
| This should match MAX_NUM_GFX_CLKS. | |
| #define | AMDSMI_MAX_AID 4 |
| This should match AMDSMI_MAX_AID. | |
| #define | AMDSMI_MAX_ENGINES 8 |
| This should match AMDSMI_MAX_ENGINES. | |
| #define | AMDSMI_MAX_NUM_JPEG 32 |
| This should match AMDSMI_MAX_NUM_JPEG (8*4=32) | |
| #define | AMDSMI_MAX_NUM_JPEG_ENG_V1 40 |
| Introduced in gpu metrics v1.8, document presents NUM_JPEG_ENG_V1 but will change to AMDSMI_MAX_NUM_JPEG_ENG_V1 for continuity. | |
| #define | AMDSMI_MAX_NUM_XCC 8 |
| This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units, ACE (Asynchronous Compute Engines), caches, and global resources organized as one unit. | |
| #define | AMDSMI_MAX_NUM_XCP 8 |
| This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Graphics Compute Partitions. Each physical gpu could have a maximum of 8 separate partitions associated with each (depending on ASIC support). | |
| #define | AMDSMI_APU_MAX_CORES 16 |
| APU metrics: max number of cores, L3, and IPUs. | |
| #define | AMDSMI_APU_V24_CORES 8 |
| v2_4 core count | |
| #define | AMDSMI_APU_MAX_L3 2 |
| v2_4 | |
| #define | AMDSMI_APU_MAX_IPU 8 |
| v3_0, average_ipu_activity[] | |
| #define | MAX_NUMBER_OF_AFIDS_PER_RECORD 12 |
| Max Number of AFIDs that will be inside one cper entry. | |
| #define | AMDSMI_MAX_VF_COUNT 32 |
| Maximum size definitions AMDSMI. | |
| #define | AMDSMI_MAX_DRIVER_NUM 2 |
| Maximum drivers supported. | |
| #define | AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9 |
| DFC firmware entries supported. | |
| #define | AMDSMI_MAX_WHITE_LIST_ELEMENTS 16 |
| Max white list elements for device access control. | |
| #define | AMDSMI_MAX_BLACK_LIST_ELEMENTS 64 |
| Max black list elements for device access control. | |
| #define | AMDSMI_MAX_UUID_ELEMENTS 16 |
| Max UUID elements supported. | |
| #define | AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS 8 |
| Max Trusted Application white list elements. | |
| #define | AMDSMI_MAX_ERR_RECORDS 10 |
| Maximum error records that can be stored. | |
| #define | AMDSMI_MAX_PROFILE_COUNT 16 |
| Maximum profiles supported. | |
| #define | AMDSMI_MAX_NUM_HBM_STACKS 12 |
| Introduced in gpu metrics v1.9+. | |
| #define | AMDSMI_MAX_NUM_AID 2 |
| Maximum number of AID supported. | |
| #define | AMDSMI_MAX_NUM_MID 2 |
| Maximum number of MID supported. | |
| #define | AMDSMI_MAX_NUM_CLKS_PER_AID 2 |
| Maximum number of clocks per AID supported. | |
| #define | AMDSMI_MAX_NUM_CLKS_PER_MID 2 |
| Maximum number of clocks per MID supported. | |
| #define | AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d" |
| String format. | |
| #define | AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d" |
| Date format string. | |
| #define | AMDSMI_LIB_VERSION_MAJOR 26 |
| library versioning | |
| #define | AMDSMI_LIB_VERSION_MINOR 4 |
| Minor version should be updated for each API change, but without changing headers. | |
| #define | AMDSMI_LIB_VERSION_RELEASE 0 |
| #define | AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR, MINOR, RELEASE) (#MAJOR "." #MINOR "." #RELEASE) |
| #define | AMDSMI_LIB_VERSION_EXPAND_PARTS(MAJOR_STR, MINOR_STR, RELEASE_STR) AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR_STR, MINOR_STR, RELEASE_STR) |
| #define | AMDSMI_LIB_VERSION_STRING |
| #define | AMDSMI_PF_INDEX (AMDSMI_MAX_VF_COUNT - 1) |
| Maximum size definitions AMDSMI. | |
| #define | AMDSMI_MAX_DRIVER_INFO_RSVD 64 |
| #define | AMDSMI_MAX_SPD_DIMM_ADDRESS 0xFF |
| SPD DIMM register validation limits. | |
| #define | AMDSMI_MAX_SPD_LID 0xF |
| Maximum SPD logical ID [11:8]. | |
| #define | AMDSMI_MAX_SPD_REG_OFFSET 0x7FF |
| Maximum SPD register offset [22:12]. | |
| #define | AMDSMI_MAX_SPD_REG_SPACE 0x1 |
| Maximum SPD register space [23]. | |
| #define | AMDSMI_MAX_SPD_WRITE_DATA 0xFF |
| Maximum SPD write data [31:24]. | |
| #define | MAX_SVI3_RAIL_INDEX 4 |
| Maximum SVI3 rail index. | |
| #define | MAX_SVI3_RAIL_SELECTION 1 |
| Maximum SVI3 rail selection. | |
| #define | POWER_EFFICIENCY_MODE_4 0x4 |
| Power Efficiency mode selection. | |
| #define | POWER_EFFICIENCY_MODE_5 0x5 |
| Power Efficiency mode selection. | |
| #define | AMDSMI_MAX_POWER_EFFICIENCY_UTIL 0x7F |
| [9:3]=Balanced core mode utilization point(%) | |
| #define | AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT 0x1FFFFF |
| [30:10]=Balanced core mode PPT limit(mW) | |
| #define | AMDSMI_RAIL_INDEX_NONE 0xFFFFFFFF |
| Rail Index value defined as maximum when not passed. | |
| #define | AMDSMI_MAX_NUM_FREQUENCIES 33 |
| #define | AMDSMI_MAX_FAN_SPEED 255 |
| #define | AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3 |
| #define | AMDSMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1)) |
| Macro to generate event bitmask from event id. | |
| #define | AMDSMI_MAX_UTILIZATION_VALUES 4 |
| The max number of values per counter type. | |
| #define | AMDSMI_MAX_NUM_PM_POLICIES 32 |
| Maximum number of power management policies. | |
| #define | AMDSMI_MAX_NIC_PORTS 32 |
| Maximum size definitions AMDSMI NIC. | |
| #define | AMDSMI_MAX_NIC_RDMA_DEV 32 |
| Maximum number of NIC RDMA devices. | |
| #define | AMDSMI_MAX_NIC_FW 16 |
| Maximum number of NIC firmwares. | |
| #define | AMDSMI_MAX_CARVEOUT_OPTIONS 16 |
| Maximum carveout options. | |
Typedefs | |
| typedef void * | amdsmi_processor_handle |
| opaque handler point to underlying implementation | |
| typedef void * | amdsmi_socket_handle |
| typedef void * | amdsmi_node_handle |
| opaque handler point to underlying implementation | |
| typedef void * | amdsmi_cpusocket_handle |
| opaque handler point to underlying implementation | |
| typedef amdsmi_processor_type_t | processor_type_t |
| Backward-compatibility alias for amdsmi_processor_type_t. | |
| typedef uint32_t | amdsmi_process_handle_t |
| Process Handle. | |
| typedef uintptr_t | amdsmi_event_handle_t |
| Handle to performance event counter. | |
| typedef uint64_t | amdsmi_bit_field_t |
| Bitfield used in various AMDSMI calls. | |
Functions | |
| amdsmi_status_t | amdsmi_init (uint64_t init_flags) |
| Initialize the AMD SMI library. | |
| amdsmi_status_t | amdsmi_shut_down (void) |
| Shutdown the AMD SMI library. | |
| amdsmi_status_t | amdsmi_get_socket_handles (uint32_t *socket_count, amdsmi_socket_handle *socket_handles) |
| Get the list of socket handles in the system. | |
| amdsmi_status_t | amdsmi_get_socket_info (amdsmi_socket_handle socket_handle, size_t len, char *name) |
| Get information about the given socket. | |
| amdsmi_status_t | amdsmi_get_processor_handles (amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles) |
| Get the list of the processor handles associated to a socket. | |
| amdsmi_status_t | amdsmi_get_node_handle (amdsmi_processor_handle processor_handle, amdsmi_node_handle *node_handle) |
| Get the node handle associated with processor handle. | |
| amdsmi_status_t | amdsmi_get_processor_type (amdsmi_processor_handle processor_handle, amdsmi_processor_type_t *processor_type) |
| Get the processor type of the processor_handle. | |
| amdsmi_status_t | amdsmi_get_processor_info (amdsmi_processor_handle processor_handle, size_t len, char *name) |
| Get information about the given processor. | |
| amdsmi_status_t | amdsmi_get_processor_count_from_handles (amdsmi_processor_handle *processor_handles, uint32_t *processor_count, uint32_t *nr_cpusockets, uint32_t *nr_cpucores, uint32_t *nr_gpus) |
| Get respective processor counts from the processor handles. | |
| amdsmi_status_t | amdsmi_get_processor_handles_by_type (amdsmi_socket_handle socket_handle, amdsmi_processor_type_t processor_type, amdsmi_processor_handle *processor_handles, uint32_t *processor_count) |
| Returns a list of processor handles of the specified type in the system. | |
| amdsmi_status_t | amdsmi_get_processor_handle_from_bdf (amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle) |
| Get processor handle with the matching bdf. | |
| amdsmi_status_t | amdsmi_get_gpu_device_bdf (amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf) |
| Returns BDF of the given GPU device. | |
| amdsmi_status_t | amdsmi_get_gpu_device_uuid (amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid) |
| Returns the UUID of the device. | |
| amdsmi_status_t | amdsmi_get_gpu_enumeration_info (amdsmi_processor_handle processor_handle, amdsmi_enumeration_info_t *info) |
| Returns the Enumeration information for the device. | |
| amdsmi_status_t | amdsmi_get_cpu_affinity_with_scope (amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope) |
| Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node or socket for the device. | |
| amdsmi_status_t | amdsmi_get_gpu_virtualization_mode (amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode) |
| Returns the virtualization mode for the target device. | |
| amdsmi_status_t | amdsmi_get_gpu_id (amdsmi_processor_handle processor_handle, uint16_t *id) |
| Get the device id associated with the device with provided device handler. | |
| amdsmi_status_t | amdsmi_get_gpu_revision (amdsmi_processor_handle processor_handle, uint16_t *revision) |
| Get the device revision associated with the device. | |
| amdsmi_status_t | amdsmi_get_gpu_vendor_name (amdsmi_processor_handle processor_handle, char *name, size_t len) |
| Get the name string for a give vendor ID. | |
| amdsmi_status_t | amdsmi_get_gpu_vram_vendor (amdsmi_processor_handle processor_handle, char *brand, uint32_t len) |
| Get the vram vendor string of a device. | |
| amdsmi_status_t | amdsmi_get_gpu_subsystem_id (amdsmi_processor_handle processor_handle, uint16_t *id) |
| Get the subsystem device id associated with the device with provided processor handle. | |
| amdsmi_status_t | amdsmi_get_gpu_subsystem_name (amdsmi_processor_handle processor_handle, char *name, size_t len) |
| Get the name string for the device subsystem. | |
| amdsmi_status_t | amdsmi_get_gpu_pci_bandwidth (amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth) |
| Get the list of possible PCIe bandwidths that are available. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_bdf_id (amdsmi_processor_handle processor_handle, uint64_t *bdfid) |
| Get the unique PCI device identifier associated for a device. | |
| amdsmi_status_t | amdsmi_get_gpu_topo_numa_affinity (amdsmi_processor_handle processor_handle, int32_t *numa_node) |
| Get the NUMA node associated with a device. | |
| amdsmi_status_t | amdsmi_get_gpu_pci_throughput (amdsmi_processor_handle processor_handle, uint64_t *sent, uint64_t *received, uint64_t *max_pkt_sz) |
| Get PCIe traffic information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_pci_replay_counter (amdsmi_processor_handle processor_handle, uint64_t *counter) |
| Get PCIe replay counter. | |
| amdsmi_status_t | amdsmi_set_gpu_pci_bandwidth (amdsmi_processor_handle processor_handle, uint64_t bw_bitmask) |
| Control the set of allowed PCIe bandwidths that can be used. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_energy_count (amdsmi_processor_handle processor_handle, uint64_t *energy_accumulator, float *counter_resolution, uint64_t *timestamp) |
| Get the energy accumulator counter of the processor with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_power_cap (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap) |
| Set the maximum gpu power cap value. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_power_profile (amdsmi_processor_handle processor_handle, uint32_t reserved, amdsmi_power_profile_preset_masks_t profile) |
| Set the power performance profile. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_supported_power_cap (amdsmi_processor_handle processor_handle, uint32_t *sensor_count, uint32_t *sensor_inds, amdsmi_power_cap_type_t *sensor_types) |
| Query the supported power cap sensors and their types for a device. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_power (amdsmi_processor_handle processor_handle, uint32_t *ppower) |
| Get the socket power. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_power_cap (amdsmi_processor_handle processor_handle, uint32_t *pcap) |
| Get the socket power cap. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_power_cap_max (amdsmi_processor_handle processor_handle, uint32_t *pmax) |
| Get the maximum power cap value for a given socket. | |
| amdsmi_status_t | amdsmi_get_cpu_pwr_svi_telemetry_all_rails (amdsmi_processor_handle processor_handle, uint32_t *power) |
| Get the SVI based power telemetry for all rails. | |
| amdsmi_status_t | amdsmi_set_cpu_socket_power_cap (amdsmi_processor_handle processor_handle, uint32_t pcap) |
| Set the power cap value for a given socket. | |
| amdsmi_status_t | amdsmi_set_cpu_pwr_efficiency_mode (amdsmi_processor_handle processor_handle, uint8_t power_efficiency_mode, uint32_t *utilization, uint32_t *ppt_limit) |
| Set the power efficiency profile policy. | |
| amdsmi_status_t | amdsmi_get_cpu_pwr_efficiency_mode (amdsmi_processor_handle processor_handle, uint32_t *power_efficiency_mode, uint32_t *utilization, uint32_t *ppt_limit) |
| Get the power efficiency profile policy. | |
| amdsmi_status_t | amdsmi_get_cpu_core_ccd_power (amdsmi_processor_handle processor_handle, uint32_t *power) |
| Read CCD (Core Complex Die) power consumption. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_total (amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *total) |
| Get the total amount of memory that exists. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_usage (amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *used) |
| Get the current memory usage. | |
| amdsmi_status_t | amdsmi_get_gpu_bad_page_info (amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *info) |
| Get the bad pages of a processor. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_bad_page_threshold (amdsmi_processor_handle processor_handle, uint32_t *threshold) |
| Get the bad pages threshold of a processor. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_gpu_validate_ras_eeprom (amdsmi_processor_handle processor_handle) |
| Verify the checksum of RAS EEPROM. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_ras_block_features_enabled (amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state) |
| Returns if RAS features are enabled or disabled for given block. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_reserved_pages (amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *records) |
| Get information about reserved ("retired") memory pages. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_fan_rpms (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed) |
| Get the fan speed in RPMs of the device with the specified processor handle and 0-based sensor index. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_fan_speed (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed) |
| Get the fan speed for the specified device as a value relative to the maximum fan speed. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_fan_speed_max (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t *max_speed) |
| Get the max. fan speed of the device with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_cache_info (amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info) |
| Returns gpu cache info. | |
| amdsmi_status_t | amdsmi_get_gpu_volt_metric (amdsmi_processor_handle processor_handle, amdsmi_voltage_type_t sensor_type, amdsmi_voltage_metric_t metric, int64_t *voltage) |
| Get the voltage metric value for the specified metric, from the specified voltage sensor on the specified device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_reset_gpu_fan (amdsmi_processor_handle processor_handle, uint32_t sensor_ind) |
| Reset the fan to automatic driver control. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_fan_speed (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t speed) |
| Set the fan speed for the specified device with the provided speed, in RPMs. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_busy_percent (amdsmi_processor_handle processor_handle, uint32_t *gpu_busy_percent) |
| Get GPU busy percent from gpu_busy_percent sysfs file. | |
| amdsmi_status_t | amdsmi_get_utilization_count (amdsmi_processor_handle processor_handle, amdsmi_utilization_counter_t utilization_counters[], uint32_t count, uint64_t *timestamp) |
| Get coarse grain utilization counter of the specified device. | |
| amdsmi_status_t | amdsmi_get_gpu_perf_level (amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t *perf) |
| Get the performance level of the device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_perf_determinism_mode (amdsmi_processor_handle processor_handle, uint64_t clkvalue) |
| Enter performance determinism mode with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_overdrive_level (amdsmi_processor_handle processor_handle, uint32_t *od) |
| Get the overdrive percent associated with the device with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_mem_overdrive_level (amdsmi_processor_handle processor_handle, uint32_t *od) |
| Get the GPU memory clock overdrive percent associated with the device with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_clk_freq (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_frequencies_t *f) |
| Get the list of possible system clock speeds of device for a specified clock type. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_reset_gpu (amdsmi_processor_handle processor_handle) |
| Triggers a chain that resets all GPUs. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_od_volt_info (amdsmi_processor_handle processor_handle, amdsmi_od_volt_freq_data_t *odv) |
| This function retrieves the overdrive GFX & MCLK information. If valid for the GPU it will also populate the voltage curve data. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_metrics_header_info (amdsmi_processor_handle processor_handle, amd_metrics_table_header_t *header_value) |
| Get the 'metrics_header_info' from the GPU metrics associated with the device. | |
| amdsmi_status_t | amdsmi_get_gpu_metrics_info (amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics) |
| This function retrieves the gpu metrics information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_partition_metrics_info (amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics) |
| This function retrieves the partition metrics information. | |
| amdsmi_status_t | amdsmi_get_gpu_pm_metrics_info (amdsmi_processor_handle processor_handle, amdsmi_name_value_t **pm_metrics, uint32_t *num_of_metrics) |
| Get the pm metrics table with provided device index. | |
| amdsmi_status_t | amdsmi_get_gpu_reg_table_info (amdsmi_processor_handle processor_handle, amdsmi_reg_type_t reg_type, amdsmi_name_value_t **reg_metrics, uint32_t *num_of_metrics) |
| Get the register metrics table with provided device index and register type. | |
| amdsmi_status_t | amdsmi_set_gpu_clk_range (amdsmi_processor_handle processor_handle, uint64_t minclkvalue, uint64_t maxclkvalue, amdsmi_clk_type_t clkType) |
| This function sets the clock range information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_clk_limit (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_limit_type_t limit_type, uint64_t clk_value) |
| This function sets the clock sets the clock min/max level. | |
| amdsmi_status_t | amdsmi_set_gpu_od_clk_info (amdsmi_processor_handle processor_handle, amdsmi_freq_ind_t level, uint64_t clkvalue, amdsmi_clk_type_t clkType) |
| This function sets the clock frequency information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_od_volt_info (amdsmi_processor_handle processor_handle, uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue) |
| This function sets 1 of the 3 voltage curve points. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_od_volt_curve_regions (amdsmi_processor_handle processor_handle, uint32_t *num_regions, amdsmi_freq_volt_region_t *buffer) |
| This function will retrieve the current valid regions in the frequency/voltage space. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_power_profile_presets (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_profile_status_t *status) |
| Get the list of available preset power profiles and an indication of which profile is currently active. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_perf_level (amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t perf_lvl) |
| Set the PowerPlay performance level associated with the device with provided processor handle with the provided value. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_overdrive_level (amdsmi_processor_handle processor_handle, uint32_t od) |
| Set the overdrive percent associated with the device with provided processor handle with the provided value. See details for WARNING. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_clk_freq (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, uint64_t freq_bitmask) |
| Control the set of allowed frequencies that can be used for the specified clock. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_soc_pstate (amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy) |
| Get the soc pstate policy for the processor. | |
| amdsmi_status_t | amdsmi_set_soc_pstate (amdsmi_processor_handle processor_handle, uint32_t policy_id) |
| Set the soc pstate policy for the processor. | |
| amdsmi_status_t | amdsmi_get_xgmi_plpd (amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd) |
| Get the xgmi per-link power down policy parameter for the processor. | |
| amdsmi_status_t | amdsmi_set_xgmi_plpd (amdsmi_processor_handle processor_handle, uint32_t policy_id) |
| Set the xgmi per-link power down policy parameter for the processor. | |
| amdsmi_status_t | amdsmi_get_gpu_process_isolation (amdsmi_processor_handle processor_handle, uint32_t *pisolate) |
| Get the status of the Process Isolation. | |
| amdsmi_status_t | amdsmi_set_gpu_process_isolation (amdsmi_processor_handle processor_handle, uint32_t pisolate) |
| Enable/disable the system Process Isolation. | |
| amdsmi_status_t | amdsmi_clean_gpu_local_data (amdsmi_processor_handle processor_handle) |
| Run the cleaner shader to clean up data in LDS/GPRs. | |
| amdsmi_status_t | amdsmi_get_lib_version (amdsmi_version_t *version) |
| Get the build version information for the currently running build of AMDSMI. | |
| amdsmi_status_t | amdsmi_get_gpu_ecc_count (amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec) |
| Retrieve the error counts for a GPU block. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_ecc_enabled (amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks) |
| Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_total_ecc_count (amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec) |
| Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_afids_from_cper (char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids) |
| Get the AFIDs from CPER buffer. | |
| amdsmi_status_t | amdsmi_get_gpu_ras_feature_info (amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature) |
| Returns RAS features info. | |
| amdsmi_status_t | amdsmi_get_gpu_cper_entries (amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor) |
| Retrieve CPER entries cached in the driver. | |
| amdsmi_status_t | amdsmi_get_gpu_ecc_status (amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state) |
| Retrieve the ECC status for a GPU block. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_status_code_to_string (amdsmi_status_t status, const char **status_string) |
| Get a description of a provided AMDSMI error status. | |
| amdsmi_status_t | amdsmi_gpu_counter_group_supported (amdsmi_processor_handle processor_handle, amdsmi_event_group_t group) |
| Tell if an event group is supported by a given device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_gpu_create_counter (amdsmi_processor_handle processor_handle, amdsmi_event_type_t type, amdsmi_event_handle_t *evnt_handle) |
| Create a performance counter object. | |
| amdsmi_status_t | amdsmi_gpu_destroy_counter (amdsmi_event_handle_t evnt_handle) |
| Deallocate a performance counter object. | |
| amdsmi_status_t | amdsmi_gpu_control_counter (amdsmi_event_handle_t evt_handle, amdsmi_counter_command_t cmd, void *cmd_args) |
| Issue performance counter control commands. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_gpu_read_counter (amdsmi_event_handle_t evt_handle, amdsmi_counter_value_t *value) |
| Read the current value of a performance counter. | |
| amdsmi_status_t | amdsmi_get_gpu_available_counters (amdsmi_processor_handle processor_handle, amdsmi_event_group_t grp, uint32_t *available) |
| Get the number of currently available counters. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_process_info (amdsmi_process_info_t *procs, uint32_t *num_items) |
| Get process information about processes currently using GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_process_info_by_pid (uint32_t pid, amdsmi_process_info_t *proc) |
| Get process information about a specific process. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_process_gpus (uint32_t pid, uint32_t *dv_indices, uint32_t *num_devices) |
| Get the device indices currently being used by a process. | |
| amdsmi_status_t | amdsmi_gpu_xgmi_error_status (amdsmi_processor_handle processor_handle, amdsmi_xgmi_status_t *status) |
| Retrieve the XGMI error status for a device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_reset_gpu_xgmi_error (amdsmi_processor_handle processor_handle) |
| Reset the XGMI error status for a device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_xgmi_info (amdsmi_processor_handle processor_handle, amdsmi_xgmi_info_t *info) |
| Returns XGMI information for the GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_xgmi_link_status (amdsmi_processor_handle processor_handle, amdsmi_xgmi_link_status_t *link_status) |
| Get the XGMI link status. | |
| amdsmi_status_t | amdsmi_get_link_metrics (amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics) |
| Return link metric information. | |
| amdsmi_status_t | amdsmi_topo_get_numa_node_number (amdsmi_processor_handle processor_handle, uint32_t *numa_node) |
| Retrieve the NUMA CPU node number for a device. | |
| amdsmi_status_t | amdsmi_topo_get_link_weight (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *weight) |
| Retrieve the weight for a connection between 2 GPUs. | |
| amdsmi_status_t | amdsmi_get_minmax_bandwidth_between_processors (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *min_bandwidth, uint64_t *max_bandwidth) |
| Retrieve minimal and maximal io link bandwidth between 2 GPUs. | |
| amdsmi_status_t | amdsmi_topo_get_link_type (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *hops, amdsmi_link_type_t *type) |
| Retrieve the hops and the connection type between 2 GPUs. | |
| amdsmi_status_t | amdsmi_get_link_topology_nearest (amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info) |
| Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level. | |
| amdsmi_status_t | amdsmi_is_P2P_accessible (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, bool *accessible) |
| Return P2P availability status between 2 GPUs. | |
| amdsmi_status_t | amdsmi_topo_get_p2p_status (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap) |
| Retrieve connection type and P2P capabilities between 2 GPUs. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_partition (amdsmi_processor_handle processor_handle, char *compute_partition, uint32_t len) |
| Retrieves the current compute partitioning for a desired device. | |
| amdsmi_status_t | amdsmi_set_gpu_compute_partition (amdsmi_processor_handle processor_handle, amdsmi_compute_partition_type_t compute_partition) |
| Modifies a selected device's compute partition setting. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_partition (amdsmi_processor_handle processor_handle, char *memory_partition, uint32_t len) |
| Retrieves the current memory partition for a desired device. | |
| amdsmi_status_t | amdsmi_set_gpu_memory_partition (amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t memory_partition) |
| Modifies a selected device's current memory partition setting. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_partition_config (amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config) |
| Returns current gpu memory partition capabilities. | |
| amdsmi_status_t | amdsmi_set_gpu_memory_partition_mode (amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode) |
| Sets memory partition mode Set memory partition setting based on memory_partition mode from amdsmi_get_gpu_memory_partition_config. | |
| amdsmi_status_t | amdsmi_get_gpu_accelerator_partition_profile_config (amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config) |
| Returns gpu accelerator partition caps as currently configured in the system. | |
| amdsmi_status_t | amdsmi_get_gpu_accelerator_partition_profile (amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id) |
| Returns current gpu accelerator partition cap. | |
| amdsmi_status_t | amdsmi_set_gpu_accelerator_partition_profile (amdsmi_processor_handle processor_handle, uint32_t profile_index) |
| Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_profile_config. | |
| amdsmi_status_t | amdsmi_init_gpu_event_notification (amdsmi_processor_handle processor_handle) |
| Prepare to collect event notifications for a GPU. | |
| amdsmi_status_t | amdsmi_set_gpu_event_notification_mask (amdsmi_processor_handle processor_handle, uint64_t mask) |
| Specify which events to collect for a device. | |
| amdsmi_status_t | amdsmi_get_gpu_event_notification (int timeout_ms, uint32_t *num_elem, amdsmi_evt_notification_data_t *data) |
| Collect event notifications, waiting a specified amount of time. | |
| amdsmi_status_t | amdsmi_stop_gpu_event_notification (amdsmi_processor_handle processor_handle) |
| Close any file handles and free any resources used by event notification for a GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_driver_info (amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info) |
| Returns the driver version information. | |
| amdsmi_status_t | amdsmi_get_gpu_asic_info (amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info) |
| Returns the ASIC information for the device. | |
| amdsmi_status_t | amdsmi_get_gpu_kfd_info (amdsmi_processor_handle processor_handle, amdsmi_kfd_info_t *info) |
| Returns the KFD (Kernel Fusion Driver) information for the device. | |
| amdsmi_status_t | amdsmi_get_gpu_vram_info (amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info) |
| Returns vram info. | |
| amdsmi_status_t | amdsmi_get_gpu_board_info (amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info) |
| Returns the board part number and board information for the requested device. | |
| amdsmi_status_t | amdsmi_get_power_cap_info (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info) |
| Returns the power caps as currently configured in the system. | |
| amdsmi_status_t | amdsmi_get_pcie_info (amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info) |
| Returns the PCIe info for the GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_xcd_counter (amdsmi_processor_handle processor_handle, uint16_t *xcd_count) |
| Returns the 'xcd_counter' from the GPU metrics associated with the device. | |
| amdsmi_status_t | amdsmi_get_npm_info (amdsmi_node_handle node_handle, amdsmi_npm_info_t *info) |
| Retrieves node power management (NPM) status and power limit for the specified node. | |
| amdsmi_status_t | amdsmi_get_fw_info (amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info) |
| Returns the firmware versions running on the device. | |
| amdsmi_status_t | amdsmi_get_gpu_vbios_info (amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info) |
| Returns the static information for the vBIOS on the device. | |
| amdsmi_status_t | amdsmi_get_temp_metric (amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature) |
| Get the temperature metric value for the specified metric, from the specified temperature sensor on the specified device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_activity (amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info) |
| Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentage from 0-100%. | |
| amdsmi_status_t | amdsmi_get_power_info (amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info) |
| Returns the current power and voltage of the GPU. | |
| amdsmi_status_t | amdsmi_is_gpu_power_management_enabled (amdsmi_processor_handle processor_handle, bool *enabled) |
| Returns is power management enabled. | |
| amdsmi_status_t | amdsmi_get_clock_info (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info) |
| Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory. This call reports the averages over 1s in MHz. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_vram_usage (amdsmi_processor_handle processor_handle, amdsmi_vram_usage_t *info) |
| Returns the VRAM usage (both total and used memory) in MegaBytes. | |
| amdsmi_status_t | amdsmi_get_violation_status (amdsmi_processor_handle processor_handle, amdsmi_violation_status_t *info) |
| Returns the violations for a processor. | |
| amdsmi_status_t | amdsmi_get_gpu_process_list (amdsmi_processor_handle processor_handle, uint32_t *max_processes, amdsmi_proc_info_t *list) |
| Returns the list of process information running on a given GPU. If pdh.dll is not present on the system, this API returns AMDSMI_STATUS_NOT_SUPPORTED. Sum of the process memory is not expected to be the total memory usage. | |
| amdsmi_status_t | amdsmi_gpu_driver_reload (void) |
| Restart the device driver (kmod module) for all AMD GPUs on the system. | |
| amdsmi_status_t | amdsmi_get_gpu_ptl_state (amdsmi_processor_handle processor_handle, bool *enabled) |
| Get PTL enable/disable state. | |
| amdsmi_status_t | amdsmi_set_gpu_ptl_state (amdsmi_processor_handle processor_handle, bool enable) |
| Set PTL enable/disable state. | |
| amdsmi_status_t | amdsmi_get_gpu_ptl_formats (amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t *data_format1, amdsmi_ptl_data_format_t *data_format2) |
| Get PTL (Peak Tops Limiter) formats for the processor. | |
| amdsmi_status_t | amdsmi_set_gpu_ptl_formats (amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t data_format1, amdsmi_ptl_data_format_t data_format2) |
| Set PTL with specified preferred data formats. | |
| amdsmi_status_t | amdsmi_get_cpu_handles (uint32_t *cpu_count, amdsmi_processor_handle *processor_handles) |
| Get the list of cpu handles in the system. | |
| amdsmi_status_t | amdsmi_get_cpucore_handles (uint32_t *cores_count, amdsmi_processor_handle *processor_handles) |
| Get the list of the cpu core handles in a system. | |
| amdsmi_status_t | amdsmi_get_cpu_core_energy (amdsmi_processor_handle processor_handle, uint64_t *penergy) |
| Get the core energy for a given core. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_energy (amdsmi_processor_handle processor_handle, uint64_t *penergy) |
| Get the socket energy for a given socket. | |
| amdsmi_status_t | amdsmi_get_threads_per_core (uint32_t *threads_per_core) |
| Get Number of threads Per Core. | |
| amdsmi_status_t | amdsmi_get_cpu_hsmp_driver_version (amdsmi_processor_handle processor_handle, amdsmi_hsmp_driver_version_t *amdsmi_hsmp_driver_ver) |
| Get HSMP Driver Version. | |
| amdsmi_status_t | amdsmi_get_cpu_smu_fw_version (amdsmi_processor_handle processor_handle, amdsmi_smu_fw_version_t *amdsmi_smu_fw) |
| Get SMU Firmware Version. | |
| amdsmi_status_t | amdsmi_get_cpu_hsmp_proto_ver (amdsmi_processor_handle processor_handle, uint32_t *proto_ver) |
| Get HSMP protocol Version. | |
| amdsmi_status_t | amdsmi_get_cpu_prochot_status (amdsmi_processor_handle processor_handle, uint32_t *prochot) |
| Get normalized status of the processor's PROCHOT status. | |
| amdsmi_status_t | amdsmi_get_cpu_fclk_mclk (amdsmi_processor_handle processor_handle, uint32_t *fclk, uint32_t *mclk) |
| Get Data fabric clock and Memory clock in MHz. | |
| amdsmi_status_t | amdsmi_get_cpu_cclk_limit (amdsmi_processor_handle processor_handle, uint32_t *cclk) |
| Get core clock in MHz. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_current_active_freq_limit (amdsmi_processor_handle processor_handle, uint16_t *freq, char **src_type) |
| Get current active frequency limit of the socket. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_freq_range (amdsmi_processor_handle processor_handle, uint16_t *fmax, uint16_t *fmin) |
| Get socket frequency range. | |
| amdsmi_status_t | amdsmi_get_cpu_core_current_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *freq) |
| Get socket frequency limit of the core. | |
| amdsmi_status_t | amdsmi_set_cpu_rail_isofreq_policy (amdsmi_processor_handle processor_handle, bool *rail_isofreq_policy) |
| Set CPU rail isolated frequency policy for independent core clock control per power rail. | |
| amdsmi_status_t | amdsmi_get_cpu_rail_isofreq_policy (amdsmi_processor_handle processor_handle, uint8_t *rail_isofreq_policy) |
| Get CPU rail isolated frequency policy status for independent core clock control per power rail. | |
| amdsmi_status_t | amdsmi_set_cpu_dfc_ctrl (amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl) |
| Set the DFCState enabling control. | |
| amdsmi_status_t | amdsmi_get_cpu_dfc_ctrl (amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl) |
| Get the current DFCState enabling control status. | |
| amdsmi_status_t | amdsmi_get_cpu_core_boostlimit (amdsmi_processor_handle processor_handle, uint32_t *pboostlimit) |
| Get the core boost limit. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_c0_residency (amdsmi_processor_handle processor_handle, uint32_t *pc0_residency) |
| Get the socket c0 residency. | |
| amdsmi_status_t | amdsmi_set_cpu_core_boostlimit (amdsmi_processor_handle processor_handle, uint32_t boostlimit) |
| Set the core boostlimit value. | |
| amdsmi_status_t | amdsmi_set_cpu_socket_boostlimit (amdsmi_processor_handle processor_handle, uint32_t boostlimit) |
| Set the socket boostlimit value. | |
| amdsmi_status_t | amdsmi_get_cpu_core_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *floor_freq) |
| Get the CPU core floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *floor_freq) |
| Get the CPU floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_core_eff_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq) |
| Get the CPU core effective floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_eff_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq) |
| Get the CPU effective floor limit frequency. | |
| amdsmi_status_t | amdsmi_set_cpu_core_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t floor_freq) |
| Set the CPU core floor limit frequency. | |
| amdsmi_status_t | amdsmi_set_cpu_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t floor_freq) |
| Set the CPU socket floor limit frequency. | |
| amdsmi_status_t | amdsmi_set_cpu_msr_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq) |
| Set CPU floor limit frequency via MSR(Model Specific Register). | |
| amdsmi_status_t | amdsmi_set_cpu_core_msr_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq) |
| Set CPU core MSR floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_freq_range (uint32_t *fmax, uint32_t *fmin) |
| Get the CPU socket frequency range. | |
| amdsmi_status_t | amdsmi_set_cpu_sdps_limit (amdsmi_processor_handle processor_handle, uint32_t sdps_limit) |
| Set the SDPS(Socket DIMM Power Sloshing) limit for a given processor socket. | |
| amdsmi_status_t | amdsmi_get_cpu_sdps_limit (amdsmi_processor_handle processor_handle, uint32_t *sdps_limit) |
| Get the current SDPS limit for a given processor socket. | |
| amdsmi_status_t | amdsmi_get_cpu_ddr_bw (amdsmi_processor_handle processor_handle, amdsmi_ddr_bw_metrics_t *ddr_bw) |
| Get the DDR bandwidth data. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_temperature (amdsmi_processor_handle processor_handle, uint32_t *ptmon) |
| Get socket temperature. | |
| amdsmi_status_t | amdsmi_get_cpu_tdelta (amdsmi_processor_handle processor_handle, uint8_t *tdelta) |
| Read Thermal Delta (TDELTA) Behavior. | |
| amdsmi_status_t | amdsmi_get_cpu_svi3_vr_controller_temp (amdsmi_processor_handle processor_handle, uint32_t *rail_selection, uint32_t *rail_index, uint32_t *temp) |
| Get Temperature of SVI3 VR(Voltage Rail) | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_temp_range_and_refresh_rate (amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_temp_range_refresh_rate_t *rate) |
| Get DIMM temperature range and refresh rate. | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_power_consumption (amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_power_t *dimm_pow) |
| Get DIMM power consumption. | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_thermal_sensor (amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_thermal_t *dimm_temp) |
| Get DIMM thermal sensor value. | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_sb_reg (amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t *data) |
| Read DIMM sideband register data. | |
| amdsmi_status_t | amdsmi_set_cpu_dimm_sb_reg (amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t write_data) |
| Write Data to DIMM Sideband Register. | |
| amdsmi_status_t | amdsmi_set_cpu_xgmi_width (amdsmi_processor_handle processor_handle, uint8_t min, uint8_t max) |
| Set xgmi width. | |
| amdsmi_status_t | amdsmi_set_cpu_gmi3_link_width_range (amdsmi_processor_handle processor_handle, uint8_t min_link_width, uint8_t max_link_width) |
| Set gmi3 link width range. | |
| amdsmi_status_t | amdsmi_cpu_apb_enable (amdsmi_processor_handle processor_handle) |
| Enable APB. | |
| amdsmi_status_t | amdsmi_cpu_apb_disable (amdsmi_processor_handle processor_handle, uint8_t pstate) |
| Disable APB. | |
| amdsmi_status_t | amdsmi_set_cpu_socket_lclk_dpm_level (amdsmi_processor_handle processor_handle, uint8_t nbio_id, uint8_t min, uint8_t max) |
| Set NBIO lclk dpm level value. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_lclk_dpm_level (amdsmi_processor_handle processor_handle, uint8_t nbio_id, amdsmi_dpm_level_t *nbio) |
| Get NBIO LCLK dpm level. | |
| amdsmi_status_t | amdsmi_set_cpu_pcie_link_rate (amdsmi_processor_handle processor_handle, uint8_t rate_ctrl, uint8_t *prev_mode) |
| Set pcie link rate. | |
| amdsmi_status_t | amdsmi_set_cpu_df_pstate_range (amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate) |
| Set df pstate range. | |
| amdsmi_status_t | amdsmi_set_cpu_xgmi_pstate_range (amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate) |
| Set the Min and Max XGMI PState Range. | |
| amdsmi_status_t | amdsmi_get_cpu_xgmi_pstate_range (amdsmi_processor_handle processor_handle, uint8_t *min_pstate, uint8_t *max_pstate) |
| Get the Max and Min XGMI PState Range. | |
| amdsmi_status_t | amdsmi_get_cpu_pc6_enable (amdsmi_processor_handle processor_handle, uint8_t *enabled) |
| Get the PC6 Enable State. | |
| amdsmi_status_t | amdsmi_set_cpu_pc6_enable (amdsmi_processor_handle processor_handle, uint8_t enable) |
| Set the PC6 Enable State. | |
| amdsmi_status_t | amdsmi_get_cpu_cc6_enable (amdsmi_processor_handle processor_handle, uint8_t *enabled) |
| Get the Core C6 Enable State. | |
| amdsmi_status_t | amdsmi_set_cpu_cc6_enable (amdsmi_processor_handle processor_handle, uint8_t enable) |
| Set the Core C6 Enable State. | |
| amdsmi_status_t | amdsmi_get_cpu_current_io_bandwidth (amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *io_bw) |
| Get current input output bandwidth. | |
| amdsmi_status_t | amdsmi_get_cpu_current_xgmi_bw (amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *xgmi_bw) |
| Get current input output bandwidth. | |
| amdsmi_status_t | amdsmi_get_hsmp_metrics_table_version (amdsmi_processor_handle processor_handle, uint32_t *metrics_version) |
| Get HSMP metrics table version. | |
| amdsmi_status_t | amdsmi_get_hsmp_metrics_table (amdsmi_processor_handle processor_handle, amdsmi_hsmp_metrics_table_t *metrics_table) |
| Get HSMP metrics table. | |
| amdsmi_status_t | amdsmi_first_online_core_on_cpu_socket (amdsmi_processor_handle processor_handle, uint32_t *pcore_ind) |
| Get first online core on socket. | |
| amdsmi_status_t | amdsmi_get_cpu_family (uint32_t *cpu_family) |
| Get CPU family. | |
| amdsmi_status_t | amdsmi_get_cpu_model (uint32_t *cpu_model) |
| Get CPU model. | |
| amdsmi_status_t | amdsmi_get_cpu_model_name (amdsmi_processor_handle processor_handle, amdsmi_cpu_info_t *cpu_info) |
| Retrieve the CPU processor model name based on the processor index. | |
| amdsmi_status_t | amdsmi_get_esmi_err_msg (amdsmi_status_t status, const char **status_string) |
| Get a description of provided AMDSMI error status for esmi errors. | |
| amdsmi_status_t | amdsmi_get_cpu_cores_per_socket (uint32_t sock_count, amdsmi_sock_info_t *soc_info) |
| Get cpu cores per socket from sys filesystem. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_count (uint32_t *sock_count) |
| Get CPU socket count from sys filesystem. | |
| amdsmi_status_t | amdsmi_get_cpu_enabled_commands (amdsmi_processor_handle processor_handle, bool *r_mask, uint32_t *mask0, uint32_t *mask1, uint32_t *mask2) |
| Get HSMP Enabled Commands information for a given CPU socket. | |
| amdsmi_status_t | amdsmi_get_nic_driver_info (amdsmi_processor_handle processor_handle, amdsmi_nic_driver_info_t *info) |
| Retrieves information about the NIC driver. | |
| amdsmi_status_t | amdsmi_get_nic_asic_info (amdsmi_processor_handle processor_handle, amdsmi_nic_asic_info_t *info) |
| Retrieves ASIC information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_bus_info (amdsmi_processor_handle processor_handle, amdsmi_nic_bus_info_t *info) |
| Retrieves BUS information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_numa_info (amdsmi_processor_handle processor_handle, amdsmi_nic_numa_info_t *info) |
| Retrieves NUMA information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_port_info (amdsmi_processor_handle processor_handle, amdsmi_nic_port_info_t *info) |
| Retrieves PORT information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_rdma_dev_info (amdsmi_processor_handle processor_handle, amdsmi_nic_rdma_devices_info_t *info) |
| Retrieves RDMA devices information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_rdma_port_statistics (amdsmi_processor_handle processor_handle, uint32_t rdma_port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats) |
| Retrieve RDMA port statistics for the NIC. | |
| amdsmi_status_t | amdsmi_get_gpu_uma_carveout_info (amdsmi_processor_handle processor_handle, amdsmi_uma_carveout_info_t *info) |
| Get UMA carveout configuration information. | |
| amdsmi_status_t | amdsmi_set_gpu_uma_carveout (amdsmi_processor_handle processor_handle, uint32_t option_index) |
| Set UMA carveout configuration. | |
| amdsmi_status_t | amdsmi_get_ttm_info (amdsmi_ttm_info_t *info) |
| Get TTM configuration information. | |
| amdsmi_status_t | amdsmi_set_ttm_pages_limit (uint64_t pages) |
| Set TTM pages limit. | |
| amdsmi_status_t | amdsmi_reset_ttm_pages_limit (void) |
| Reset TTM pages limit to system default. | |
Detailed Description
AMD System Management Interface API.
Definition in file amdsmi.h.
Macro Definition Documentation
◆ AMDSMI_MAX_MM_IP_COUNT
| #define AMDSMI_MAX_MM_IP_COUNT 8 |
◆ AMDSMI_MAX_STRING_LENGTH
| #define AMDSMI_MAX_STRING_LENGTH 256 |
◆ AMDSMI_MAX_DEVICES
| #define AMDSMI_MAX_DEVICES 32 |
◆ AMDSMI_MAX_CACHE_TYPES
| #define AMDSMI_MAX_CACHE_TYPES 10 |
◆ AMDSMI_MAX_ACCELERATOR_PROFILE
| #define AMDSMI_MAX_ACCELERATOR_PROFILE 32 |
◆ AMDSMI_MAX_CP_PROFILE_RESOURCES
| #define AMDSMI_MAX_CP_PROFILE_RESOURCES 32 |
◆ AMDSMI_MAX_ACCELERATOR_PARTITIONS
| #define AMDSMI_MAX_ACCELERATOR_PARTITIONS 8 |
◆ AMDSMI_MAX_NUM_NUMA_NODES
| #define AMDSMI_MAX_NUM_NUMA_NODES 32 |
◆ AMDSMI_GPU_UUID_SIZE
◆ AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK
| #define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64 |
◆ AMDSMI_MAX_CONTAINER_TYPE
| #define AMDSMI_MAX_CONTAINER_TYPE 2 |
◆ CENTRIGRADE_TO_MILLI_CENTIGRADE
| #define CENTRIGRADE_TO_MILLI_CENTIGRADE 1000 |
◆ AMDSMI_NUM_HBM_INSTANCES
| #define AMDSMI_NUM_HBM_INSTANCES 4 |
◆ AMDSMI_MAX_NUM_VCN
| #define AMDSMI_MAX_NUM_VCN 4 |
◆ AMDSMI_MAX_NUM_CLKS
| #define AMDSMI_MAX_NUM_CLKS 4 |
◆ AMDSMI_MAX_NUM_XGMI_LINKS
| #define AMDSMI_MAX_NUM_XGMI_LINKS 8 |
◆ AMDSMI_MAX_NUM_GFX_CLKS
| #define AMDSMI_MAX_NUM_GFX_CLKS 8 |
◆ AMDSMI_MAX_AID
◆ AMDSMI_MAX_ENGINES
| #define AMDSMI_MAX_ENGINES 8 |
◆ AMDSMI_MAX_NUM_JPEG
| #define AMDSMI_MAX_NUM_JPEG 32 |
◆ AMDSMI_MAX_NUM_JPEG_ENG_V1
| #define AMDSMI_MAX_NUM_JPEG_ENG_V1 40 |
◆ AMDSMI_MAX_NUM_XCC
| #define AMDSMI_MAX_NUM_XCC 8 |
This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units, ACE (Asynchronous Compute Engines), caches, and global resources organized as one unit.
Refer to amd.com documentation for more detail: https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/white-papers/amd-cdna-3-white-paper.pdf
◆ AMDSMI_MAX_NUM_XCP
| #define AMDSMI_MAX_NUM_XCP 8 |
This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Graphics Compute Partitions. Each physical gpu could have a maximum of 8 separate partitions associated with each (depending on ASIC support).
Refer to amd.com documentation for more detail: https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/white-papers/amd-cdna-3-white-paper.pdf
◆ AMDSMI_APU_MAX_CORES
| #define AMDSMI_APU_MAX_CORES 16 |
◆ AMDSMI_APU_V24_CORES
◆ AMDSMI_APU_MAX_L3
◆ AMDSMI_APU_MAX_IPU
◆ MAX_NUMBER_OF_AFIDS_PER_RECORD
| #define MAX_NUMBER_OF_AFIDS_PER_RECORD 12 |
◆ AMDSMI_MAX_VF_COUNT
| #define AMDSMI_MAX_VF_COUNT 32 |
◆ AMDSMI_MAX_DRIVER_NUM
◆ AMDSMI_DFC_FW_NUMBER_OF_ENTRIES
| #define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9 |
◆ AMDSMI_MAX_WHITE_LIST_ELEMENTS
| #define AMDSMI_MAX_WHITE_LIST_ELEMENTS 16 |
◆ AMDSMI_MAX_BLACK_LIST_ELEMENTS
| #define AMDSMI_MAX_BLACK_LIST_ELEMENTS 64 |
◆ AMDSMI_MAX_UUID_ELEMENTS
| #define AMDSMI_MAX_UUID_ELEMENTS 16 |
◆ AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS
| #define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS 8 |
◆ AMDSMI_MAX_ERR_RECORDS
| #define AMDSMI_MAX_ERR_RECORDS 10 |
◆ AMDSMI_MAX_PROFILE_COUNT
| #define AMDSMI_MAX_PROFILE_COUNT 16 |
◆ AMDSMI_MAX_NUM_HBM_STACKS
| #define AMDSMI_MAX_NUM_HBM_STACKS 12 |
◆ AMDSMI_MAX_NUM_AID
| #define AMDSMI_MAX_NUM_AID 2 |
◆ AMDSMI_MAX_NUM_MID
| #define AMDSMI_MAX_NUM_MID 2 |
◆ AMDSMI_MAX_NUM_CLKS_PER_AID
| #define AMDSMI_MAX_NUM_CLKS_PER_AID 2 |
◆ AMDSMI_MAX_NUM_CLKS_PER_MID
| #define AMDSMI_MAX_NUM_CLKS_PER_MID 2 |
◆ AMDSMI_TIME_FORMAT
| #define AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d" |
◆ AMDSMI_DATE_FORMAT
| #define AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d" |
◆ AMDSMI_LIB_VERSION_MAJOR
| #define AMDSMI_LIB_VERSION_MAJOR 26 |
◆ AMDSMI_LIB_VERSION_MINOR
| #define AMDSMI_LIB_VERSION_MINOR 4 |
◆ AMDSMI_LIB_VERSION_RELEASE
| #define AMDSMI_LIB_VERSION_RELEASE 0 |
◆ AMDSMI_LIB_VERSION_CREATE_STRING
| #define AMDSMI_LIB_VERSION_CREATE_STRING | ( | MAJOR, | |
| MINOR, | |||
| RELEASE | |||
| ) | (#MAJOR "." #MINOR "." #RELEASE) |
◆ AMDSMI_LIB_VERSION_EXPAND_PARTS
| #define AMDSMI_LIB_VERSION_EXPAND_PARTS | ( | MAJOR_STR, | |
| MINOR_STR, | |||
| RELEASE_STR | |||
| ) | AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR_STR, MINOR_STR, RELEASE_STR) |
Definition at line 253 of file amdsmi.h.
272 {
273 AMDSMI_MM_UVD,
274 AMDSMI_MM_VCE,
275 AMDSMI_MM_VCN,
276 AMDSMI_MM__MAX
277} amdsmi_mm_ip_t;
278
284typedef enum {
285 AMDSMI_CONTAINER_LXC,
287} amdsmi_container_types_t;
288
295typedef void* amdsmi_socket_handle;
296
303
304#ifdef ENABLE_ESMI_LIB
305
312
318typedef struct {
319 uint32_t major;
320 uint32_t minor;
322
328#define AMDSMI_MAX_SPD_DIMM_ADDRESS 0xFF
329#define AMDSMI_MAX_SPD_LID 0xF
330#define AMDSMI_MAX_SPD_REG_OFFSET 0x7FF
331#define AMDSMI_MAX_SPD_REG_SPACE 0x1
332#define AMDSMI_MAX_SPD_WRITE_DATA 0xFF
333#define MAX_SVI3_RAIL_INDEX 4
334#define MAX_SVI3_RAIL_SELECTION 1
335#define POWER_EFFICIENCY_MODE_4 0x4
336#define POWER_EFFICIENCY_MODE_5 0x5
337#define AMDSMI_MAX_POWER_EFFICIENCY_UTIL 0x7F
338#define AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT 0x1FFFFF
339#define AMDSMI_RAIL_INDEX_NONE 0xFFFFFFFF
340
341#endif
342
348typedef enum {
349 AMDSMI_PROCESSOR_TYPE_UNKNOWN = 0,
360} amdsmi_processor_type_t;
361
372
381typedef enum {
382 AMDSMI_STATUS_SUCCESS = 0,
383 // Library usage errors
384 AMDSMI_STATUS_INVAL = 1,
385 AMDSMI_STATUS_NOT_SUPPORTED = 2,
386 AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,
387 AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,
388 AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,
389 AMDSMI_STATUS_DRM_ERROR = 6,
390 AMDSMI_STATUS_API_FAILED = 7,
391 AMDSMI_STATUS_TIMEOUT = 8,
392 AMDSMI_STATUS_RETRY = 9,
393 AMDSMI_STATUS_NO_PERM = 10,
394 AMDSMI_STATUS_INTERRUPT = 11,
395 AMDSMI_STATUS_IO = 12,
396 AMDSMI_STATUS_ADDRESS_FAULT = 13,
397 AMDSMI_STATUS_FILE_ERROR = 14,
398 AMDSMI_STATUS_OUT_OF_RESOURCES = 15,
399 AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,
400 AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,
401 AMDSMI_STATUS_INIT_ERROR = 18,
402 AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,
403 AMDSMI_STATUS_DIRECTORY_NOT_FOUND = 20,
404 AMDSMI_STATUS_IPC_ERROR = 21,
405 // Processor related errors
406 AMDSMI_STATUS_BUSY = 30,
407 AMDSMI_STATUS_NOT_FOUND = 31,
408 AMDSMI_STATUS_NOT_INIT = 32,
409 AMDSMI_STATUS_NO_SLOT = 33,
410 AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,
411 // Data and size errors
412 AMDSMI_STATUS_MORE_DATA = 39,
413 AMDSMI_STATUS_NO_DATA = 40,
414 AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,
415 AMDSMI_STATUS_UNEXPECTED_SIZE = 42,
416 AMDSMI_STATUS_UNEXPECTED_DATA = 43,
417 // esmi errors
418 AMDSMI_STATUS_NON_AMD_CPU = 44,
419 AMDSMI_STATUS_NO_ENERGY_DRV = 45,
420 AMDSMI_STATUS_NO_MSR_DRV = 46,
421 AMDSMI_STATUS_NO_HSMP_DRV = 47,
422 AMDSMI_STATUS_NO_HSMP_SUP = 48,
423 AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,
424 AMDSMI_STATUS_HSMP_TIMEOUT = 50,
425 AMDSMI_STATUS_NO_DRV = 51,
426 AMDSMI_STATUS_FILE_NOT_FOUND = 52,
427 AMDSMI_STATUS_ARG_PTR_NULL = 53,
428 AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,
429 AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,
430 AMDSMI_STATUS_CORRUPTED_EEPROM = 56,
431 // General errors
432 AMDSMI_STATUS_MAP_ERROR = 0xFFFFFFFE,
433 AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF
434} amdsmi_status_t;
435
441typedef enum {
442 AMDSMI_CLK_TYPE_SYS = 0x0,
443 AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,
445 AMDSMI_CLK_TYPE_DF,
447 AMDSMI_CLK_TYPE_DCEF,
449 AMDSMI_CLK_TYPE_SOC,
450 AMDSMI_CLK_TYPE_MEM,
451 AMDSMI_CLK_TYPE_PCIE,
456 AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1
457} amdsmi_clk_type_t;
458
464typedef enum {
465 AMDSMI_ACCELERATOR_PARTITION_INVALID = 0,
476 AMDSMI_ACCELERATOR_PARTITION_MAX
478
484typedef enum {
490 AMDSMI_ACCELERATOR_MAX
492
499typedef enum {
500 AMDSMI_COMPUTE_PARTITION_INVALID = 0,
512
518typedef enum {
519 AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
520 AMDSMI_MEMORY_PARTITION_NPS1 = 1,
522 AMDSMI_MEMORY_PARTITION_NPS2 = 2,
525 AMDSMI_MEMORY_PARTITION_NPS4 = 4,
528 AMDSMI_MEMORY_PARTITION_NPS8 = 8,
534
541typedef enum {
543 AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
552
553 // GPU Board Node temperature
554 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST = 100,
556 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST,
565 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_LAST = 149,
566
567 // GPU Board VR (Voltage Regulator) temperature
568 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST = 150,
570 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST,
585 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_LAST = 199,
586
587 // Baseboard System temperature
588 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST = 200,
590 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST,
623 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST = 249,
625 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST
627
634typedef enum {
635 AMDSMI_FW_ID_SMU = 1,
637 AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
638 AMDSMI_FW_ID_CP_CE,
639 AMDSMI_FW_ID_CP_PFP,
640 AMDSMI_FW_ID_CP_ME,
645 AMDSMI_FW_ID_CP_MEC1,
647 AMDSMI_FW_ID_CP_MEC2,
649 AMDSMI_FW_ID_RLC,
650 AMDSMI_FW_ID_SDMA0,
651 AMDSMI_FW_ID_SDMA1,
652 AMDSMI_FW_ID_SDMA2,
653 AMDSMI_FW_ID_SDMA3,
654 AMDSMI_FW_ID_SDMA4,
655 AMDSMI_FW_ID_SDMA5,
656 AMDSMI_FW_ID_SDMA6,
657 AMDSMI_FW_ID_SDMA7,
658 AMDSMI_FW_ID_VCN,
659 AMDSMI_FW_ID_UVD,
660 AMDSMI_FW_ID_VCE,
661 AMDSMI_FW_ID_ISP,
670 AMDSMI_FW_ID_RLC_V,
671 AMDSMI_FW_ID_MMSCH,
674 AMDSMI_FW_ID_PSP_TOC,
676 AMDSMI_FW_ID_DFC,
677 AMDSMI_FW_ID_PSP_SPL,
678 AMDSMI_FW_ID_DRV_CAP,
679 AMDSMI_FW_ID_MC,
680 AMDSMI_FW_ID_PSP_BL,
681 AMDSMI_FW_ID_CP_PM4,
682 AMDSMI_FW_ID_RLC_P,
689 AMDSMI_FW_ID_CP_MES,
690 AMDSMI_FW_ID_MES_KIQ,
694 AMDSMI_FW_ID_RLX6,
696 AMDSMI_FW_ID_RS64_ME,
713 AMDSMI_FW_ID_PPTABLE,
714 AMDSMI_FW_ID_PSP_SOC,
715 AMDSMI_FW_ID_PSP_DBG,
721 AMDSMI_FW_ID_ASD,
722 AMDSMI_FW_ID_TA_RAS,
723 AMDSMI_FW_ID_TA_XGMI,
726 AMDSMI_FW_ID_PM,
727 AMDSMI_FW_ID_DMCU,
729 AMDSMI_FW_ID__MAX
730} amdsmi_fw_block_t;
731
737typedef enum {
738 AMDSMI_VRAM_TYPE_UNKNOWN = 0,
739 // HBM
740 AMDSMI_VRAM_TYPE_HBM = 1,
741 AMDSMI_VRAM_TYPE_HBM2 = 2,
742 AMDSMI_VRAM_TYPE_HBM2E = 3,
743 AMDSMI_VRAM_TYPE_HBM3 = 4,
744 AMDSMI_VRAM_TYPE_HBM3E = 5,
745 // DDR
746 AMDSMI_VRAM_TYPE_DDR2 = 10,
747 AMDSMI_VRAM_TYPE_DDR3 = 11,
748 AMDSMI_VRAM_TYPE_DDR4 = 12,
749 AMDSMI_VRAM_TYPE_DDR5 = 13,
750 // GDDR
751 AMDSMI_VRAM_TYPE_GDDR1 = 17,
752 AMDSMI_VRAM_TYPE_GDDR2 = 18,
753 AMDSMI_VRAM_TYPE_GDDR3 = 19,
754 AMDSMI_VRAM_TYPE_GDDR4 = 20,
755 AMDSMI_VRAM_TYPE_GDDR5 = 21,
756 AMDSMI_VRAM_TYPE_GDDR6 = 22,
757 AMDSMI_VRAM_TYPE_GDDR7 = 23,
758 // LPDDR
759 AMDSMI_VRAM_TYPE_LPDDR4 = 30,
760 AMDSMI_VRAM_TYPE_LPDDR5 = 31,
761 AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_LPDDR5
762} amdsmi_vram_type_t;
763
769typedef struct {
770 uint64_t lower_bound;
771 uint64_t upper_bound;
772 uint64_t reserved[2];
773} amdsmi_range_t;
774
780typedef struct {
781 uint8_t xgmi_lanes;
782 uint64_t xgmi_hive_id;
783 uint64_t xgmi_node_id;
784 uint32_t index;
785 uint32_t reserved[9];
786} amdsmi_xgmi_info_t;
787
793typedef struct {
794 uint32_t vram_total;
795 uint32_t vram_used;
796 uint32_t reserved[2];
797} amdsmi_vram_usage_t;
798
805typedef struct {
806 uint64_t reference_timestamp;
807 uint64_t violation_timestamp;
809 uint64_t acc_counter;
810 uint64_t acc_prochot_thrm;
812 uint64_t acc_ppt_pwr;
814 uint64_t acc_socket_thrm;
816 uint64_t acc_vr_thrm;
818 uint64_t acc_hbm_thrm;
820 uint64_t acc_gfx_clk_below_host_limit;
827 uint64_t per_prochot_thrm;
829 uint64_t per_ppt_pwr;
831 uint64_t per_socket_thrm;
833 uint64_t per_vr_thrm;
835 uint64_t per_hbm_thrm;
837 uint64_t per_gfx_clk_below_host_limit;
844 uint8_t active_prochot_thrm;
846 uint8_t active_ppt_pwr;
848 uint8_t active_socket_thrm;
850 uint8_t active_vr_thrm;
852 uint8_t active_hbm_thrm;
854 uint8_t active_gfx_clk_below_host_limit;
858 // GPU metrics 1.8 violations
859 uint64_t acc_gfx_clk_below_host_limit_pwr[AMDSMI_MAX_NUM_XCP]
860 [AMDSMI_MAX_NUM_XCC];
865 uint64_t acc_gfx_clk_below_host_limit_thm[AMDSMI_MAX_NUM_XCP]
866 [AMDSMI_MAX_NUM_XCC];
871 uint64_t acc_low_utilization[AMDSMI_MAX_NUM_XCP]
872 [AMDSMI_MAX_NUM_XCC];
875 uint64_t acc_gfx_clk_below_host_limit_total[AMDSMI_MAX_NUM_XCP]
876 [AMDSMI_MAX_NUM_XCC];
882 uint64_t per_gfx_clk_below_host_limit_pwr
883 [AMDSMI_MAX_NUM_XCP]
884 [AMDSMI_MAX_NUM_XCC];
886 uint64_t per_gfx_clk_below_host_limit_thm
887 [AMDSMI_MAX_NUM_XCP]
888 [AMDSMI_MAX_NUM_XCC];
890 uint64_t per_low_utilization[AMDSMI_MAX_NUM_XCP]
891 [AMDSMI_MAX_NUM_XCC];
894 uint64_t per_gfx_clk_below_host_limit_total
895 [AMDSMI_MAX_NUM_XCP]
896 [AMDSMI_MAX_NUM_XCC];
899 uint8_t active_gfx_clk_below_host_limit_pwr
900 [AMDSMI_MAX_NUM_XCP]
901 [AMDSMI_MAX_NUM_XCC];
903 uint8_t active_gfx_clk_below_host_limit_thm
907 uint8_t active_low_utilization[AMDSMI_MAX_NUM_XCP]
908 [AMDSMI_MAX_NUM_XCC];
911 uint8_t active_gfx_clk_below_host_limit_total
912 [AMDSMI_MAX_NUM_XCP]
913 [AMDSMI_MAX_NUM_XCC];
919
925typedef struct {
926 amdsmi_range_t supported_freq_range;
927 amdsmi_range_t current_freq_range;
928 uint32_t reserved[8];
929} amdsmi_frequency_range_t;
930
936typedef union {
937 struct bdf_ {
938 uint64_t function_number : 3;
939 uint64_t device_number : 5;
940 uint64_t bus_number : 8;
941 uint64_t domain_number : 48;
942 } bdf;
943 struct {
944 uint64_t function_number : 3;
945 uint64_t device_number : 5;
946 uint64_t bus_number : 8;
947 uint64_t domain_number : 48;
948 };
949 uint64_t as_uint;
950} amdsmi_bdf_t;
951
957typedef struct {
958 uint32_t drm_render;
959 uint32_t drm_card;
960 uint32_t hsa_id;
961 uint32_t hip_id;
963 uint32_t oam_id;
965
971typedef enum {
977
983typedef struct {
984 struct pcie_static_ {
985 uint16_t max_pcie_width;
986 uint32_t max_pcie_speed;
987 uint32_t pcie_interface_version;
988 amdsmi_card_form_factor_t slot_type;
989 uint32_t max_pcie_interface_version;
990 uint64_t reserved[9];
991 } pcie_static;
992 struct pcie_metric_ {
993 uint16_t pcie_width;
994 uint32_t pcie_speed;
995 uint32_t pcie_bandwidth;
996 uint64_t pcie_replay_count;
997 uint64_t pcie_l0_to_recovery_count;
999 uint64_t pcie_replay_roll_over_count;
1001 uint64_t pcie_nak_sent_count;
1002 uint64_t pcie_nak_received_count;
1004 uint32_t pcie_lc_perf_other_end_recovery_count;
1005 uint64_t reserved[12];
1006 } pcie_metric;
1007 uint64_t reserved[32];
1008} amdsmi_pcie_info_t;
1009
1015typedef struct {
1016 uint64_t power_cap;
1017 uint64_t default_power_cap;
1018 uint64_t dpm_cap;
1019 uint64_t min_power_cap;
1020 uint64_t max_power_cap;
1021 uint64_t reserved[3];
1022} amdsmi_power_cap_info_t;
1023
1029typedef enum {
1032} amdsmi_power_cap_type_t;
1033
1039typedef struct {
1045 uint64_t reserved[36];
1046} amdsmi_vbios_info_t;
1047
1053typedef enum {
1054 AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,
1055 AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,
1056 AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,
1057 AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,
1058 AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010
1059} amdsmi_cache_property_type_t;
1060
1066typedef struct {
1067 uint32_t num_cache_types;
1068 struct cache_ {
1069 uint32_t cache_properties;
1070 uint32_t cache_size;
1071 uint32_t cache_level;
1072 uint32_t max_num_cu_shared;
1073 uint32_t num_cache_instance;
1074 uint32_t reserved[3];
1075 } cache[AMDSMI_MAX_CACHE_TYPES];
1076 uint32_t reserved[15];
1077} amdsmi_gpu_cache_info_t;
1078
1084typedef struct {
1085 uint8_t num_fw_info;
1086 struct fw_info_list_ {
1087 amdsmi_fw_block_t fw_id;
1088 uint64_t fw_version;
1089 uint64_t reserved[2];
1090 } fw_info_list[AMDSMI_FW_ID__MAX];
1091 uint32_t reserved[7];
1092} amdsmi_fw_info_t;
1093
1099typedef struct {
1101 uint32_t vendor_id;
1103 uint32_t subvendor_id;
1104 uint64_t device_id;
1105 uint32_t rev_id;
1108 uint32_t oam_id;
1109 uint32_t num_of_compute_units;
1110 uint64_t target_graphics_version;
1111 uint32_t subsystem_id;
1112 uint64_t flags;
1113 uint32_t reserved[18];
1114} amdsmi_asic_info_t;
1115
1121typedef struct {
1122 uint64_t kfd_id;
1123 uint32_t node_id;
1124 uint32_t current_partition_id;
1125 uint32_t reserved[12];
1126} amdsmi_kfd_info_t;
1127
1133typedef union {
1134 struct nps_flags_ {
1135 uint32_t nps1_cap : 1;
1136 uint32_t nps2_cap : 1;
1137 uint32_t nps4_cap : 1;
1138 uint32_t nps8_cap : 1;
1139 uint32_t reserved : 28;
1140 } nps_flags;
1141 uint32_t nps_cap_mask;
1142} amdsmi_nps_caps_t;
1143
1150typedef struct {
1151 amdsmi_nps_caps_t partition_caps;
1152 amdsmi_memory_partition_type_t mp_mode;
1153 uint32_t num_numa_ranges;
1154 struct numa_range_ {
1155 amdsmi_vram_type_t memory_type;
1156 uint64_t start;
1157 uint64_t end;
1158 } numa_range[AMDSMI_MAX_NUM_NUMA_NODES];
1159 uint64_t reserved[11];
1161
1167typedef struct {
1168 amdsmi_accelerator_partition_type_t profile_type;
1169 uint32_t num_partitions;
1170 amdsmi_nps_caps_t memory_caps;
1171 uint32_t profile_index;
1173 uint32_t num_resources;
1175 uint64_t reserved[13];
1177
1184typedef struct {
1185 uint32_t profile_index;
1186 amdsmi_accelerator_partition_resource_type_t resource_type;
1187 uint32_t partition_resource;
1188 uint32_t num_partitions_share_resource;
1189 uint64_t reserved[6];
1191
1197typedef struct {
1198 uint32_t num_profiles;
1199 uint32_t num_resource_profiles;
1201 resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];
1202 uint32_t default_profile_index;
1204 uint64_t reserved[30];
1206
1212typedef enum {
1213 AMDSMI_LINK_TYPE_INTERNAL = 0,
1214 AMDSMI_LINK_TYPE_PCIE = 1,
1215 AMDSMI_LINK_TYPE_XGMI = 2,
1216 AMDSMI_LINK_TYPE_NOT_APPLICABLE = 3,
1217 AMDSMI_LINK_TYPE_UNKNOWN = 4
1218} amdsmi_link_type_t;
1219
1225typedef struct {
1226 uint32_t cpu_util_total;
1227 uint32_t cpu_util_user;
1228 uint32_t cpu_util_nice;
1229 uint32_t cpu_util_sys;
1230 uint32_t cpu_util_irq;
1231} amdsmi_cpu_util_t;
1232
1238typedef enum {
1239 AMDSMI_LINK_STATUS_ENABLED = 0,
1240 AMDSMI_LINK_STATUS_DISABLED = 1,
1241 AMDSMI_LINK_STATUS_INACTIVE = 2,
1242 AMDSMI_LINK_STATUS_ERROR = 3
1243} amdsmi_link_status_t;
1244
1250typedef struct {
1251 uint32_t num_links;
1252 struct _links {
1253 amdsmi_bdf_t bdf;
1254 uint32_t bit_rate;
1255 uint32_t max_bandwidth;
1256 amdsmi_link_type_t link_type;
1257 uint64_t read;
1258 uint64_t write;
1259 amdsmi_link_status_t link_status;
1260 uint64_t reserved[1];
1261 } links[AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK];
1262 uint64_t reserved[7];
1263} amdsmi_link_metrics_t;
1264
1270typedef struct {
1271 amdsmi_vram_type_t vram_type;
1273 uint64_t vram_size;
1274 uint32_t vram_bit_width;
1275 uint64_t vram_max_bandwidth;
1276 uint64_t reserved[37];
1277} amdsmi_vram_info_t;
1278
1284typedef struct {
1288} amdsmi_driver_info_t;
1289
1295typedef struct {
1301 uint64_t reserved[64];
1302} amdsmi_board_info_t;
1303
1311typedef struct {
1312 uint64_t socket_power;
1313 uint32_t current_socket_power;
1315 uint32_t average_socket_power;
1317 uint64_t gfx_voltage;
1318 uint64_t soc_voltage;
1319 uint64_t mem_voltage;
1320 uint32_t power_limit;
1321 uint32_t ubb_power;
1322 uint64_t reserved[18];
1323} amdsmi_power_info_t;
1324
1330typedef struct {
1331 uint32_t clk;
1332 uint32_t min_clk;
1333 uint32_t max_clk;
1334 uint8_t clk_locked;
1335 uint8_t clk_deep_sleep;
1336 uint32_t reserved[4];
1337} amdsmi_clk_info_t;
1338
1348typedef struct {
1349 uint32_t gfx_activity;
1350 uint32_t umc_activity;
1351 uint32_t mm_activity;
1352 uint32_t reserved[13];
1353} amdsmi_engine_usage_t;
1354
1361
1367typedef struct {
1369 amdsmi_process_handle_t pid;
1370 uint64_t mem;
1371 struct engine_usage_ {
1372 uint64_t gfx;
1373 uint64_t enc;
1374 uint32_t reserved[12];
1375 } engine_usage;
1376 struct memory_usage_ {
1377 uint64_t gtt_mem;
1378 uint64_t cpu_mem;
1379 uint64_t vram_mem;
1380 uint32_t reserved[10];
1381 } memory_usage;
1383 uint32_t cu_occupancy;
1384 uint32_t evicted_time;
1385 uint64_t sdma_usage;
1386 uint32_t reserved[8];
1387} amdsmi_proc_info_t;
1388
1394typedef struct {
1395 uint8_t is_iolink_coherent;
1396 uint8_t is_iolink_atomics_32bit;
1397 uint8_t is_iolink_atomics_64bit;
1398 uint8_t is_iolink_dma;
1399 uint8_t is_iolink_bi_directional;
1400} amdsmi_p2p_capability_t;
1401
1404#define AMDSMI_MAX_NUM_FREQUENCIES 33
1405
1410#define AMDSMI_MAX_FAN_SPEED 255
1411
1414#define AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3
1415
1421typedef enum {
1422 AMDSMI_DEV_PERF_LEVEL_AUTO = 0,
1423 AMDSMI_DEV_PERF_LEVEL_FIRST = AMDSMI_DEV_PERF_LEVEL_AUTO,
1433 AMDSMI_DEV_PERF_LEVEL_LAST = AMDSMI_DEV_PERF_LEVEL_DETERMINISM,
1434 AMDSMI_DEV_PERF_LEVEL_UNKNOWN = 0x100
1435} amdsmi_dev_perf_level_t;
1436
1443
1451typedef enum {
1452 AMDSMI_EVNT_GRP_XGMI = 0,
1453 AMDSMI_EVNT_GRP_XGMI_DATA_OUT = 10,
1454 AMDSMI_EVNT_GRP_INVALID = 0xFFFFFFFF
1455} amdsmi_event_group_t;
1456
1487typedef enum {
1488 AMDSMI_EVNT_FIRST = AMDSMI_EVNT_GRP_XGMI,
1489
1490 AMDSMI_EVNT_XGMI_FIRST = AMDSMI_EVNT_GRP_XGMI,
1491 AMDSMI_EVNT_XGMI_0_NOP_TX = AMDSMI_EVNT_XGMI_FIRST,
1499 AMDSMI_EVNT_XGMI_LAST = AMDSMI_EVNT_XGMI_1_BEATS_TX,
1500 AMDSMI_EVNT_XGMI_DATA_OUT_FIRST = AMDSMI_EVNT_GRP_XGMI_DATA_OUT,
1501 AMDSMI_EVNT_XGMI_DATA_OUT_0 = AMDSMI_EVNT_XGMI_DATA_OUT_FIRST,
1507 AMDSMI_EVNT_XGMI_DATA_OUT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_5,
1508 AMDSMI_EVNT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_LAST
1509} amdsmi_event_type_t;
1510
1516typedef enum {
1517 AMDSMI_CNTR_CMD_START = 0,
1518 AMDSMI_CNTR_CMD_STOP
1520} amdsmi_counter_command_t;
1521
1527typedef struct {
1528 uint64_t value;
1529 uint64_t time_enabled;
1530 uint64_t time_running;
1531} amdsmi_counter_value_t;
1532
1538typedef enum {
1539 AMDSMI_EVT_NOTIF_NONE = 0,
1540 AMDSMI_EVT_NOTIF_VMFAULT = 1,
1541 AMDSMI_EVT_NOTIF_FIRST = AMDSMI_EVT_NOTIF_VMFAULT,
1542 AMDSMI_EVT_NOTIF_THERMAL_THROTTLE = 2,
1543 AMDSMI_EVT_NOTIF_GPU_PRE_RESET = 3,
1544 AMDSMI_EVT_NOTIF_GPU_POST_RESET = 4,
1545 AMDSMI_EVT_NOTIF_MIGRATE_START = 5,
1546 AMDSMI_EVT_NOTIF_MIGRATE_END = 6,
1547 AMDSMI_EVT_NOTIF_PAGE_FAULT_START = 7,
1548 AMDSMI_EVT_NOTIF_PAGE_FAULT_END = 8,
1549 AMDSMI_EVT_NOTIF_QUEUE_EVICTION = 9,
1550 AMDSMI_EVT_NOTIF_QUEUE_RESTORE = 10,
1551 AMDSMI_EVT_NOTIF_UNMAP_FROM_GPU = 11,
1552 AMDSMI_EVT_NOTIF_PROCESS_START = 12,
1553 AMDSMI_EVT_NOTIF_PROCESS_END = 13,
1554 AMDSMI_EVT_NOTIF_LAST = AMDSMI_EVT_NOTIF_PROCESS_END
1556
1562#define AMDSMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))
1563
1569typedef struct {
1570 amdsmi_processor_handle processor_handle;
1571 amdsmi_evt_notification_type_t event;
1574
1581typedef enum {
1582 AMDSMI_TEMP_CURRENT = 0x0,
1583 AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,
1584 AMDSMI_TEMP_MAX,
1585 AMDSMI_TEMP_MIN,
1586 AMDSMI_TEMP_MAX_HYST,
1588 AMDSMI_TEMP_MIN_HYST,
1590 AMDSMI_TEMP_CRITICAL,
1594 AMDSMI_TEMP_EMERGENCY,
1600 AMDSMI_TEMP_CRIT_MIN,
1604 AMDSMI_TEMP_OFFSET,
1606 AMDSMI_TEMP_LOWEST,
1607 AMDSMI_TEMP_HIGHEST,
1608 AMDSMI_TEMP_SHUTDOWN,
1609 AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN
1610} amdsmi_temperature_metric_t;
1611
1618typedef enum {
1619 AMDSMI_VOLT_CURRENT = 0x0,
1620
1621 AMDSMI_VOLT_FIRST = AMDSMI_VOLT_CURRENT,
1622 AMDSMI_VOLT_MAX,
1623 AMDSMI_VOLT_MIN_CRIT,
1624 AMDSMI_VOLT_MIN,
1625 AMDSMI_VOLT_MAX_CRIT,
1626 AMDSMI_VOLT_AVERAGE,
1627 AMDSMI_VOLT_LOWEST,
1628 AMDSMI_VOLT_HIGHEST,
1629
1630 AMDSMI_VOLT_LAST = AMDSMI_VOLT_HIGHEST
1631} amdsmi_voltage_metric_t;
1632
1639typedef enum {
1640 AMDSMI_VOLT_TYPE_FIRST = 0,
1641
1642 AMDSMI_VOLT_TYPE_VDDGFX = AMDSMI_VOLT_TYPE_FIRST,
1644 AMDSMI_VOLT_TYPE_LAST = AMDSMI_VOLT_TYPE_VDDBOARD,
1645 AMDSMI_VOLT_TYPE_INVALID = 0xFFFFFFFF
1646} amdsmi_voltage_type_t;
1647
1656typedef enum {
1657 AMDSMI_PWR_PROF_PRST_CUSTOM_MASK = 0x1,
1658 AMDSMI_PWR_PROF_PRST_VIDEO_MASK = 0x2,
1659 AMDSMI_PWR_PROF_PRST_POWER_SAVING_MASK = 0x4,
1660 AMDSMI_PWR_PROF_PRST_COMPUTE_MASK = 0x8,
1661 AMDSMI_PWR_PROF_PRST_VR_MASK = 0x10,
1662
1663 // 3D Full Screen Power Profile
1664 AMDSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK = 0x20,
1665 AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT = 0x40,
1666 AMDSMI_PWR_PROF_PRST_LAST = AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT,
1667
1668 // Invalid power profile
1669 AMDSMI_PWR_PROF_PRST_INVALID = 0xFFFFFFFFFFFFFFFF
1671
1677typedef enum {
1678 AMDSMI_GPU_BLOCK_INVALID = 0,
1679 AMDSMI_GPU_BLOCK_FIRST = (1ULL << 0),
1680 AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
1681 AMDSMI_GPU_BLOCK_SDMA = (1ULL << 1),
1682 AMDSMI_GPU_BLOCK_GFX = (1ULL << 2),
1683 AMDSMI_GPU_BLOCK_MMHUB = (1ULL << 3),
1684 AMDSMI_GPU_BLOCK_ATHUB = (1ULL << 4),
1685 AMDSMI_GPU_BLOCK_PCIE_BIF = (1ULL << 5),
1686 AMDSMI_GPU_BLOCK_HDP = (1ULL << 6),
1687 AMDSMI_GPU_BLOCK_XGMI_WAFL = (1ULL << 7),
1688 AMDSMI_GPU_BLOCK_DF = (1ULL << 8),
1689 AMDSMI_GPU_BLOCK_SMN = (1ULL << 9),
1690 AMDSMI_GPU_BLOCK_SEM = (1ULL << 10),
1691 AMDSMI_GPU_BLOCK_MP0 = (1ULL << 11),
1692 AMDSMI_GPU_BLOCK_MP1 = (1ULL << 12),
1693 AMDSMI_GPU_BLOCK_FUSE = (1ULL << 13),
1694 AMDSMI_GPU_BLOCK_MCA = (1ULL << 14),
1695 AMDSMI_GPU_BLOCK_VCN = (1ULL << 15),
1696 AMDSMI_GPU_BLOCK_JPEG = (1ULL << 16),
1697 AMDSMI_GPU_BLOCK_IH = (1ULL << 17),
1698 AMDSMI_GPU_BLOCK_MPIO = (1ULL << 18),
1699 AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,
1700 AMDSMI_GPU_BLOCK_RESERVED = (1ULL << 63)
1701} amdsmi_gpu_block_t;
1702
1708typedef enum {
1709 CLK_LIMIT_MIN,
1710 CLK_LIMIT_MAX
1711} amdsmi_clk_limit_type_t;
1712
1718typedef enum {
1719 AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,
1720 AMDSMI_CPER_SEV_FATAL = 1,
1721 AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,
1722 AMDSMI_CPER_SEV_NUM = 3,
1723 AMDSMI_CPER_SEV_UNUSED = 10
1724} amdsmi_cper_sev_t;
1725
1731typedef enum {
1732 AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,
1733 AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,
1734 AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,
1735 AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,
1736 AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,
1737 AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,
1738 AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,
1739 AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,
1740 AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,
1741 AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,
1742 AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,
1743 AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT = 0x49A341DF69293BC9
1745} amdsmi_cper_notify_type_t;
1746
1752typedef struct {
1753 uint16_t dram_non_critical_region_threshold;
1754 uint16_t dram_critical_region_threshold;
1755} amdsmi_gpu_ras_policy_v4_0_t;
1756
1763typedef struct {
1764 uint8_t major_version;
1765 uint8_t minor_version;
1766 union policy_data_ {
1767 amdsmi_gpu_ras_policy_v4_0_t v4_0;
1768 uint64_t info[5];
1769 } policy_data;
1770} amdsmi_gpu_ras_policy_info_t;
1771
1777typedef enum {
1778 AMDSMI_RAS_ERR_STATE_NONE = 0,
1786
1787 AMDSMI_RAS_ERR_STATE_LAST = AMDSMI_RAS_ERR_STATE_ENABLED,
1788 AMDSMI_RAS_ERR_STATE_INVALID = 0xFFFFFFFF
1789} amdsmi_ras_err_state_t;
1790
1798typedef enum {
1799 AMDSMI_MEM_TYPE_FIRST = 0,
1800
1801 AMDSMI_MEM_TYPE_VRAM = AMDSMI_MEM_TYPE_FIRST,
1802 AMDSMI_MEM_TYPE_VIS_VRAM,
1803 AMDSMI_MEM_TYPE_GTT,
1804
1805 AMDSMI_MEM_TYPE_LAST = AMDSMI_MEM_TYPE_GTT
1806} amdsmi_memory_type_t;
1807
1813typedef enum {
1814 AMDSMI_FREQ_IND_MIN = 0,
1815 AMDSMI_FREQ_IND_MAX = 1,
1816 AMDSMI_FREQ_IND_INVALID = 0xFFFFFFFF
1817} amdsmi_freq_ind_t;
1818
1824typedef enum {
1825 AMDSMI_XGMI_STATUS_NO_ERRORS = 0,
1826 AMDSMI_XGMI_STATUS_ERROR,
1828} amdsmi_xgmi_status_t;
1829
1836
1842typedef enum {
1843 AMDSMI_MEM_PAGE_STATUS_RESERVED = 0,
1848} amdsmi_memory_page_status_t;
1849
1855typedef enum {
1856 AMDSMI_UTILIZATION_COUNTER_FIRST = 0,
1861 // Fine grain activity counters
1862 AMDSMI_FINE_GRAIN_GFX_ACTIVITY = 100,
1863 AMDSMI_FINE_GRAIN_MEM_ACTIVITY = 101,
1864 AMDSMI_FINE_DECODER_ACTIVITY = 102,
1865 AMDSMI_UTILIZATION_COUNTER_LAST = AMDSMI_FINE_DECODER_ACTIVITY
1867
1868#define AMDSMI_MAX_UTILIZATION_VALUES 4
1869
1877typedef struct {
1878 amdsmi_utilization_counter_type_t type;
1879 uint64_t value;
1880 uint64_t fine_value[AMDSMI_MAX_UTILIZATION_VALUES];
1881 uint16_t fine_value_count;
1882} amdsmi_utilization_counter_t;
1883
1889typedef struct {
1890 uint64_t page_address;
1891 uint64_t page_size;
1892 amdsmi_memory_page_status_t status;
1893} amdsmi_retired_page_record_t;
1894
1902typedef struct {
1903 amdsmi_bit_field_t available_profiles;
1904 amdsmi_power_profile_preset_masks_t current;
1905 uint32_t num_profiles;
1907
1913typedef struct {
1914 bool has_deep_sleep;
1915 uint32_t num_supported;
1916 uint32_t current;
1917 uint64_t frequency[AMDSMI_MAX_NUM_FREQUENCIES];
1919} amdsmi_frequencies_t;
1920
1926typedef struct {
1927 uint32_t policy_id;
1929} amdsmi_dpm_policy_entry_t;
1930
1931#define AMDSMI_MAX_NUM_PM_POLICIES 32
1932
1940typedef struct {
1941 uint32_t num_supported;
1942 uint32_t current;
1944} amdsmi_dpm_policy_t;
1945
1955typedef struct {
1956 amdsmi_frequencies_t transfer_rate;
1957 uint32_t lanes[AMDSMI_MAX_NUM_FREQUENCIES];
1958} amdsmi_pcie_bandwidth_t;
1959
1965typedef struct {
1966 uint32_t major;
1967 uint32_t minor;
1968 uint32_t release;
1969 const char* build;
1970} amdsmi_version_t;
1971
1977typedef struct {
1978 uint64_t frequency;
1979 uint64_t voltage;
1980} amdsmi_od_vddc_point_t;
1981
1989typedef struct {
1990 amdsmi_range_t freq_range;
1991 amdsmi_range_t volt_range;
1992} amdsmi_freq_volt_region_t;
1993
2000typedef struct {
2003} amdsmi_od_volt_curve_t;
2004
2010typedef struct {
2011 amdsmi_range_t curr_sclk_range;
2012 amdsmi_range_t curr_mclk_range;
2013 amdsmi_range_t curr_fclk_range;
2014 amdsmi_range_t sclk_freq_limits;
2015 amdsmi_range_t mclk_freq_limits;
2016 amdsmi_range_t fclk_freq_limits;
2017 amdsmi_od_volt_curve_t curve;
2018 uint32_t num_regions;
2019} amdsmi_od_volt_freq_data_t;
2020
2028typedef struct {
2029 // TODO(amd) Doxygen documents
2030 // Note: This should match: AMDGpuMetricsHeader_v1_t
2032 uint16_t structure_size;
2033 uint8_t format_revision;
2034 uint8_t content_revision;
2036} amd_metrics_table_header_t;
2037
2043typedef struct {
2048 uint32_t gfx_busy_inst[AMDSMI_MAX_NUM_XCC];
2049 uint16_t jpeg_busy[AMDSMI_MAX_NUM_JPEG_ENG_V1];
2051 uint16_t vcn_busy[AMDSMI_MAX_NUM_VCN];
2052 uint64_t gfx_busy_acc[AMDSMI_MAX_NUM_XCC];
2053
2057 /* Total App Clock Counter Accumulated */
2058 uint64_t gfx_below_host_limit_acc[AMDSMI_MAX_NUM_XCC];
2059
2063 /* Total App Clock Counter Accumulated */
2064 uint64_t gfx_below_host_limit_ppt_acc[AMDSMI_MAX_NUM_XCC];
2065 uint64_t gfx_below_host_limit_thm_acc[AMDSMI_MAX_NUM_XCC];
2066 uint64_t gfx_low_utilization_acc[AMDSMI_MAX_NUM_XCC];
2067 uint64_t gfx_below_host_limit_total_acc[AMDSMI_MAX_NUM_XCC];
2068
2072 uint16_t temperature_xcd[AMDSMI_MAX_NUM_XCC];
2073} amdsmi_gpu_xcp_metrics_t;
2074
2101typedef struct {
2105 uint16_t temperature_gfx;
2106 uint16_t temperature_soc;
2107 uint16_t temperature_core[AMDSMI_APU_MAX_CORES];
2108 uint16_t temperature_l3[AMDSMI_APU_MAX_L3];
2109 uint16_t temperature_skin;
2110
2114 uint16_t average_gfx_activity;
2115 uint16_t average_mm_activity;
2116 uint16_t average_vcn_activity;
2117 uint16_t average_ipu_activity[AMDSMI_APU_MAX_IPU];
2118 uint16_t average_core_c0_activity[AMDSMI_APU_MAX_CORES];
2119 uint16_t average_dram_reads;
2120 uint16_t average_dram_writes;
2121 uint16_t average_ipu_reads;
2122 uint16_t average_ipu_writes;
2123
2131 uint32_t average_socket_power;
2132 uint16_t average_cpu_power;
2133 uint16_t average_soc_power;
2134 uint32_t average_gfx_power;
2135 uint16_t average_core_power[AMDSMI_APU_MAX_CORES];
2136 uint16_t average_ipu_power;
2137 uint32_t average_apu_power;
2138 uint32_t average_dgpu_power;
2139 uint32_t average_all_core_power;
2140 uint16_t average_sys_power;
2141 uint16_t stapm_power_limit;
2142 uint16_t current_stapm_power_limit;
2143
2147 uint16_t average_gfxclk_frequency;
2148 uint16_t average_socclk_frequency;
2149 uint16_t average_uclk_frequency;
2150 uint16_t average_fclk_frequency;
2151 uint16_t average_vclk_frequency;
2152 uint16_t average_dclk_frequency;
2153 uint16_t average_vpeclk_frequency;
2154 uint16_t average_ipuclk_frequency;
2155 uint16_t average_mpipu_frequency;
2156
2160 uint16_t current_gfxclk;
2161 uint16_t current_socclk;
2162 uint16_t current_uclk;
2163 uint16_t current_fclk;
2164 uint16_t current_vclk;
2165 uint16_t current_dclk;
2166 uint16_t current_coreclk[AMDSMI_APU_MAX_CORES];
2167 uint16_t current_l3clk[AMDSMI_APU_MAX_L3];
2168 uint16_t current_core_maxfreq;
2169 uint16_t current_gfx_maxfreq;
2170
2174 uint32_t throttle_status;
2175 uint64_t indep_throttle_status;
2176 uint32_t throttle_residency_prochot;
2177 uint32_t throttle_residency_spl;
2178 uint32_t throttle_residency_fppt;
2179 uint32_t throttle_residency_sppt;
2180 uint32_t throttle_residency_thm_core;
2181 uint32_t throttle_residency_thm_gfx;
2182 uint32_t throttle_residency_thm_soc;
2183
2187 uint16_t fan_pwm;
2188
2192 uint16_t average_temperature_gfx;
2193 uint16_t average_temperature_soc;
2194 uint16_t average_temperature_core[AMDSMI_APU_MAX_CORES];
2195 uint16_t average_temperature_l3[AMDSMI_APU_MAX_L3];
2196
2200 uint16_t average_cpu_voltage;
2201 uint16_t average_soc_voltage;
2202 uint16_t average_gfx_voltage;
2203 uint16_t average_cpu_current;
2204 uint16_t average_soc_current;
2205 uint16_t average_gfx_current;
2206
2210 uint32_t time_filter_alphavalue;
2211
2212} amdsmi_apu_metrics_t;
2213
2230typedef struct {
2231 amd_metrics_table_header_t common_header;
2232
2238 uint16_t temperature_edge;
2239 uint16_t temperature_hotspot;
2240 uint16_t temperature_mem;
2241 uint16_t temperature_vrgfx;
2242 uint16_t temperature_vrsoc;
2243 uint16_t temperature_vrmem;
2244
2248 uint16_t average_gfx_activity;
2249 uint16_t average_umc_activity;
2250 uint16_t average_mm_activity;
2251
2255 uint16_t average_socket_power;
2256 uint64_t energy_accumulator;
2257
2259 uint64_t system_clock_counter;
2260
2264 uint16_t average_gfxclk_frequency;
2265 uint16_t average_socclk_frequency;
2266 uint16_t average_uclk_frequency;
2267 uint16_t average_vclk0_frequency;
2268 uint16_t average_dclk0_frequency;
2269 uint16_t average_vclk1_frequency;
2270 uint16_t average_dclk1_frequency;
2271
2275 uint16_t current_gfxclk;
2276 uint16_t current_socclk;
2277 uint16_t current_uclk;
2278 uint16_t current_vclk0;
2279 uint16_t current_dclk0;
2280 uint16_t current_vclk1;
2281 uint16_t current_dclk1;
2282
2283 uint32_t throttle_status;
2284
2285 uint16_t current_fan_speed;
2286
2290 uint16_t pcie_link_width;
2291 uint16_t pcie_link_speed;
2292
2293 /*
2294 * v1.1 additions
2295 */
2296 uint32_t gfx_activity_acc;
2297 uint32_t mem_activity_acc;
2298 uint16_t temperature_hbm[AMDSMI_NUM_HBM_INSTANCES];
2299
2300 /*
2301 * v1.2 additions
2302 */
2303 uint64_t firmware_timestamp;
2304
2305 /*
2306 * v1.3 additions
2307 */
2308 uint16_t voltage_soc;
2309 uint16_t voltage_gfx;
2310 uint16_t voltage_mem;
2311
2312 uint64_t indep_throttle_status;
2313
2314 /*
2315 * v1.4 additions
2316 */
2317 uint16_t current_socket_power;
2318
2319 uint16_t vcn_activity[AMDSMI_MAX_NUM_VCN];
2320
2321 uint32_t gfxclk_lock_status;
2322
2323 uint16_t xgmi_link_width;
2324 uint16_t xgmi_link_speed;
2325
2326 uint64_t pcie_bandwidth_acc;
2327 uint64_t pcie_bandwidth_inst;
2328 uint64_t pcie_l0_to_recov_count_acc;
2329 uint64_t pcie_replay_count_acc;
2330 uint64_t pcie_replay_rover_count_acc;
2331
2335 uint64_t xgmi_read_data_acc[AMDSMI_MAX_NUM_XGMI_LINKS];
2336 uint64_t xgmi_write_data_acc[AMDSMI_MAX_NUM_XGMI_LINKS];
2337
2341 uint16_t current_gfxclks[AMDSMI_MAX_NUM_GFX_CLKS];
2342 uint16_t current_socclks[AMDSMI_MAX_NUM_CLKS];
2343 uint16_t current_vclk0s[AMDSMI_MAX_NUM_CLKS];
2344 uint16_t current_dclk0s[AMDSMI_MAX_NUM_CLKS];
2345
2349 uint16_t jpeg_activity[AMDSMI_MAX_NUM_JPEG];
2350 uint32_t pcie_nak_sent_count_acc;
2351 uint32_t pcie_nak_rcvd_count_acc;
2352
2356 uint64_t accumulation_counter;
2357
2361 uint64_t prochot_residency_acc;
2362
2378 uint64_t ppt_residency_acc;
2379
2395 uint64_t socket_thm_residency_acc;
2396 uint64_t vr_thm_residency_acc;
2397 uint64_t hbm_thm_residency_acc;
2398
2399 uint16_t num_partition;
2400
2404 uint32_t pcie_lc_perf_other_end_recovery;
2405
2409 uint64_t vram_max_bandwidth;
2410
2411 uint16_t xgmi_link_status[AMDSMI_MAX_NUM_XGMI_LINKS];
2412
2416 uint16_t
2417 temperature_hbm_stacks[AMDSMI_MAX_NUM_HBM_STACKS];
2418 uint16_t temperature_mid[AMDSMI_MAX_NUM_MID];
2419 uint16_t temperature_aid[AMDSMI_MAX_NUM_AID];
2420
2421 uint16_t current_uclk_aid[AMDSMI_MAX_NUM_CLKS_PER_AID];
2422 uint16_t current_socclks_mid[AMDSMI_MAX_NUM_CLKS_PER_MID];
2423
2454 amdsmi_apu_metrics_t* apu_metrics;
2455
2456} amdsmi_gpu_metrics_t;
2457
2463typedef enum {
2464 AMDSMI_XGMI_LINK_DOWN,
2465 AMDSMI_XGMI_LINK_UP,
2468
2474typedef struct {
2475 uint32_t total_links;
2477 uint64_t reserved[7];
2478} amdsmi_xgmi_link_status_t;
2479
2485typedef struct {
2487 uint64_t value;
2488} amdsmi_name_value_t;
2489
2495typedef enum {
2496 AMDSMI_REG_XGMI,
2497 AMDSMI_REG_WAFL,
2498 AMDSMI_REG_PCIE,
2499 AMDSMI_REG_USR,
2500 AMDSMI_REG_USR1
2501} amdsmi_reg_type_t;
2502
2508typedef struct {
2509 uint32_t ras_eeprom_version;
2511 uint32_t ecc_correction_schema_flag;
2514 struct ras_info_ {
2515 uint32_t dram_ecc : 1;
2516 uint32_t sram_ecc : 1;
2517 uint32_t poisoning : 1;
2518 uint32_t rsvd : 29;
2519 } ras_info;
2520 bool needs_reboot;
2521} amdsmi_ras_feature_t;
2522
2528typedef struct {
2529 uint64_t correctable_count;
2530 uint64_t uncorrectable_count;
2531 uint64_t deferred_count;
2532 uint64_t reserved[5];
2533} amdsmi_error_count_t;
2534
2541typedef struct {
2542 uint32_t process_id;
2543 uint64_t vram_usage;
2544 uint64_t sdma_usage;
2545 uint32_t cu_occupancy;
2546 uint32_t evicted_time;
2547} amdsmi_process_info_t;
2548
2554typedef struct {
2555 uint32_t count;
2557 uint64_t reserved[15];
2558} amdsmi_topology_nearest_t;
2559
2568typedef enum {
2569 AMDSMI_VIRTUALIZATION_MODE_UNKNOWN = 0,
2574} amdsmi_virtualization_mode_t;
2575
2581typedef enum {
2584} amdsmi_affinity_scope_t;
2585
2591typedef enum {
2594} amdsmi_npm_status_t;
2595
2601typedef struct {
2602 amdsmi_npm_status_t status;
2603 uint64_t limit;
2604 uint32_t ubb_power_threshold;
2605 uint64_t reserved[5];
2606} amdsmi_npm_info_t;
2607
2616typedef enum {
2617 AMDSMI_PTL_DATA_FORMAT_I8 = 0x0,
2618 AMDSMI_PTL_DATA_FORMAT_F16 = 0x1,
2619 AMDSMI_PTL_DATA_FORMAT_BF16 = 0x2,
2620 AMDSMI_PTL_DATA_FORMAT_F32 = 0x3,
2621 AMDSMI_PTL_DATA_FORMAT_F64 = 0x4,
2622 AMDSMI_PTL_DATA_FORMAT_F8 = 0x5,
2623 AMDSMI_PTL_DATA_FORMAT_VECTOR = 0x6,
2624 AMDSMI_PTL_DATA_FORMAT_INVALID = 0xFFFFFFFF
2625} amdsmi_ptl_data_format_t;
2626
2627#ifdef ENABLE_ESMI_LIB
2628
2634typedef struct {
2635 uint8_t debug;
2636 uint8_t minor;
2637 uint8_t major;
2638 uint8_t unused;
2639} amdsmi_smu_fw_version_t;
2640
2646typedef struct {
2647 uint32_t max_bw;
2648 uint32_t utilized_bw;
2649 uint32_t utilized_pct;
2650} amdsmi_ddr_bw_metrics_t;
2651
2657typedef struct {
2658 uint8_t range : 3;
2659 uint8_t ref_rate : 1;
2661
2667typedef struct {
2668 uint16_t power : 15;
2669 uint16_t update_rate : 9;
2670 uint8_t dimm_addr;
2671} amdsmi_dimm_power_t;
2672
2678typedef struct {
2679 uint16_t sensor : 11;
2680 uint16_t update_rate : 9;
2681 uint8_t dimm_addr;
2682 float temp;
2683} amdsmi_dimm_thermal_t;
2684
2690typedef enum {
2691 AGG_BW0 = 1,
2692 RD_BW0 = 2,
2693 WR_BW0 = 4
2694} amdsmi_io_bw_encoding_t;
2695
2705typedef struct {
2706 amdsmi_io_bw_encoding_t bw_type;
2707 char* link_name;
2708} amdsmi_link_id_bw_type_t;
2709
2716typedef struct {
2717 uint8_t max_dpm_level;
2718 uint8_t min_dpm_level;
2719} amdsmi_dpm_level_t;
2720
2726typedef struct __attribute__((__packed__)) {
2727 uint32_t accumulation_counter;
2730 uint32_t max_socket_temperature;
2732 uint32_t max_vr_temperature;
2734 uint32_t max_hbm_temperature;
2735 uint64_t max_socket_temperature_acc;
2736 uint64_t max_vr_temperature_acc;
2737 uint64_t max_hbm_temperature_acc;
2738
2739 uint32_t socket_power_limit;
2741 uint32_t max_socket_power_limit;
2743 uint32_t socket_power;
2744
2745 uint64_t timestamp;
2746 uint64_t socket_energy_acc;
2747 uint64_t ccd_energy_acc;
2748 uint64_t xcd_energy_acc;
2749 uint64_t aid_energy_acc;
2750 uint64_t hbm_energy_acc;
2751
2752 uint32_t cclk_frequency_limit;
2754 uint32_t gfxclk_frequency_limit;
2756 uint32_t fclk_frequency;
2757 uint32_t uclk_frequency;
2758 uint32_t socclk_frequency[4];
2759 uint32_t vclk_frequency[4];
2760 uint32_t dclk_frequency[4];
2761 uint32_t lclk_frequency[4];
2762 uint64_t gfxclk_frequency_acc[8];
2763 uint64_t cclk_frequency_acc[96];
2764
2765 uint32_t max_cclk_frequency;
2766 uint32_t min_cclk_frequency;
2767 uint32_t max_gfxclk_frequency;
2768 uint32_t min_gfxclk_frequency;
2769 uint32_t fclk_frequency_table[4];
2771 uint32_t uclk_frequency_table[4];
2773 uint32_t socclk_frequency_table[4];
2775 uint32_t vclk_frequency_table[4];
2777 uint32_t dclk_frequency_table[4];
2779 uint32_t lclk_frequency_table[4];
2781 uint32_t max_lclk_dpm_range;
2782 uint32_t min_lclk_dpm_range;
2783
2784 uint32_t xgmi_width;
2785 uint32_t xgmi_bitrate;
2786 uint64_t xgmi_read_bandwidth_acc[8];
2788 uint64_t xgmi_write_bandwidth_acc[8];
2791 uint32_t socket_c0_residency;
2792 uint32_t socket_gfx_busy;
2793 uint32_t dram_bandwidth_utilization;
2794 uint64_t socket_c0_residency_acc;
2795 uint64_t socket_gfx_busy_acc;
2796 uint64_t dram_bandwidth_acc;
2797 uint32_t max_dram_bandwidth;
2799 uint64_t dram_bandwidth_utilization_acc;
2800 uint64_t pcie_bandwidth_acc[4];
2801
2802 uint32_t prochot_residency_acc;
2803 uint32_t ppt_residency_acc;
2804 uint32_t socket_thm_residency_acc;
2806 uint32_t vr_thm_residency_acc;
2808 uint32_t hbm_thm_residency_acc;
2810 uint32_t spare;
2811
2812 uint32_t gfxclk_frequency[8];
2813} amdsmi_hsmp_metrics_table_t;
2814
2820static char* const amdsmi_hsmp_freqlimit_src_names[] = {
2821 "cHTC-Active", "PROCHOT", "TDC limit", "PPT Limit",
2822 "OPN Max", "Reliability Limit", "APML Agent", "HSMP Agent"};
2823
2829typedef struct {
2831 uint32_t cpu_family_id;
2832 uint32_t model_id;
2833 uint32_t threads_per_core;
2834 uint32_t cores_per_socket;
2835 bool frequency_boost;
2836 uint32_t vendor_id;
2838 uint32_t subvendor_id;
2839 uint64_t device_id;
2840 uint32_t rev_id;
2842 uint32_t socket_id;
2843 uint32_t core_id;
2844 uint32_t num_of_cpu_cores;
2845 uint32_t socket_count;
2846 uint32_t core_count;
2847 uint32_t reserved[17];
2848} amdsmi_cpu_info_t;
2849
2850#endif
2851
2857typedef struct {
2858 uint32_t socket_id;
2859 uint32_t cores_per_socket;
2860} amdsmi_sock_info_t;
2861
2867#define AMDSMI_MAX_NIC_PORTS 32
2868#define AMDSMI_MAX_NIC_RDMA_DEV 32
2869#define AMDSMI_MAX_NIC_FW 16
2870
2877typedef enum {
2884} amdsmi_nic_link_type_t;
2885
2893typedef struct {
2895 uint64_t value;
2896} amdsmi_nic_stat_t;
2897
2903typedef struct {
2904 uint16_t vendor_id;
2905 uint16_t subvendor_id;
2906 uint16_t device_id;
2907 uint16_t subsystem_id;
2908 uint8_t revision;
2914} amdsmi_nic_asic_info_t;
2915
2921typedef struct {
2922 amdsmi_bdf_t bdf;
2923 uint8_t max_pcie_width;
2924 uint32_t max_pcie_speed;
2927} amdsmi_nic_bus_info_t;
2928
2934typedef struct {
2935 uint8_t node;
2937} amdsmi_nic_numa_info_t;
2938
2944typedef struct {
2947} amdsmi_nic_fw_t;
2948
2954typedef struct {
2955 uint32_t num_fw;
2957} amdsmi_nic_fw_info_t;
2958
2981typedef struct {
2982 amdsmi_bdf_t bdf;
2983 uint32_t port_num;
2987 uint8_t ifindex;
2989 uint8_t carrier;
2990 uint16_t mtu;
2992 uint32_t link_speed;
2993 uint32_t active_fec;
2998} amdsmi_nic_port_t;
2999
3005typedef struct {
3006 uint32_t num_ports;
3008} amdsmi_nic_port_info_t;
3009
3015typedef struct {
3018} amdsmi_nic_driver_info_t;
3019
3025typedef struct {
3028 uint8_t rdma_port;
3029 uint16_t max_mtu;
3030 uint16_t active_mtu;
3031} amdsmi_nic_rdma_port_info_t;
3032
3038typedef struct {
3044 uint8_t num_rdma_ports;
3046} amdsmi_nic_rdma_dev_info_t;
3047
3053typedef struct {
3054 uint8_t num_rdma_dev;
3057
3058/*****************************************************************************/
3088
3104
3107/*****************************************************************************/
3145 amdsmi_socket_handle* socket_handles);
3146
3166amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char* name);
3167
3210 uint32_t* processor_count,
3211 amdsmi_processor_handle* processor_handles);
3212
3234 amdsmi_node_handle* node_handle);
3235
3256 amdsmi_processor_type_t* processor_type);
3257
3280 char* name);
3281
3306amdsmi_status_t amdsmi_get_processor_count_from_handles(amdsmi_processor_handle* processor_handles,
3307 uint32_t* processor_count,
3308 uint32_t* nr_cpusockets,
3309 uint32_t* nr_cpucores, uint32_t* nr_gpus);
3310
3340 amdsmi_processor_type_t processor_type,
3341 amdsmi_processor_handle* processor_handles,
3342 uint32_t* processor_count);
3343
3362 amdsmi_processor_handle* processor_handle);
3363
3379 amdsmi_bdf_t* bdf);
3380
3401 unsigned int* uuid_length, char* uuid);
3402
3422 amdsmi_enumeration_info_t* info);
3423
3452 uint32_t cpu_set_size, uint64_t* cpu_set,
3453 amdsmi_affinity_scope_t scope);
3454
3473 amdsmi_virtualization_mode_t* mode);
3474
3477/*****************************************************************************/
3510
3529 uint16_t* revision);
3530
3566amdsmi_status_t amdsmi_get_gpu_vendor_name(amdsmi_processor_handle processor_handle, char* name,
3567 size_t len);
3568
3595amdsmi_status_t amdsmi_get_gpu_vram_vendor(amdsmi_processor_handle processor_handle, char* brand,
3596 uint32_t len);
3597
3621amdsmi_status_t amdsmi_get_gpu_subsystem_id(amdsmi_processor_handle processor_handle, uint16_t* id);
3622
3658amdsmi_status_t amdsmi_get_gpu_subsystem_name(amdsmi_processor_handle processor_handle, char* name,
3659 size_t len);
3660
3663/*****************************************************************************/
3691 amdsmi_pcie_bandwidth_t* bandwidth);
3692
3731amdsmi_status_t amdsmi_get_gpu_bdf_id(amdsmi_processor_handle processor_handle, uint64_t* bdfid);
3732
3757 int32_t* numa_node);
3758
3786 uint64_t* sent, uint64_t* received,
3787 uint64_t* max_pkt_sz);
3788
3813 uint64_t* counter);
3814
3817/*****************************************************************************/
3858 uint64_t bw_bitmask);
3859
3862/*****************************************************************************/
3900 uint64_t* energy_accumulator, float* counter_resolution,
3901 uint64_t* timestamp);
3902
3905/*****************************************************************************/
3933amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind,
3934 uint64_t cap);
3935
3958 uint32_t reserved,
3959 amdsmi_power_profile_preset_masks_t profile);
3960
3982 uint32_t* sensor_count, uint32_t* sensor_inds,
3983 amdsmi_power_cap_type_t* sensor_types);
3984
3999 uint32_t* ppower);
4000
4015 uint32_t* pcap);
4016
4031 uint32_t* pmax);
4032
4046amdsmi_status_t amdsmi_get_cpu_pwr_svi_telemetry_all_rails(amdsmi_processor_handle processor_handle,
4047 uint32_t* power);
4048
4063 uint32_t pcap);
4064
4084 uint8_t power_efficiency_mode,
4085 uint32_t* utilization, uint32_t* ppt_limit);
4086
4109 uint32_t* power_efficiency_mode,
4110 uint32_t* utilization, uint32_t* ppt_limit);
4111
4128 uint32_t* power);
4129
4132/*****************************************************************************/
4166 amdsmi_memory_type_t mem_type, uint64_t* total);
4167
4195 amdsmi_memory_type_t mem_type, uint64_t* used);
4196
4222 uint32_t* num_pages,
4223 amdsmi_retired_page_record_t* info);
4224
4244 uint32_t* threshold);
4245
4266
4292amdsmi_status_t amdsmi_get_gpu_ras_block_features_enabled(amdsmi_processor_handle processor_handle,
4293 amdsmi_gpu_block_t block,
4294 amdsmi_ras_err_state_t* state);
4295
4332 uint32_t* num_pages,
4333 amdsmi_retired_page_record_t* records);
4334
4337/*****************************************************************************/
4371 uint32_t sensor_ind, int64_t* speed);
4372
4403 uint32_t sensor_ind, int64_t* speed);
4404
4435 uint32_t sensor_ind, uint64_t* max_speed);
4436
4452 amdsmi_gpu_cache_info_t* info);
4453
4486 amdsmi_voltage_type_t sensor_type,
4487 amdsmi_voltage_metric_t metric, int64_t* voltage);
4488
4491/*****************************************************************************/
4516amdsmi_status_t amdsmi_reset_gpu_fan(amdsmi_processor_handle processor_handle, uint32_t sensor_ind);
4517
4545 uint32_t sensor_ind, uint64_t speed);
4546
4549/*****************************************************************************/
4573 uint32_t* gpu_busy_percent);
4574
4606 amdsmi_utilization_counter_t utilization_counters[],
4607 uint32_t count, uint64_t* timestamp);
4608
4633 amdsmi_dev_perf_level_t* perf);
4634
4658 uint64_t clkvalue);
4659
4684 uint32_t* od);
4685
4710 uint32_t* od);
4711
4737
4757
4782 amdsmi_od_volt_freq_data_t* odv);
4783
4805 amd_metrics_table_header_t* header_value);
4806
4839 amdsmi_gpu_metrics_t* pgpu_metrics);
4840
4872 amdsmi_gpu_metrics_t* pgpu_metrics);
4873
4909 amdsmi_name_value_t** pm_metrics,
4910 uint32_t* num_of_metrics);
4911
4949 amdsmi_reg_type_t reg_type,
4950 amdsmi_name_value_t** reg_metrics,
4951 uint32_t* num_of_metrics);
4952
4981 uint64_t minclkvalue, uint64_t maxclkvalue,
4982 amdsmi_clk_type_t clkType);
4983
5007 amdsmi_clk_type_t clk_type,
5008 amdsmi_clk_limit_type_t limit_type, uint64_t clk_value);
5009
5035 amdsmi_freq_ind_t level, uint64_t clkvalue,
5036 amdsmi_clk_type_t clkType);
5037
5062 uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue);
5063
5104 uint32_t* num_regions,
5105 amdsmi_freq_volt_region_t* buffer);
5106
5143 uint32_t sensor_ind,
5144 amdsmi_power_profile_status_t* status);
5145
5148/*****************************************************************************/
5177 amdsmi_dev_perf_level_t perf_lvl);
5178
5220 uint32_t od);
5221
5259 amdsmi_clk_type_t clk_type, uint64_t freq_bitmask);
5260
5281 amdsmi_dpm_policy_t* policy);
5282
5304amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id);
5305
5326 amdsmi_dpm_policy_t* xgmi_plpd);
5327
5349amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id);
5350
5371 uint32_t* pisolate);
5372
5393 uint32_t pisolate);
5394
5413
5416/*****************************************************************************/
5439
5442/*****************************************************************************/
5478
5511 uint64_t* enabled_blocks);
5512
5534 amdsmi_error_count_t* ec);
5535
5538#pragma pack(push, 1)
5539
5545typedef struct {
5546 unsigned char b[16];
5547} amdsmi_cper_guid_t;
5548
5549typedef struct {
5550 uint8_t seconds;
5551 uint8_t minutes;
5552 uint8_t hours;
5553 uint8_t flag;
5554 uint8_t day;
5555 uint8_t month;
5556 uint8_t year;
5557 uint8_t century;
5558} amdsmi_cper_timestamp_t;
5559
5560typedef union {
5561 struct valid_bits_ {
5562 uint32_t platform_id : 1;
5563 uint32_t timestamp : 1;
5564 uint32_t partition_id : 1;
5565 uint32_t reserved : 29;
5566 } valid_bits;
5567 uint32_t valid_mask;
5568} amdsmi_cper_valid_bits_t;
5569
5570typedef struct {
5571 char signature[4];
5572 uint16_t revision;
5573 uint32_t signature_end;
5574 uint16_t sec_cnt;
5575 amdsmi_cper_sev_t error_severity;
5576 amdsmi_cper_valid_bits_t cper_valid_bits;
5577 uint32_t record_length;
5578 amdsmi_cper_timestamp_t timestamp;
5579 char platform_id[16];
5580 amdsmi_cper_guid_t partition_id;
5581 char creator_id[16];
5582 amdsmi_cper_guid_t notify_type;
5583 char record_id[8];
5584 uint32_t flags;
5585 uint64_t persistence_info;
5586 uint8_t reserved[12];
5587} amdsmi_cper_hdr_t;
5588
5589#pragma pack(pop)
5590
5591/*****************************************************************************/
5622amdsmi_status_t amdsmi_get_afids_from_cper(char* cper_buffer, uint32_t buf_size, uint64_t* afids,
5623 uint32_t* num_afids);
5624
5640 amdsmi_ras_feature_t* ras_feature);
5641
5681 uint32_t severity_mask, char* cper_data,
5682 uint64_t* buf_size, amdsmi_cper_hdr_t** cper_hdrs,
5683 uint64_t* entry_count, uint64_t* cursor);
5684
5687/*****************************************************************************/
5726
5745amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char** status_string);
5746
5749/*****************************************************************************/
5870 amdsmi_event_group_t group);
5871
5901 amdsmi_event_type_t type,
5902 amdsmi_event_handle_t* evnt_handle);
5903
5921
5945
5967 amdsmi_counter_value_t* value);
5968
5992 amdsmi_event_group_t grp, uint32_t* available);
5993
5996/*****************************************************************************/
6035 uint32_t* num_items);
6036
6058 amdsmi_process_info_t* proc);
6059
6094 uint32_t* num_devices);
6095
6098/*****************************************************************************/
6129 amdsmi_xgmi_status_t* status);
6130
6148
6164 amdsmi_xgmi_info_t* info);
6165
6184 amdsmi_xgmi_link_status_t* link_status);
6185
6188/*****************************************************************************/
6209 amdsmi_link_metrics_t* link_metrics);
6210
6231 uint32_t* numa_node);
6232
6256 amdsmi_processor_handle processor_handle_dst,
6257 uint64_t* weight);
6258
6286 uint64_t* min_bandwidth, uint64_t* max_bandwidth);
6287
6315 amdsmi_processor_handle processor_handle_dst,
6316 uint64_t* hops, amdsmi_link_type_t* type);
6317
6344 amdsmi_link_type_t link_type,
6345 amdsmi_topology_nearest_t* topology_nearest_info);
6346
6370 amdsmi_processor_handle processor_handle_dst,
6371 bool* accessible);
6372
6400 amdsmi_processor_handle processor_handle_dst,
6402
6405/*****************************************************************************/
6445 char* compute_partition, uint32_t len);
6446
6475 amdsmi_compute_partition_type_t compute_partition);
6476
6479/*****************************************************************************/
6519 char* memory_partition, uint32_t len);
6520
6551 amdsmi_memory_partition_type_t memory_partition);
6552
6567amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle,
6568 amdsmi_memory_partition_config_t* config);
6569
6597 amdsmi_memory_partition_type_t mode);
6598
6601/*****************************************************************************/
6626 amdsmi_processor_handle processor_handle,
6627 amdsmi_accelerator_partition_profile_config_t* profile_config);
6628
6651 uint32_t* partition_id);
6652
6671 amdsmi_processor_handle processor_handle, uint32_t profile_index);
6672
6675/*****************************************************************************/
6700
6731amdsmi_status_t amdsmi_set_gpu_event_notification_mask(amdsmi_processor_handle processor_handle,
6732 uint64_t mask);
6733
6774 amdsmi_evt_notification_data_t* data);
6775
6795
6798/*****************************************************************************/
6819 amdsmi_driver_info_t* info);
6820
6823/*****************************************************************************/
6851 amdsmi_asic_info_t* info);
6852
6872 amdsmi_kfd_info_t* info);
6873
6889 amdsmi_vram_info_t* info);
6890
6906 amdsmi_board_info_t* info);
6907
6927 uint32_t sensor_ind, amdsmi_power_cap_info_t* info);
6928
6944 amdsmi_pcie_info_t* info);
6945
6963 uint16_t* xcd_count);
6964
6989
6992/*****************************************************************************/
7012 amdsmi_fw_info_t* info);
7013
7030 amdsmi_vbios_info_t* info);
7031
7034/*****************************************************************************/
7069 amdsmi_temperature_type_t sensor_type,
7070 amdsmi_temperature_metric_t metric, int64_t* temperature);
7071
7087 amdsmi_engine_usage_t* info);
7088
7107 amdsmi_power_info_t* info);
7108
7122amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle,
7123 bool* enabled);
7124
7146
7161 amdsmi_vram_usage_t* info);
7162
7183 amdsmi_violation_status_t* info);
7184
7187/*****************************************************************************/
7247 uint32_t* max_processes, amdsmi_proc_info_t* list);
7248
7251/*****************************************************************************/
7304
7307/*****************************************************************************/
7332amdsmi_status_t amdsmi_get_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool* enabled);
7333
7352amdsmi_status_t amdsmi_set_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool enable);
7353
7377 amdsmi_ptl_data_format_t* data_format1,
7378 amdsmi_ptl_data_format_t* data_format2);
7379
7405 amdsmi_ptl_data_format_t data_format1,
7406 amdsmi_ptl_data_format_t data_format2);
7407
7410#ifdef ENABLE_ESMI_LIB
7411
7412/*****************************************************************************/
7446 amdsmi_processor_handle* processor_handles);
7447
7475 amdsmi_processor_handle* processor_handles);
7476
7479/*****************************************************************************/
7498 uint64_t* penergy);
7499
7514 uint64_t* penergy);
7515
7518/*****************************************************************************/
7535
7549 amdsmi_processor_handle processor_handle, amdsmi_hsmp_driver_version_t* amdsmi_hsmp_driver_ver);
7550
7564 amdsmi_smu_fw_version_t* amdsmi_smu_fw);
7565
7579 uint32_t* proto_ver);
7580
7595 uint32_t* prochot);
7596
7612amdsmi_status_t amdsmi_get_cpu_fclk_mclk(amdsmi_processor_handle processor_handle, uint32_t* fclk,
7613 uint32_t* mclk);
7614
7628amdsmi_status_t amdsmi_get_cpu_cclk_limit(amdsmi_processor_handle processor_handle, uint32_t* cclk);
7629
7647
7664 uint16_t* fmax, uint16_t* fmin);
7665
7679amdsmi_status_t amdsmi_get_cpu_core_current_freq_limit(amdsmi_processor_handle processor_handle,
7680 uint32_t* freq);
7681
7710 bool* rail_isofreq_policy);
7711
7740 uint8_t* rail_isofreq_policy);
7741
7744/*****************************************************************************/
7769 uint8_t* dfc_ctrl);
7770
7790 uint8_t* dfc_ctrl);
7791
7794/*****************************************************************************/
7813 uint32_t* pboostlimit);
7814
7829 uint32_t* pc0_residency);
7830
7845 uint32_t boostlimit);
7846
7861 uint32_t boostlimit);
7862
7879 uint32_t* floor_freq);
7880
7897 uint32_t* floor_freq);
7898
7914amdsmi_status_t amdsmi_get_cpu_core_eff_floor_freq_limit(amdsmi_processor_handle processor_handle,
7915 uint32_t* eff_floor_freq);
7916
7933 uint32_t* eff_floor_freq);
7934
7951 uint32_t floor_freq);
7952
7969 uint32_t floor_freq);
7970
7988 uint32_t msr_floor_freq);
7989
8005amdsmi_status_t amdsmi_set_cpu_core_msr_floor_freq_limit(amdsmi_processor_handle processor_handle,
8006 uint32_t msr_floor_freq);
8007
8023
8038 uint32_t sdps_limit);
8039
8054 uint32_t* sdps_limit);
8055
8058/*****************************************************************************/
8077 amdsmi_ddr_bw_metrics_t* ddr_bw);
8078
8081/*****************************************************************************/
8100 uint32_t* ptmon);
8101
8122amdsmi_status_t amdsmi_get_cpu_tdelta(amdsmi_processor_handle processor_handle, uint8_t* tdelta);
8123
8146amdsmi_status_t amdsmi_get_cpu_svi3_vr_controller_temp(amdsmi_processor_handle processor_handle,
8147 uint32_t* rail_selection,
8148 uint32_t* rail_index, uint32_t* temp);
8149
8152/*****************************************************************************/
8173 amdsmi_processor_handle processor_handle, uint8_t dimm_addr,
8174 amdsmi_temp_range_refresh_rate_t* rate);
8175
8190 uint8_t dimm_addr,
8191 amdsmi_dimm_power_t* dimm_pow);
8192
8209 uint8_t dimm_addr,
8210 amdsmi_dimm_thermal_t* dimm_temp);
8211
8237 uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset,
8238 uint32_t reg_space, uint32_t* data);
8264 uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset,
8265 uint32_t reg_space, uint32_t write_data);
8266
8269/*****************************************************************************/
8289amdsmi_status_t amdsmi_set_cpu_xgmi_width(amdsmi_processor_handle processor_handle, uint8_t min,
8290 uint8_t max);
8291
8294/*****************************************************************************/
8315 uint8_t min_link_width,
8316 uint8_t max_link_width);
8317
8320/*****************************************************************************/
8337
8351amdsmi_status_t amdsmi_cpu_apb_disable(amdsmi_processor_handle processor_handle, uint8_t pstate);
8352
8371 uint8_t nbio_id, uint8_t min, uint8_t max);
8372
8389 uint8_t nbio_id, amdsmi_dpm_level_t* nbio);
8390
8407 uint8_t rate_ctrl, uint8_t* prev_mode);
8408
8425 uint8_t min_pstate, uint8_t max_pstate);
8426
8450 uint8_t min_pstate, uint8_t max_pstate);
8451
8476 uint8_t* min_pstate, uint8_t* max_pstate);
8477
8499 uint8_t* enabled);
8500
8520amdsmi_status_t amdsmi_set_cpu_pc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable);
8521
8543 uint8_t* enabled);
8544
8566amdsmi_status_t amdsmi_set_cpu_cc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable);
8567
8570/*****************************************************************************/
8591 amdsmi_link_id_bw_type_t link, uint32_t* io_bw);
8592
8609 amdsmi_link_id_bw_type_t link, uint32_t* xgmi_bw);
8610
8613/*****************************************************************************/
8632 uint32_t* metrics_version);
8633
8648 amdsmi_hsmp_metrics_table_t* metrics_table);
8649
8652/*****************************************************************************/
8670amdsmi_status_t amdsmi_first_online_core_on_cpu_socket(amdsmi_processor_handle processor_handle,
8671 uint32_t* pcore_ind);
8672
8685
8698
8724 amdsmi_cpu_info_t* cpu_info);
8725
8744
8757amdsmi_status_t amdsmi_get_cpu_cores_per_socket(uint32_t sock_count, amdsmi_sock_info_t* soc_info);
8758
8771
8792 bool* r_mask, uint32_t* mask0, uint32_t* mask1,
8793 uint32_t* mask2);
8794
8797#endif
8798
8799/*****************************************************************************/
8819 amdsmi_nic_driver_info_t* info);
8820
8836 amdsmi_nic_asic_info_t* info);
8837
8853 amdsmi_nic_bus_info_t* info);
8854
8870 amdsmi_nic_numa_info_t* info);
8871
8887 amdsmi_nic_port_info_t* info);
8888
8904 amdsmi_nic_rdma_devices_info_t* info);
8905
8929 uint32_t rdma_port_index, uint32_t* num_stats,
8930 amdsmi_nic_stat_t* stats);
8931
8978#define AMDSMI_MAX_CARVEOUT_OPTIONS 16
8985typedef struct {
8986 uint32_t index;
8988} amdsmi_uma_carveout_option_t;
8989
8995typedef struct {
8996 uint32_t current_index;
8997 uint32_t num_options;
8999 options[AMDSMI_MAX_CARVEOUT_OPTIONS];
9000} amdsmi_uma_carveout_info_t;
9001
9007typedef struct {
9008 uint64_t current_pages;
9009} amdsmi_ttm_info_t;
9010
9033 amdsmi_uma_carveout_info_t* info);
9034
9057 uint32_t option_index);
9058
9079
9100
9118
9121#ifdef __cplusplus
9122}
9123#endif // __cplusplus
9124
9125#endif // __AMDSMI_H__
amdsmi_accelerator_partition_resource_type_t
Accelerator Partition Resource Types.
Definition amdsmi.h:484
#define AMDSMI_MAX_NUM_XCP
This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Gr...
Definition amdsmi.h:182
#define AMDSMI_MAX_NUM_XCC
This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units...
Definition amdsmi.h:168
amdsmi_vram_type_t
vRam Types. This enum is used to identify various VRam types.
Definition amdsmi.h:737
amdsmi_event_group_t
Event Groups Enum denoting an event group. The value of the enum is the base value for all the event ...
Definition amdsmi.h:1451
#define AMDSMI_MAX_ACCELERATOR_PARTITIONS
Maximum number of accelerator partitions.
Definition amdsmi.h:70
@ AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT
Definition amdsmi.h:1743
amdsmi_event_type_t
Event types Event type enum. Events belonging to a particular event group amdsmi_event_group_t should...
Definition amdsmi.h:1487
@ AMDSMI_EVNT_XGMI_0_BEATS_TX
Throughput = BEATS/time_running 10^9 bytes/sec.
Definition amdsmi.h:1494
@ AMDSMI_EVNT_XGMI_1_BEATS_TX
Data beats sent to neighbor 1; Each beat represents 32 bytes.
Definition amdsmi.h:1498
#define AMDSMI_MAX_CP_PROFILE_RESOURCES
Maximum number of compute profile resources.
Definition amdsmi.h:69
#define AMDSMI_MAX_UTILIZATION_VALUES
The max number of values per counter type.
Definition amdsmi.h:1868
amdsmi_fw_block_t
The values of this enum are used to identify the various firmware blocks.
Definition amdsmi.h:634
@ AMDSMI_FW_ID_RS64_ME_P0_DATA
Hardware Block RS64 - Micro Engine Partition 0 Data.
Definition amdsmi.h:697
@ AMDSMI_FW_ID_SDMA7
System Direct Memory Access 7 (high speed data transfers)
Definition amdsmi.h:657
@ AMDSMI_FW_ID_PSP_BL
Platform Security Processor Bootloader (initial firmware)
Definition amdsmi.h:680
@ AMDSMI_FW_ID_PSP_SOSDRV
Platform Security Processor Secure Operating System Driver.
Definition amdsmi.h:673
@ AMDSMI_FW_ID_TA_RAS
Trusted Applications - Reliability Availability and Serviceability.
Definition amdsmi.h:722
@ AMDSMI_FW_ID_RLC_SRLS
Rasterizier and L2 Cache - Shared Resource Local Segment.
Definition amdsmi.h:725
@ AMDSMI_FW_ID_SDMA6
System Direct Memory Access 6 (high speed data transfers)
Definition amdsmi.h:656
@ AMDSMI_FW_ID_CP_CE
Compute Processor - Command_Engine (fetch, decode, dispatch)
Definition amdsmi.h:638
@ AMDSMI_FW_ID_RS64_ME_P1_DATA
Hardware Block RS64 - Micro Engine Partition 1 Data.
Definition amdsmi.h:698
@ AMDSMI_FW_ID_SDMA0
System Direct Memory Access 0 (high speed data transfers)
Definition amdsmi.h:650
@ AMDSMI_FW_ID_ISP
Image Signal Processor (processing raw image data from sensors)
Definition amdsmi.h:661
@ AMDSMI_FW_ID_CP_PM4
Compute Processor Packet Processor 4 (processing command packets)
Definition amdsmi.h:681
@ AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1
Hardware Block RLX6 Core 1 - Dynamic RAM Boot.
Definition amdsmi.h:718
@ AMDSMI_FW_ID_IMU_IRAM
Input/Output Memory Management Unit - Instruction RAM.
Definition amdsmi.h:686
@ AMDSMI_FW_ID_SDMA3
System Direct Memory Access 3 (high speed data transfers)
Definition amdsmi.h:653
@ AMDSMI_FW_ID_SDMA1
System Direct Memory Access 1 (high speed data transfers)
Definition amdsmi.h:651
@ AMDSMI_FW_ID_SDMA4
System Direct Memory Access 4 (high speed data transfers)
Definition amdsmi.h:654
@ AMDSMI_FW_ID_RLC_SRLG
Rasterizier and L2 Cache - Shared Resource Local Group.
Definition amdsmi.h:724
@ AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL
Rasterizier and L2 Cache Restore List Control.
Definition amdsmi.h:669
@ AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST
Rasterizier and L2 Cache - Save Restore List.
Definition amdsmi.h:720
@ AMDSMI_FW_ID_CP_PFP
Compute Processor - Pixel Front End Processor (pixelating process)
Definition amdsmi.h:639
@ AMDSMI_FW_ID_REG_ACCESS_WHITELIST
Register Access Whitelist (Prevent unathorizied access)
Definition amdsmi.h:684
@ AMDSMI_FW_ID_SDMA5
System Direct Memory Access 5 (high speed data transfers)
Definition amdsmi.h:655
@ AMDSMI_FW_ID_SDMA2
System Direct Memory Access 2 (high speed data transfers)
Definition amdsmi.h:652
@ AMDSMI_FW_ID_DMCU_ERAM
Digital Micro Controller Unit - Embedded RAM (memory used by DMU)
Definition amdsmi.h:662
@ AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_SCLK
Stable power state with minimum system clock.
Definition amdsmi.h:1431
@ AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_MCLK
Stable power state with minimum memory clock.
Definition amdsmi.h:1430
@ AMDSMI_DEV_PERF_LEVEL_LOW
Keep PowerPlay levels "low", regardless of workload.
Definition amdsmi.h:1424
@ AMDSMI_DEV_PERF_LEVEL_HIGH
Keep PowerPlay levels "high", regardless of workload.
Definition amdsmi.h:1425
@ AMDSMI_PROCESSOR_TYPE_AMD_APU
AMD Accelerated processor type, GPU and CPU on a single die.
Definition amdsmi.h:356
@ AMDSMI_PROCESSOR_TYPE_AMD_CPU
AMD CPU processor type, physical component that holds the CPU.
Definition amdsmi.h:351
amdsmi_processor_type_t processor_type_t
Backward-compatibility alias for amdsmi_processor_type_t.
Definition amdsmi.h:371
amdsmi_voltage_metric_t
Voltage Metrics. This enum is used to identify various Voltage metrics. Corresponding values will be ...
Definition amdsmi.h:1618
amdsmi_nic_link_type_t
NIC Link Types. This enum is used to identify the link type between NIC and GPU processors based on t...
Definition amdsmi.h:2877
#define AMDSMI_MAX_NUM_JPEG_ENG_V1
Introduced in gpu metrics v1.8, document presents NUM_JPEG_ENG_V1 but will change to AMDSMI_MAX_NUM_J...
Definition amdsmi.h:155
amdsmi_voltage_type_t
This ennumeration is used to indicate which type of voltage reading should be obtained.
Definition amdsmi.h:1639
#define AMDSMI_MAX_NUM_CLKS_PER_MID
Maximum number of clocks per MID supported.
Definition amdsmi.h:225
void * amdsmi_processor_handle
opaque handler point to underlying implementation
Definition amdsmi.h:294
@ AMDSMI_STATUS_DIRECTORY_NOT_FOUND
Error when a directory is not found, maps to ENOTDIR.
Definition amdsmi.h:403
@ AMDSMI_STATUS_INSUFFICIENT_SIZE
Not enough resources were available for the operation.
Definition amdsmi.h:414
@ AMDSMI_STATUS_INIT_ERROR
An error occurred when initializing internal data structures.
Definition amdsmi.h:401
@ AMDSMI_STATUS_MORE_DATA
There is more data than the buffer size the user passed.
Definition amdsmi.h:412
@ AMDSMI_STATUS_UNEXPECTED_DATA
The data read or provided is not what was expected.
Definition amdsmi.h:416
@ AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
The provided input is out of allowable or safe range.
Definition amdsmi.h:400
@ AMDSMI_STATUS_REFCOUNT_OVERFLOW
An internal reference counter exceeded INT32_MAX.
Definition amdsmi.h:402
#define AMDSMI_MAX_NUM_CLKS_PER_AID
Maximum number of clocks per AID supported.
Definition amdsmi.h:224
#define AMDSMI_MAX_NUM_PM_POLICIES
Maximum number of power management policies.
Definition amdsmi.h:1931
amdsmi_ptl_data_format_t
PTL (Peak Tops Limiter) data format types These correspond to the hardware data types used in matrix ...
Definition amdsmi.h:2616
void * amdsmi_cpusocket_handle
opaque handler point to underlying implementation
Definition amdsmi.h:311
amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values ...
Definition amdsmi.h:1581
amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the processor a temperature reading should be...
Definition amdsmi.h:541
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR
Definition amdsmi.h:563
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD3
VDDCR VDD3 voltage regulator temperature.
Definition amdsmi.h:573
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_A
VDDCR SOC A voltage regulator temperature.
Definition amdsmi.h:574
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR
Definition amdsmi.h:611
@ AMDSMI_TEMPERATURE_TYPE_HOTSPOT
Hottest temperature reported for entire die.
Definition amdsmi.h:544
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_085_HBM
VDD 0.85V HBM voltage regulator temperature.
Definition amdsmi.h:578
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2
VDDCR VDD2 voltage regulator temperature.
Definition amdsmi.h:572
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_D
Definition amdsmi.h:581
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR
Definition amdsmi.h:607
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_USR
VDD USR voltage regulator temperature.
Definition amdsmi.h:583
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR
Definition amdsmi.h:561
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_C
VDDCR SOC C voltage regulator temperature.
Definition amdsmi.h:575
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_A
VDDCR SOCIO A voltage regulator temperature.
Definition amdsmi.h:576
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR
Definition amdsmi.h:613
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1
VDDCR VDD1 voltage regulator temperature.
Definition amdsmi.h:571
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_C
VDDCR SOCIO C voltage regulator temperature.
Definition amdsmi.h:577
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR
Definition amdsmi.h:609
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0
VDDCR VDD0 voltage regulator temperature.
Definition amdsmi.h:569
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_0V72_VR
Definition amdsmi.h:601
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_3V3_VR
Definition amdsmi.h:603
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32
VDDIO 1.1V E32 voltage regulator temperature.
Definition amdsmi.h:584
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR
Definition amdsmi.h:617
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_B
Definition amdsmi.h:579
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR
Definition amdsmi.h:559
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR
Definition amdsmi.h:605
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR
Definition amdsmi.h:615
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR
Definition amdsmi.h:619
amdsmi_power_profile_preset_masks_t
Pre-set Profile Selections. These bitmasks can be AND'd with the amdsmi_power_profile_status_t....
Definition amdsmi.h:1656
amdsmi_compute_partition_type_t
Compute Partition. This enum is used to identify various compute partitioning settings.
Definition amdsmi.h:499
amdsmi_status_t amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index)
Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_pr...
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config)
Returns gpu accelerator partition caps as currently configured in the system.
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id)
Returns current gpu accelerator partition cap.
amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info)
Returns the power caps as currently configured in the system.
amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info)
Returns the PCIe info for the GPU.
amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info)
Returns vram info.
amdsmi_status_t amdsmi_get_gpu_xcd_counter(amdsmi_processor_handle processor_handle, uint16_t *xcd_count)
Returns the 'xcd_counter' from the GPU metrics associated with the device.
amdsmi_status_t amdsmi_get_gpu_kfd_info(amdsmi_processor_handle processor_handle, amdsmi_kfd_info_t *info)
Returns the KFD (Kernel Fusion Driver) information for the device.
amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info)
Returns the board part number and board information for the requested device.
amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info)
Returns the ASIC information for the device.
amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd)
Get the xgmi per-link power down policy parameter for the processor.
amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the xgmi per-link power down policy parameter for the processor.
amdsmi_status_t amdsmi_clean_gpu_local_data(amdsmi_processor_handle processor_handle)
Run the cleaner shader to clean up data in LDS/GPRs.
amdsmi_status_t amdsmi_set_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t perf_lvl)
Set the PowerPlay performance level associated with the device with provided processor handle with th...
amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy)
Get the soc pstate policy for the processor.
amdsmi_status_t amdsmi_set_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t od)
Set the overdrive percent associated with the device with provided processor handle with the provided...
amdsmi_status_t amdsmi_set_gpu_process_isolation(amdsmi_processor_handle processor_handle, uint32_t pisolate)
Enable/disable the system Process Isolation.
amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the soc pstate policy for the processor.
amdsmi_status_t amdsmi_get_gpu_process_isolation(amdsmi_processor_handle processor_handle, uint32_t *pisolate)
Get the status of the Process Isolation.
amdsmi_status_t amdsmi_set_clk_freq(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, uint64_t freq_bitmask)
Control the set of allowed frequencies that can be used for the specified clock. It is not supported ...
amdsmi_status_t amdsmi_get_gpu_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics)
This function retrieves the gpu metrics information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_power_profile_presets(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_profile_status_t *status)
Get the list of available preset power profiles and an indication of which profile is currently activ...
amdsmi_status_t amdsmi_get_gpu_busy_percent(amdsmi_processor_handle processor_handle, uint32_t *gpu_busy_percent)
Get GPU busy percent from gpu_busy_percent sysfs file.
amdsmi_status_t amdsmi_set_gpu_clk_limit(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_limit_type_t limit_type, uint64_t clk_value)
This function sets the clock sets the clock min/max level.
amdsmi_status_t amdsmi_get_gpu_pm_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_name_value_t **pm_metrics, uint32_t *num_of_metrics)
Get the pm metrics table with provided device index.
amdsmi_status_t amdsmi_get_utilization_count(amdsmi_processor_handle processor_handle, amdsmi_utilization_counter_t utilization_counters[], uint32_t count, uint64_t *timestamp)
Get coarse grain utilization counter of the specified device.
amdsmi_status_t amdsmi_get_gpu_metrics_header_info(amdsmi_processor_handle processor_handle, amd_metrics_table_header_t *header_value)
Get the 'metrics_header_info' from the GPU metrics associated with the device.
amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle)
Triggers a chain that resets all GPUs. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_od_volt_info(amdsmi_processor_handle processor_handle, uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue)
This function sets 1 of the 3 voltage curve points. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_partition_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics)
This function retrieves the partition metrics information.
amdsmi_status_t amdsmi_set_gpu_clk_range(amdsmi_processor_handle processor_handle, uint64_t minclkvalue, uint64_t maxclkvalue, amdsmi_clk_type_t clkType)
This function sets the clock range information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_mem_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od)
Get the GPU memory clock overdrive percent associated with the device with provided processor handle....
amdsmi_status_t amdsmi_get_clk_freq(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_frequencies_t *f)
Get the list of possible system clock speeds of device for a specified clock type....
amdsmi_status_t amdsmi_get_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t *perf)
Get the performance level of the device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_perf_determinism_mode(amdsmi_processor_handle processor_handle, uint64_t clkvalue)
Enter performance determinism mode with provided processor handle. It is not supported on virtual mac...
amdsmi_status_t amdsmi_get_gpu_od_volt_info(amdsmi_processor_handle processor_handle, amdsmi_od_volt_freq_data_t *odv)
This function retrieves the overdrive GFX & MCLK information. If valid for the GPU it will also popul...
amdsmi_status_t amdsmi_get_gpu_od_volt_curve_regions(amdsmi_processor_handle processor_handle, uint32_t *num_regions, amdsmi_freq_volt_region_t *buffer)
This function will retrieve the current valid regions in the frequency/voltage space....
amdsmi_status_t amdsmi_get_gpu_reg_table_info(amdsmi_processor_handle processor_handle, amdsmi_reg_type_t reg_type, amdsmi_name_value_t **reg_metrics, uint32_t *num_of_metrics)
Get the register metrics table with provided device index and register type.
amdsmi_status_t amdsmi_get_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od)
Get the overdrive percent associated with the device with provided processor handle....
amdsmi_status_t amdsmi_set_gpu_od_clk_info(amdsmi_processor_handle processor_handle, amdsmi_freq_ind_t level, uint64_t clkvalue, amdsmi_clk_type_t clkType)
This function sets the clock frequency information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_compute_partition(amdsmi_processor_handle processor_handle, amdsmi_compute_partition_type_t compute_partition)
Modifies a selected device's compute partition setting.
amdsmi_status_t amdsmi_get_gpu_compute_partition(amdsmi_processor_handle processor_handle, char *compute_partition, uint32_t len)
Retrieves the current compute partitioning for a desired device.
amdsmi_status_t amdsmi_gpu_driver_reload(void)
Restart the device driver (kmod module) for all AMD GPUs on the system.
amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec)
Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU....
amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec)
Retrieve the error counts for a GPU block. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks)
Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string)
Get a description of a provided AMDSMI error status.
amdsmi_status_t amdsmi_get_gpu_ecc_status(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state)
Retrieve the ECC status for a GPU block. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_cpu_current_io_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *io_bw)
Get current input output bandwidth.
amdsmi_status_t amdsmi_get_cpu_current_xgmi_bw(amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *xgmi_bw)
Get current input output bandwidth.
amdsmi_status_t amdsmi_get_cpu_model_name(amdsmi_processor_handle processor_handle, amdsmi_cpu_info_t *cpu_info)
Retrieve the CPU processor model name based on the processor index.
amdsmi_status_t amdsmi_first_online_core_on_cpu_socket(amdsmi_processor_handle processor_handle, uint32_t *pcore_ind)
Get first online core on socket.
amdsmi_status_t amdsmi_get_cpu_socket_count(uint32_t *sock_count)
Get CPU socket count from sys filesystem.
amdsmi_status_t amdsmi_get_cpu_enabled_commands(amdsmi_processor_handle processor_handle, bool *r_mask, uint32_t *mask0, uint32_t *mask1, uint32_t *mask2)
Get HSMP Enabled Commands information for a given CPU socket.
amdsmi_status_t amdsmi_get_cpu_cores_per_socket(uint32_t sock_count, amdsmi_sock_info_t *soc_info)
Get cpu cores per socket from sys filesystem.
amdsmi_status_t amdsmi_get_esmi_err_msg(amdsmi_status_t status, const char **status_string)
Get a description of provided AMDSMI error status for esmi errors.
amdsmi_status_t amdsmi_get_cpu_ddr_bw(amdsmi_processor_handle processor_handle, amdsmi_ddr_bw_metrics_t *ddr_bw)
Get the DDR bandwidth data.
amdsmi_status_t amdsmi_set_cpu_dfc_ctrl(amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl)
Set the DFCState enabling control.
amdsmi_status_t amdsmi_get_cpu_dfc_ctrl(amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl)
Get the current DFCState enabling control status.
amdsmi_status_t amdsmi_get_cpu_dimm_power_consumption(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_power_t *dimm_pow)
Get DIMM power consumption.
amdsmi_status_t amdsmi_get_cpu_dimm_temp_range_and_refresh_rate(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_temp_range_refresh_rate_t *rate)
Get DIMM temperature range and refresh rate.
amdsmi_status_t amdsmi_get_cpu_dimm_sb_reg(amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t *data)
Read DIMM sideband register data.
amdsmi_status_t amdsmi_get_cpu_dimm_thermal_sensor(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_thermal_t *dimm_temp)
Get DIMM thermal sensor value.
amdsmi_status_t amdsmi_set_cpu_dimm_sb_reg(amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t write_data)
Write Data to DIMM Sideband Register.
amdsmi_status_t amdsmi_get_cpu_socket_energy(amdsmi_processor_handle processor_handle, uint64_t *penergy)
Get the socket energy for a given socket.
amdsmi_status_t amdsmi_get_cpu_core_energy(amdsmi_processor_handle processor_handle, uint64_t *penergy)
Get the core energy for a given core.
amdsmi_status_t amdsmi_set_cpu_gmi3_link_width_range(amdsmi_processor_handle processor_handle, uint8_t min_link_width, uint8_t max_link_width)
Set gmi3 link width range.
amdsmi_status_t amdsmi_get_hsmp_metrics_table(amdsmi_processor_handle processor_handle, amdsmi_hsmp_metrics_table_t *metrics_table)
Get HSMP metrics table.
amdsmi_status_t amdsmi_get_hsmp_metrics_table_version(amdsmi_processor_handle processor_handle, uint32_t *metrics_version)
Get HSMP metrics table version.
amdsmi_status_t amdsmi_get_cpu_fclk_mclk(amdsmi_processor_handle processor_handle, uint32_t *fclk, uint32_t *mclk)
Get Data fabric clock and Memory clock in MHz.
amdsmi_status_t amdsmi_get_cpu_rail_isofreq_policy(amdsmi_processor_handle processor_handle, uint8_t *rail_isofreq_policy)
Get CPU rail isolated frequency policy status for independent core clock control per power rail.
amdsmi_status_t amdsmi_get_cpu_prochot_status(amdsmi_processor_handle processor_handle, uint32_t *prochot)
Get normalized status of the processor's PROCHOT status.
amdsmi_status_t amdsmi_get_cpu_hsmp_driver_version(amdsmi_processor_handle processor_handle, amdsmi_hsmp_driver_version_t *amdsmi_hsmp_driver_ver)
Get HSMP Driver Version.
amdsmi_status_t amdsmi_get_cpu_hsmp_proto_ver(amdsmi_processor_handle processor_handle, uint32_t *proto_ver)
Get HSMP protocol Version.
amdsmi_status_t amdsmi_get_cpu_smu_fw_version(amdsmi_processor_handle processor_handle, amdsmi_smu_fw_version_t *amdsmi_smu_fw)
Get SMU Firmware Version.
amdsmi_status_t amdsmi_get_cpu_socket_current_active_freq_limit(amdsmi_processor_handle processor_handle, uint16_t *freq, char **src_type)
Get current active frequency limit of the socket.
amdsmi_status_t amdsmi_get_cpu_core_current_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *freq)
Get socket frequency limit of the core.
amdsmi_status_t amdsmi_get_threads_per_core(uint32_t *threads_per_core)
Get Number of threads Per Core.
amdsmi_status_t amdsmi_get_cpu_socket_freq_range(amdsmi_processor_handle processor_handle, uint16_t *fmax, uint16_t *fmin)
Get socket frequency range.
amdsmi_status_t amdsmi_get_cpu_cclk_limit(amdsmi_processor_handle processor_handle, uint32_t *cclk)
Get core clock in MHz.
amdsmi_status_t amdsmi_set_cpu_rail_isofreq_policy(amdsmi_processor_handle processor_handle, bool *rail_isofreq_policy)
Set CPU rail isolated frequency policy for independent core clock control per power rail.
amdsmi_status_t amdsmi_get_cpu_freq_range(uint32_t *fmax, uint32_t *fmin)
Get the CPU socket frequency range.
amdsmi_status_t amdsmi_set_cpu_sdps_limit(amdsmi_processor_handle processor_handle, uint32_t sdps_limit)
Set the SDPS(Socket DIMM Power Sloshing) limit for a given processor socket.
amdsmi_status_t amdsmi_set_cpu_core_boostlimit(amdsmi_processor_handle processor_handle, uint32_t boostlimit)
Set the core boostlimit value.
amdsmi_status_t amdsmi_get_cpu_sdps_limit(amdsmi_processor_handle processor_handle, uint32_t *sdps_limit)
Get the current SDPS limit for a given processor socket.
amdsmi_status_t amdsmi_get_cpu_socket_c0_residency(amdsmi_processor_handle processor_handle, uint32_t *pc0_residency)
Get the socket c0 residency.
amdsmi_status_t amdsmi_set_cpu_msr_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq)
Set CPU floor limit frequency via MSR(Model Specific Register).
amdsmi_status_t amdsmi_set_cpu_socket_boostlimit(amdsmi_processor_handle processor_handle, uint32_t boostlimit)
Set the socket boostlimit value.
amdsmi_status_t amdsmi_get_cpu_core_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *floor_freq)
Get the CPU core floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *floor_freq)
Get the CPU floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_core_eff_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq)
Get the CPU core effective floor limit frequency.
amdsmi_status_t amdsmi_set_cpu_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t floor_freq)
Set the CPU socket floor limit frequency.
amdsmi_status_t amdsmi_set_cpu_core_msr_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq)
Set CPU core MSR floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_core_boostlimit(amdsmi_processor_handle processor_handle, uint32_t *pboostlimit)
Get the core boost limit.
amdsmi_status_t amdsmi_get_cpu_eff_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq)
Get the CPU effective floor limit frequency.
amdsmi_status_t amdsmi_set_cpu_core_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t floor_freq)
Set the CPU core floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_socket_power_cap_max(amdsmi_processor_handle processor_handle, uint32_t *pmax)
Get the maximum power cap value for a given socket.
amdsmi_status_t amdsmi_set_gpu_power_profile(amdsmi_processor_handle processor_handle, uint32_t reserved, amdsmi_power_profile_preset_masks_t profile)
Set the power performance profile. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_cpu_socket_power_cap(amdsmi_processor_handle processor_handle, uint32_t pcap)
Set the power cap value for a given socket.
amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap)
Set the maximum gpu power cap value. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_cpu_socket_power(amdsmi_processor_handle processor_handle, uint32_t *ppower)
Get the socket power.
amdsmi_status_t amdsmi_get_cpu_core_ccd_power(amdsmi_processor_handle processor_handle, uint32_t *power)
Read CCD (Core Complex Die) power consumption.
amdsmi_status_t amdsmi_get_supported_power_cap(amdsmi_processor_handle processor_handle, uint32_t *sensor_count, uint32_t *sensor_inds, amdsmi_power_cap_type_t *sensor_types)
Query the supported power cap sensors and their types for a device.
amdsmi_status_t amdsmi_get_cpu_socket_power_cap(amdsmi_processor_handle processor_handle, uint32_t *pcap)
Get the socket power cap.
amdsmi_status_t amdsmi_get_cpu_pwr_svi_telemetry_all_rails(amdsmi_processor_handle processor_handle, uint32_t *power)
Get the SVI based power telemetry for all rails.
amdsmi_status_t amdsmi_set_cpu_pwr_efficiency_mode(amdsmi_processor_handle processor_handle, uint8_t power_efficiency_mode, uint32_t *utilization, uint32_t *ppt_limit)
Set the power efficiency profile policy.
amdsmi_status_t amdsmi_get_cpu_pwr_efficiency_mode(amdsmi_processor_handle processor_handle, uint32_t *power_efficiency_mode, uint32_t *utilization, uint32_t *ppt_limit)
Get the power efficiency profile policy.
amdsmi_status_t amdsmi_get_cpu_handles(uint32_t *cpu_count, amdsmi_processor_handle *processor_handles)
Get the list of cpu handles in the system.
amdsmi_status_t amdsmi_get_cpucore_handles(uint32_t *cores_count, amdsmi_processor_handle *processor_handles)
Get the list of the cpu core handles in a system.
amdsmi_status_t amdsmi_cpu_apb_disable(amdsmi_processor_handle processor_handle, uint8_t pstate)
Disable APB.
amdsmi_status_t amdsmi_set_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle, uint8_t nbio_id, uint8_t min, uint8_t max)
Set NBIO lclk dpm level value.
amdsmi_status_t amdsmi_set_cpu_xgmi_pstate_range(amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate)
Set the Min and Max XGMI PState Range.
amdsmi_status_t amdsmi_get_cpu_pc6_enable(amdsmi_processor_handle processor_handle, uint8_t *enabled)
Get the PC6 Enable State.
amdsmi_status_t amdsmi_get_cpu_xgmi_pstate_range(amdsmi_processor_handle processor_handle, uint8_t *min_pstate, uint8_t *max_pstate)
Get the Max and Min XGMI PState Range.
amdsmi_status_t amdsmi_set_cpu_pcie_link_rate(amdsmi_processor_handle processor_handle, uint8_t rate_ctrl, uint8_t *prev_mode)
Set pcie link rate.
amdsmi_status_t amdsmi_get_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle, uint8_t nbio_id, amdsmi_dpm_level_t *nbio)
Get NBIO LCLK dpm level.
amdsmi_status_t amdsmi_set_cpu_cc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable)
Set the Core C6 Enable State.
amdsmi_status_t amdsmi_set_cpu_pc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable)
Set the PC6 Enable State.
amdsmi_status_t amdsmi_set_cpu_df_pstate_range(amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate)
Set df pstate range.
amdsmi_status_t amdsmi_get_cpu_cc6_enable(amdsmi_processor_handle processor_handle, uint8_t *enabled)
Get the Core C6 Enable State.
amdsmi_status_t amdsmi_cpu_apb_enable(amdsmi_processor_handle processor_handle)
Enable APB.
amdsmi_status_t amdsmi_get_cpu_tdelta(amdsmi_processor_handle processor_handle, uint8_t *tdelta)
Read Thermal Delta (TDELTA) Behavior.
amdsmi_status_t amdsmi_get_cpu_svi3_vr_controller_temp(amdsmi_processor_handle processor_handle, uint32_t *rail_selection, uint32_t *rail_index, uint32_t *temp)
Get Temperature of SVI3 VR(Voltage Rail)
amdsmi_status_t amdsmi_get_cpu_socket_temperature(amdsmi_processor_handle processor_handle, uint32_t *ptmon)
Get socket temperature.
amdsmi_status_t amdsmi_set_cpu_xgmi_width(amdsmi_processor_handle processor_handle, uint8_t min, uint8_t max)
Set xgmi width.
amdsmi_status_t amdsmi_set_gpu_event_notification_mask(amdsmi_processor_handle processor_handle, uint64_t mask)
Specify which events to collect for a device.
amdsmi_status_t amdsmi_stop_gpu_event_notification(amdsmi_processor_handle processor_handle)
Close any file handles and free any resources used by event notification for a GPU.
amdsmi_status_t amdsmi_init_gpu_event_notification(amdsmi_processor_handle processor_handle)
Prepare to collect event notifications for a GPU.
amdsmi_status_t amdsmi_get_gpu_event_notification(int timeout_ms, uint32_t *num_elem, amdsmi_evt_notification_data_t *data)
Collect event notifications, waiting a specified amount of time.
amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info)
Returns the static information for the vBIOS on the device.
amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on the device.
amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info)
Returns the current power and voltage of the GPU.
amdsmi_status_t amdsmi_get_gpu_vram_usage(amdsmi_processor_handle processor_handle, amdsmi_vram_usage_t *info)
Returns the VRAM usage (both total and used memory) in MegaBytes.
amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature)
Get the temperature metric value for the specified metric, from the specified temperature sensor on t...
amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info)
Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentag...
amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info)
Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory....
amdsmi_status_t amdsmi_get_violation_status(amdsmi_processor_handle processor_handle, amdsmi_violation_status_t *info)
Returns the violations for a processor.
amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled)
Returns is power management enabled.
amdsmi_status_t amdsmi_topo_get_link_type(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *hops, amdsmi_link_type_t *type)
Retrieve the hops and the connection type between 2 GPUs.
amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node)
Retrieve the NUMA CPU node number for a device.
amdsmi_status_t amdsmi_get_minmax_bandwidth_between_processors(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *min_bandwidth, uint64_t *max_bandwidth)
Retrieve minimal and maximal io link bandwidth between 2 GPUs.
amdsmi_status_t amdsmi_is_P2P_accessible(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, bool *accessible)
Return P2P availability status between 2 GPUs.
amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics)
Return link metric information.
amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap)
Retrieve connection type and P2P capabilities between 2 GPUs.
amdsmi_status_t amdsmi_topo_get_link_weight(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *weight)
Retrieve the weight for a connection between 2 GPUs.
amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info)
Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level.
amdsmi_status_t amdsmi_get_gpu_subsystem_name(amdsmi_processor_handle processor_handle, char *name, size_t len)
Get the name string for the device subsystem.
amdsmi_status_t amdsmi_get_gpu_revision(amdsmi_processor_handle processor_handle, uint16_t *revision)
Get the device revision associated with the device.
amdsmi_status_t amdsmi_get_gpu_vendor_name(amdsmi_processor_handle processor_handle, char *name, size_t len)
Get the name string for a give vendor ID.
amdsmi_status_t amdsmi_get_gpu_id(amdsmi_processor_handle processor_handle, uint16_t *id)
Get the device id associated with the device with provided device handler.
amdsmi_status_t amdsmi_get_gpu_vram_vendor(amdsmi_processor_handle processor_handle, char *brand, uint32_t len)
Get the vram vendor string of a device.
amdsmi_status_t amdsmi_get_gpu_subsystem_id(amdsmi_processor_handle processor_handle, uint16_t *id)
Get the subsystem device id associated with the device with provided processor handle.
amdsmi_status_t amdsmi_get_gpu_uma_carveout_info(amdsmi_processor_handle processor_handle, amdsmi_uma_carveout_info_t *info)
Get UMA carveout configuration information.
amdsmi_status_t amdsmi_set_ttm_pages_limit(uint64_t pages)
Set TTM pages limit.
amdsmi_status_t amdsmi_get_ttm_info(amdsmi_ttm_info_t *info)
Get TTM configuration information.
amdsmi_status_t amdsmi_reset_ttm_pages_limit(void)
Reset TTM pages limit to system default.
amdsmi_status_t amdsmi_set_gpu_uma_carveout(amdsmi_processor_handle processor_handle, uint32_t option_index)
Set UMA carveout configuration.
amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config)
Returns current gpu memory partition capabilities.
amdsmi_status_t amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode)
Sets memory partition mode Set memory partition setting based on memory_partition mode from amdsmi_ge...
amdsmi_status_t amdsmi_get_gpu_memory_partition(amdsmi_processor_handle processor_handle, char *memory_partition, uint32_t len)
Retrieves the current memory partition for a desired device.
amdsmi_status_t amdsmi_set_gpu_memory_partition(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t memory_partition)
Modifies a selected device's current memory partition setting.
amdsmi_status_t amdsmi_get_gpu_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold)
Get the bad pages threshold of a processor. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_memory_total(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *total)
Get the total amount of memory that exists.
amdsmi_status_t amdsmi_get_gpu_ras_block_features_enabled(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state)
Returns if RAS features are enabled or disabled for given block. It is not supported on virtual machi...
amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *info)
Get the bad pages of a processor. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_memory_reserved_pages(amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *records)
Get information about reserved ("retired") memory pages. It is not supported on virtual machine guest...
amdsmi_status_t amdsmi_get_gpu_memory_usage(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *used)
Get the current memory usage.
amdsmi_status_t amdsmi_gpu_validate_ras_eeprom(amdsmi_processor_handle processor_handle)
Verify the checksum of RAS EEPROM. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_nic_rdma_dev_info(amdsmi_processor_handle processor_handle, amdsmi_nic_rdma_devices_info_t *info)
Retrieves RDMA devices information for the NIC.
amdsmi_status_t amdsmi_get_nic_rdma_port_statistics(amdsmi_processor_handle processor_handle, uint32_t rdma_port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats)
Retrieve RDMA port statistics for the NIC.
amdsmi_status_t amdsmi_get_nic_port_info(amdsmi_processor_handle processor_handle, amdsmi_nic_port_info_t *info)
Retrieves PORT information for the NIC.
amdsmi_status_t amdsmi_get_nic_driver_info(amdsmi_processor_handle processor_handle, amdsmi_nic_driver_info_t *info)
Retrieves information about the NIC driver.
amdsmi_status_t amdsmi_get_nic_bus_info(amdsmi_processor_handle processor_handle, amdsmi_nic_bus_info_t *info)
Retrieves BUS information for the NIC.
amdsmi_status_t amdsmi_get_nic_asic_info(amdsmi_processor_handle processor_handle, amdsmi_nic_asic_info_t *info)
Retrieves ASIC information for the NIC.
amdsmi_status_t amdsmi_get_nic_numa_info(amdsmi_processor_handle processor_handle, amdsmi_nic_numa_info_t *info)
Retrieves NUMA information for the NIC.
amdsmi_status_t amdsmi_get_npm_info(amdsmi_node_handle node_handle, amdsmi_npm_info_t *info)
Retrieves node power management (NPM) status and power limit for the specified node.
amdsmi_status_t amdsmi_set_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, uint64_t bw_bitmask)
Control the set of allowed PCIe bandwidths that can be used. It is not supported on virtual machine g...
amdsmi_status_t amdsmi_get_gpu_topo_numa_affinity(amdsmi_processor_handle processor_handle, int32_t *numa_node)
Get the NUMA node associated with a device.
amdsmi_status_t amdsmi_get_gpu_pci_throughput(amdsmi_processor_handle processor_handle, uint64_t *sent, uint64_t *received, uint64_t *max_pkt_sz)
Get PCIe traffic information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth)
Get the list of possible PCIe bandwidths that are available. It is not supported on virtual machine g...
amdsmi_status_t amdsmi_get_gpu_pci_replay_counter(amdsmi_processor_handle processor_handle, uint64_t *counter)
Get PCIe replay counter.
amdsmi_status_t amdsmi_get_gpu_bdf_id(amdsmi_processor_handle processor_handle, uint64_t *bdfid)
Get the unique PCI device identifier associated for a device.
amdsmi_status_t amdsmi_get_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool *enabled)
Get PTL enable/disable state.
amdsmi_status_t amdsmi_set_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool enable)
Set PTL enable/disable state.
amdsmi_status_t amdsmi_set_gpu_ptl_formats(amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t data_format1, amdsmi_ptl_data_format_t data_format2)
Set PTL with specified preferred data formats.
amdsmi_status_t amdsmi_get_gpu_ptl_formats(amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t *data_format1, amdsmi_ptl_data_format_t *data_format2)
Get PTL (Peak Tops Limiter) formats for the processor.
amdsmi_status_t amdsmi_get_gpu_available_counters(amdsmi_processor_handle processor_handle, amdsmi_event_group_t grp, uint32_t *available)
Get the number of currently available counters. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_read_counter(amdsmi_event_handle_t evt_handle, amdsmi_counter_value_t *value)
Read the current value of a performance counter.
amdsmi_status_t amdsmi_gpu_control_counter(amdsmi_event_handle_t evt_handle, amdsmi_counter_command_t cmd, void *cmd_args)
Issue performance counter control commands. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_counter_group_supported(amdsmi_processor_handle processor_handle, amdsmi_event_group_t group)
Tell if an event group is supported by a given device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_destroy_counter(amdsmi_event_handle_t evnt_handle)
Deallocate a performance counter object.
amdsmi_status_t amdsmi_gpu_create_counter(amdsmi_processor_handle processor_handle, amdsmi_event_type_t type, amdsmi_event_handle_t *evnt_handle)
Create a performance counter object.
amdsmi_status_t amdsmi_set_gpu_fan_speed(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t speed)
Set the fan speed for the specified device with the provided speed, in RPMs. It is not supported on v...
amdsmi_status_t amdsmi_reset_gpu_fan(amdsmi_processor_handle processor_handle, uint32_t sensor_ind)
Reset the fan to automatic driver control. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_fan_speed(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed)
Get the fan speed for the specified device as a value relative to the maximum fan speed....
amdsmi_status_t amdsmi_get_gpu_fan_speed_max(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t *max_speed)
Get the max. fan speed of the device with provided processor handle. It is not supported on virtual m...
amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info)
Returns gpu cache info.
amdsmi_status_t amdsmi_get_gpu_fan_rpms(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed)
Get the fan speed in RPMs of the device with the specified processor handle and 0-based sensor index....
amdsmi_status_t amdsmi_get_gpu_volt_metric(amdsmi_processor_handle processor_handle, amdsmi_voltage_type_t sensor_type, amdsmi_voltage_metric_t metric, int64_t *voltage)
Get the voltage metric value for the specified metric, from the specified voltage sensor on the speci...
amdsmi_status_t amdsmi_get_energy_count(amdsmi_processor_handle processor_handle, uint64_t *energy_accumulator, float *counter_resolution, uint64_t *timestamp)
Get the energy accumulator counter of the processor with provided processor handle....
amdsmi_status_t amdsmi_get_processor_info(amdsmi_processor_handle processor_handle, size_t len, char *name)
Get information about the given processor.
amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)
Get the list of the processor handles associated to a socket.
amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, amdsmi_processor_type_t *processor_type)
Get the processor type of the processor_handle.
amdsmi_status_t amdsmi_get_processor_handles_by_type(amdsmi_socket_handle socket_handle, amdsmi_processor_type_t processor_type, amdsmi_processor_handle *processor_handles, uint32_t *processor_count)
Returns a list of processor handles of the specified type in the system.
amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the device.
amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name)
Get information about the given socket.
amdsmi_status_t amdsmi_get_node_handle(amdsmi_processor_handle processor_handle, amdsmi_node_handle *node_handle)
Get the node handle associated with processor handle.
amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode)
Returns the virtualization mode for the target device.
amdsmi_status_t amdsmi_get_gpu_enumeration_info(amdsmi_processor_handle processor_handle, amdsmi_enumeration_info_t *info)
Returns the Enumeration information for the device.
amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles)
Get the list of socket handles in the system.
amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle)
Get processor handle with the matching bdf.
amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given GPU device.
amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope)
Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node...
amdsmi_status_t amdsmi_get_processor_count_from_handles(amdsmi_processor_handle *processor_handles, uint32_t *processor_count, uint32_t *nr_cpusockets, uint32_t *nr_cpucores, uint32_t *nr_gpus)
Get respective processor counts from the processor handles.
amdsmi_status_t amdsmi_get_gpu_process_list(amdsmi_processor_handle processor_handle, uint32_t *max_processes, amdsmi_proc_info_t *list)
Returns the list of process information running on a given GPU. If pdh.dll is not present on the syst...
amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids)
Get the AFIDs from CPER buffer.
amdsmi_status_t amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)
Retrieve CPER entries cached in the driver.
amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature)
Returns RAS features info.
amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info)
Returns the driver version information.
amdsmi_status_t amdsmi_get_gpu_compute_process_info(amdsmi_process_info_t *procs, uint32_t *num_items)
Get process information about processes currently using GPU.
amdsmi_status_t amdsmi_get_gpu_compute_process_info_by_pid(uint32_t pid, amdsmi_process_info_t *proc)
Get process information about a specific process.
amdsmi_status_t amdsmi_get_gpu_compute_process_gpus(uint32_t pid, uint32_t *dv_indices, uint32_t *num_devices)
Get the device indices currently being used by a process.
amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version)
Get the build version information for the currently running build of AMDSMI.
amdsmi_status_t amdsmi_get_gpu_xgmi_link_status(amdsmi_processor_handle processor_handle, amdsmi_xgmi_link_status_t *link_status)
Get the XGMI link status.
amdsmi_status_t amdsmi_gpu_xgmi_error_status(amdsmi_processor_handle processor_handle, amdsmi_xgmi_status_t *status)
Retrieve the XGMI error status for a device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_reset_gpu_xgmi_error(amdsmi_processor_handle processor_handle)
Reset the XGMI error status for a device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_xgmi_info(amdsmi_processor_handle processor_handle, amdsmi_xgmi_info_t *info)
Returns XGMI information for the GPU.
Structure holds the gpu metrics table header for a device.
Definition amdsmi.h:2028
Accelerator Partition Profile Configurations.
Definition amdsmi.h:1197
Accelerator Partition Resource Profile.
Definition amdsmi.h:1167
Accelerator Partition Resources. This struct is used to identify various partition resource profiles.
Definition amdsmi.h:1184
Definition amdsmi.h:5570
Definition amdsmi.h:5549
DIMM temperature(°C) and update rate(ms) and dimm address.
Definition amdsmi.h:2678
max and min LCLK DPM level on a given NBIO ID. Valid max and min DPM level values are 0 - 1.
Definition amdsmi.h:2716
Engine Usage amdsmi_engine_usage_t: This structure holds common GPU activity values seen in both BM o...
Definition amdsmi.h:1348
Event notification data returned from event notification API.
Definition amdsmi.h:1569
This structure holds 2 amdsmi_range_t's, one for frequency and one for voltage. These 2 ranges indica...
Definition amdsmi.h:1989
This structure holds information about clock frequencies.
Definition amdsmi.h:1913
Ras policy info structure for storing version and different ras policy version structures.
Definition amdsmi.h:1763
The following structures hold the gpu statistics for a device.
Definition amdsmi.h:2043
This structure holds HSMP Driver version information.
Definition amdsmi.h:318
HSMP Metrics table (supported only with hsmp proto version 6).
Definition amdsmi.h:2726
LINK name and Bandwidth type Information.It contains link names i.e valid link names are "P0",...
Definition amdsmi.h:2705
Memory Partition Configuration. This structure is used to identify various memory partition configura...
Definition amdsmi.h:1150
This structure represents a point on the frequency-voltage plane.
Definition amdsmi.h:1977
OD Vold Curve AMDSMI_NUM_VOLTAGE_CURVE_POINTS number of amdsmi_od_vddc_point_t's.
Definition amdsmi.h:2000
This structure holds the frequency-voltage values for a device.
Definition amdsmi.h:2010
This structure holds information about the possible PCIe bandwidths. Specifically,...
Definition amdsmi.h:1955
This structure contains information about which power profiles are supported by the system for a give...
Definition amdsmi.h:1902
This structure contains information specific to a process. Sum of the process memory is not expected ...
Definition amdsmi.h:2541
This structure represents a range (e.g., frequencies or voltages).
Definition amdsmi.h:769
This structure holds SMU Firmware version information.
Definition amdsmi.h:2634
temperature range and refresh rate metrics of a DIMM
Definition amdsmi.h:2657
Definition amdsmi.h:9007
Definition amdsmi.h:8995
Definition amdsmi.h:8985
This structure hold violation status information. Note: for MI3x asics and higher,...
Definition amdsmi.h:805
Definition amdsmi.h:5560
◆ AMDSMI_LIB_VERSION_STRING
| #define AMDSMI_LIB_VERSION_STRING |
Value:
AMDSMI_LIB_VERSION_EXPAND_PARTS(AMDSMI_LIB_VERSION_MAJOR, AMDSMI_LIB_VERSION_MINOR, \
#define AMDSMI_LIB_VERSION_MINOR
Minor version should be updated for each API change, but without changing headers.
Definition amdsmi.h:246
◆ AMDSMI_PF_INDEX
| #define AMDSMI_PF_INDEX (AMDSMI_MAX_VF_COUNT - 1) |
◆ AMDSMI_MAX_DRIVER_INFO_RSVD
◆ AMDSMI_MAX_SPD_DIMM_ADDRESS
| #define AMDSMI_MAX_SPD_DIMM_ADDRESS 0xFF |
◆ AMDSMI_MAX_SPD_LID
| #define AMDSMI_MAX_SPD_LID 0xF |
◆ AMDSMI_MAX_SPD_REG_OFFSET
| #define AMDSMI_MAX_SPD_REG_OFFSET 0x7FF |
◆ AMDSMI_MAX_SPD_REG_SPACE
| #define AMDSMI_MAX_SPD_REG_SPACE 0x1 |
◆ AMDSMI_MAX_SPD_WRITE_DATA
| #define AMDSMI_MAX_SPD_WRITE_DATA 0xFF |
◆ MAX_SVI3_RAIL_INDEX
◆ MAX_SVI3_RAIL_SELECTION
| #define MAX_SVI3_RAIL_SELECTION 1 |
◆ POWER_EFFICIENCY_MODE_4
| #define POWER_EFFICIENCY_MODE_4 0x4 |
◆ POWER_EFFICIENCY_MODE_5
| #define POWER_EFFICIENCY_MODE_5 0x5 |
◆ AMDSMI_MAX_POWER_EFFICIENCY_UTIL
| #define AMDSMI_MAX_POWER_EFFICIENCY_UTIL 0x7F |
◆ AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT
| #define AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT 0x1FFFFF |
◆ AMDSMI_RAIL_INDEX_NONE
| #define AMDSMI_RAIL_INDEX_NONE 0xFFFFFFFF |
◆ AMDSMI_MAX_NUM_FREQUENCIES
| #define AMDSMI_MAX_NUM_FREQUENCIES 33 |
◆ AMDSMI_MAX_FAN_SPEED
| #define AMDSMI_MAX_FAN_SPEED 255 |
Maximum possible value for fan speed for legacy hwmon GPUs. For GPUs with the gpu_od sysfs interface, use amdsmi_get_gpu_fan_speed_max() to query the actual maximum.
◆ AMDSMI_NUM_VOLTAGE_CURVE_POINTS
| #define AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3 |
◆ AMDSMI_EVENT_MASK_FROM_INDEX
| #define AMDSMI_EVENT_MASK_FROM_INDEX | ( | i | ) | (1ULL << ((i) - 1)) |
◆ AMDSMI_MAX_UTILIZATION_VALUES
| #define AMDSMI_MAX_UTILIZATION_VALUES 4 |
◆ AMDSMI_MAX_NUM_PM_POLICIES
| #define AMDSMI_MAX_NUM_PM_POLICIES 32 |
◆ AMDSMI_MAX_NIC_PORTS
| #define AMDSMI_MAX_NIC_PORTS 32 |
◆ AMDSMI_MAX_NIC_RDMA_DEV
| #define AMDSMI_MAX_NIC_RDMA_DEV 32 |
◆ AMDSMI_MAX_NIC_FW
| #define AMDSMI_MAX_NIC_FW 16 |
Typedef Documentation
◆ amdsmi_processor_handle
| typedef void* amdsmi_processor_handle |
◆ amdsmi_socket_handle
◆ amdsmi_node_handle
| typedef void* amdsmi_node_handle |
◆ amdsmi_cpusocket_handle
| typedef void* amdsmi_cpusocket_handle |
◆ processor_type_t
Backward-compatibility alias for amdsmi_processor_type_t.
The unprefixed processor_type_t name is preserved for source-compatibility with callers written before the type was renamed. New code should use amdsmi_processor_type_t, which follows the amdsmi_ typedef prefix convention used throughout this header and is less likely to collide with identifiers defined by other system-management libraries.
◆ amdsmi_process_handle_t
| typedef uint32_t amdsmi_process_handle_t |
◆ amdsmi_event_handle_t
| typedef uintptr_t amdsmi_event_handle_t |
◆ amdsmi_bit_field_t
| typedef uint64_t amdsmi_bit_field_t |
Enumeration Type Documentation
◆ amdsmi_init_flags_t
| enum amdsmi_init_flags_t |
Initialization flags.
Initialization flags may be OR'd together and passed to amdsmi_init().
Definition at line 48 of file amdsmi.h.
48 {
49 AMDSMI_INIT_ALL_PROCESSORS = 0xFFFFFFFF,
50 AMDSMI_INIT_AMD_CPUS = (1 << 0),
51 AMDSMI_INIT_AMD_GPUS = (1 << 1),
52 AMDSMI_INIT_NON_AMD_CPUS = (1 << 2),
53 AMDSMI_INIT_NON_AMD_GPUS = (1 << 3),
56 AMDSMI_INIT_AMD_NICS = (1 << 4)
57} amdsmi_init_flags_t;
◆ amdsmi_mm_ip_t
| enum amdsmi_mm_ip_t |
GPU Capability info.
| Enumerator | |
|---|---|
| AMDSMI_MM_UVD | Multi-Media Unified Video Decoder. |
| AMDSMI_MM_VCE | Multi-Media Video Coding Engine. |
| AMDSMI_MM_VCN | Multi-Media Video Core Next. |
Definition at line 272 of file amdsmi.h.
272 {
273 AMDSMI_MM_UVD,
274 AMDSMI_MM_VCE,
275 AMDSMI_MM_VCN,
276 AMDSMI_MM__MAX
277} amdsmi_mm_ip_t;
◆ amdsmi_container_types_t
◆ amdsmi_processor_type_t
Processor types detectable by AMD SMI.
◆ amdsmi_status_t
| enum amdsmi_status_t |
Error codes returned by amdsmi functions.
Please avoid status codes that are multiples of 256 (256, 512, etc..) Return values in the shell get modulo 256 applied, meaning any multiple of 256 ends up as 0
Definition at line 381 of file amdsmi.h.
381 {
382 AMDSMI_STATUS_SUCCESS = 0,
383 // Library usage errors
384 AMDSMI_STATUS_INVAL = 1,
385 AMDSMI_STATUS_NOT_SUPPORTED = 2,
386 AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,
387 AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,
388 AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,
389 AMDSMI_STATUS_DRM_ERROR = 6,
390 AMDSMI_STATUS_API_FAILED = 7,
391 AMDSMI_STATUS_TIMEOUT = 8,
392 AMDSMI_STATUS_RETRY = 9,
393 AMDSMI_STATUS_NO_PERM = 10,
394 AMDSMI_STATUS_INTERRUPT = 11,
395 AMDSMI_STATUS_IO = 12,
396 AMDSMI_STATUS_ADDRESS_FAULT = 13,
397 AMDSMI_STATUS_FILE_ERROR = 14,
398 AMDSMI_STATUS_OUT_OF_RESOURCES = 15,
399 AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,
400 AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,
401 AMDSMI_STATUS_INIT_ERROR = 18,
402 AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,
403 AMDSMI_STATUS_DIRECTORY_NOT_FOUND = 20,
404 AMDSMI_STATUS_IPC_ERROR = 21,
405 // Processor related errors
406 AMDSMI_STATUS_BUSY = 30,
407 AMDSMI_STATUS_NOT_FOUND = 31,
408 AMDSMI_STATUS_NOT_INIT = 32,
409 AMDSMI_STATUS_NO_SLOT = 33,
410 AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,
411 // Data and size errors
412 AMDSMI_STATUS_MORE_DATA = 39,
413 AMDSMI_STATUS_NO_DATA = 40,
414 AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,
415 AMDSMI_STATUS_UNEXPECTED_SIZE = 42,
416 AMDSMI_STATUS_UNEXPECTED_DATA = 43,
417 // esmi errors
418 AMDSMI_STATUS_NON_AMD_CPU = 44,
419 AMDSMI_STATUS_NO_ENERGY_DRV = 45,
420 AMDSMI_STATUS_NO_MSR_DRV = 46,
421 AMDSMI_STATUS_NO_HSMP_DRV = 47,
422 AMDSMI_STATUS_NO_HSMP_SUP = 48,
423 AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,
424 AMDSMI_STATUS_HSMP_TIMEOUT = 50,
425 AMDSMI_STATUS_NO_DRV = 51,
426 AMDSMI_STATUS_FILE_NOT_FOUND = 52,
427 AMDSMI_STATUS_ARG_PTR_NULL = 53,
428 AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,
429 AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,
430 AMDSMI_STATUS_CORRUPTED_EEPROM = 56,
431 // General errors
432 AMDSMI_STATUS_MAP_ERROR = 0xFFFFFFFE,
433 AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF
434} amdsmi_status_t;
◆ amdsmi_clk_type_t
| enum amdsmi_clk_type_t |
Clock types.
Definition at line 441 of file amdsmi.h.
441 {
442 AMDSMI_CLK_TYPE_SYS = 0x0,
443 AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,
445 AMDSMI_CLK_TYPE_DF,
447 AMDSMI_CLK_TYPE_DCEF,
449 AMDSMI_CLK_TYPE_SOC,
450 AMDSMI_CLK_TYPE_MEM,
451 AMDSMI_CLK_TYPE_PCIE,
456 AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1
457} amdsmi_clk_type_t;
◆ amdsmi_accelerator_partition_type_t
Accelerator Partition.
◆ amdsmi_accelerator_partition_resource_type_t
Accelerator Partition Resource Types.
Definition at line 484 of file amdsmi.h.
484 {
490 AMDSMI_ACCELERATOR_MAX
◆ amdsmi_compute_partition_type_t
Compute Partition. This enum is used to identify various compute partitioning settings.
Definition at line 499 of file amdsmi.h.
499 {
500 AMDSMI_COMPUTE_PARTITION_INVALID = 0,
◆ amdsmi_memory_partition_type_t
Memory Partitions.
Definition at line 518 of file amdsmi.h.
518 {
519 AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
520 AMDSMI_MEMORY_PARTITION_NPS1 = 1,
522 AMDSMI_MEMORY_PARTITION_NPS2 = 2,
525 AMDSMI_MEMORY_PARTITION_NPS4 = 4,
528 AMDSMI_MEMORY_PARTITION_NPS8 = 8,
◆ amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the processor a temperature reading should be obtained.
Definition at line 541 of file amdsmi.h.
541 {
543 AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
552
553 // GPU Board Node temperature
554 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST = 100,
556 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST,
565 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_LAST = 149,
566
567 // GPU Board VR (Voltage Regulator) temperature
568 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST = 150,
570 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST,
585 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_LAST = 199,
586
587 // Baseboard System temperature
588 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST = 200,
590 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST,
623 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST = 249,
625 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST
◆ amdsmi_fw_block_t
| enum amdsmi_fw_block_t |
The values of this enum are used to identify the various firmware blocks.
Definition at line 634 of file amdsmi.h.
634 {
635 AMDSMI_FW_ID_SMU = 1,
637 AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
638 AMDSMI_FW_ID_CP_CE,
639 AMDSMI_FW_ID_CP_PFP,
640 AMDSMI_FW_ID_CP_ME,
645 AMDSMI_FW_ID_CP_MEC1,
647 AMDSMI_FW_ID_CP_MEC2,
649 AMDSMI_FW_ID_RLC,
650 AMDSMI_FW_ID_SDMA0,
651 AMDSMI_FW_ID_SDMA1,
652 AMDSMI_FW_ID_SDMA2,
653 AMDSMI_FW_ID_SDMA3,
654 AMDSMI_FW_ID_SDMA4,
655 AMDSMI_FW_ID_SDMA5,
656 AMDSMI_FW_ID_SDMA6,
657 AMDSMI_FW_ID_SDMA7,
658 AMDSMI_FW_ID_VCN,
659 AMDSMI_FW_ID_UVD,
660 AMDSMI_FW_ID_VCE,
661 AMDSMI_FW_ID_ISP,
670 AMDSMI_FW_ID_RLC_V,
671 AMDSMI_FW_ID_MMSCH,
674 AMDSMI_FW_ID_PSP_TOC,
676 AMDSMI_FW_ID_DFC,
677 AMDSMI_FW_ID_PSP_SPL,
678 AMDSMI_FW_ID_DRV_CAP,
679 AMDSMI_FW_ID_MC,
680 AMDSMI_FW_ID_PSP_BL,
681 AMDSMI_FW_ID_CP_PM4,
682 AMDSMI_FW_ID_RLC_P,
689 AMDSMI_FW_ID_CP_MES,
690 AMDSMI_FW_ID_MES_KIQ,
694 AMDSMI_FW_ID_RLX6,
696 AMDSMI_FW_ID_RS64_ME,
713 AMDSMI_FW_ID_PPTABLE,
714 AMDSMI_FW_ID_PSP_SOC,
715 AMDSMI_FW_ID_PSP_DBG,
721 AMDSMI_FW_ID_ASD,
722 AMDSMI_FW_ID_TA_RAS,
723 AMDSMI_FW_ID_TA_XGMI,
726 AMDSMI_FW_ID_PM,
727 AMDSMI_FW_ID_DMCU,
729 AMDSMI_FW_ID__MAX
730} amdsmi_fw_block_t;
◆ amdsmi_vram_type_t
| enum amdsmi_vram_type_t |
vRam Types. This enum is used to identify various VRam types.
Definition at line 737 of file amdsmi.h.
737 {
738 AMDSMI_VRAM_TYPE_UNKNOWN = 0,
739 // HBM
740 AMDSMI_VRAM_TYPE_HBM = 1,
741 AMDSMI_VRAM_TYPE_HBM2 = 2,
742 AMDSMI_VRAM_TYPE_HBM2E = 3,
743 AMDSMI_VRAM_TYPE_HBM3 = 4,
744 AMDSMI_VRAM_TYPE_HBM3E = 5,
745 // DDR
746 AMDSMI_VRAM_TYPE_DDR2 = 10,
747 AMDSMI_VRAM_TYPE_DDR3 = 11,
748 AMDSMI_VRAM_TYPE_DDR4 = 12,
749 AMDSMI_VRAM_TYPE_DDR5 = 13,
750 // GDDR
751 AMDSMI_VRAM_TYPE_GDDR1 = 17,
752 AMDSMI_VRAM_TYPE_GDDR2 = 18,
753 AMDSMI_VRAM_TYPE_GDDR3 = 19,
754 AMDSMI_VRAM_TYPE_GDDR4 = 20,
755 AMDSMI_VRAM_TYPE_GDDR5 = 21,
756 AMDSMI_VRAM_TYPE_GDDR6 = 22,
757 AMDSMI_VRAM_TYPE_GDDR7 = 23,
758 // LPDDR
759 AMDSMI_VRAM_TYPE_LPDDR4 = 30,
760 AMDSMI_VRAM_TYPE_LPDDR5 = 31,
761 AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_LPDDR5
762} amdsmi_vram_type_t;
◆ amdsmi_card_form_factor_t
◆ amdsmi_power_cap_type_t
Power Cap Package Power Tracking (PPT) type.
| Enumerator | |
|---|---|
| AMDSMI_POWER_CAP_TYPE_PPT0 | PPT0 power cap; lower limit, filtered input. |
| AMDSMI_POWER_CAP_TYPE_PPT1 | PPT1 power cap; higher limit, raw input. |
Definition at line 1029 of file amdsmi.h.
1029 {
1032} amdsmi_power_cap_type_t;
◆ amdsmi_cache_property_type_t
cache properties
Definition at line 1053 of file amdsmi.h.
1053 {
1054 AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,
1055 AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,
1056 AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,
1057 AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,
1058 AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010
1059} amdsmi_cache_property_type_t;
◆ amdsmi_link_type_t
| enum amdsmi_link_type_t |
Link type.
Definition at line 1212 of file amdsmi.h.
1212 {
1213 AMDSMI_LINK_TYPE_INTERNAL = 0,
1214 AMDSMI_LINK_TYPE_PCIE = 1,
1215 AMDSMI_LINK_TYPE_XGMI = 2,
1216 AMDSMI_LINK_TYPE_NOT_APPLICABLE = 3,
1217 AMDSMI_LINK_TYPE_UNKNOWN = 4
1218} amdsmi_link_type_t;
◆ amdsmi_link_status_t
| enum amdsmi_link_status_t |
Link Status.
Definition at line 1238 of file amdsmi.h.
1238 {
1239 AMDSMI_LINK_STATUS_ENABLED = 0,
1240 AMDSMI_LINK_STATUS_DISABLED = 1,
1241 AMDSMI_LINK_STATUS_INACTIVE = 2,
1242 AMDSMI_LINK_STATUS_ERROR = 3
1243} amdsmi_link_status_t;
◆ amdsmi_dev_perf_level_t
PowerPlay performance levels.
Definition at line 1421 of file amdsmi.h.
1421 {
1422 AMDSMI_DEV_PERF_LEVEL_AUTO = 0,
1423 AMDSMI_DEV_PERF_LEVEL_FIRST = AMDSMI_DEV_PERF_LEVEL_AUTO,
1433 AMDSMI_DEV_PERF_LEVEL_LAST = AMDSMI_DEV_PERF_LEVEL_DETERMINISM,
1434 AMDSMI_DEV_PERF_LEVEL_UNKNOWN = 0x100
1435} amdsmi_dev_perf_level_t;
◆ amdsmi_event_group_t
| enum amdsmi_event_group_t |
Event Groups Enum denoting an event group. The value of the enum is the base value for all the event enums in the group.
| Enumerator | |
|---|---|
| AMDSMI_EVNT_GRP_XGMI | Data Fabric (XGMI) related events. |
| AMDSMI_EVNT_GRP_XGMI_DATA_OUT | XGMI Outbound data. |
| AMDSMI_EVNT_GRP_INVALID | Unknown Event Group. |
Definition at line 1451 of file amdsmi.h.
1451 {
1452 AMDSMI_EVNT_GRP_XGMI = 0,
1453 AMDSMI_EVNT_GRP_XGMI_DATA_OUT = 10,
1454 AMDSMI_EVNT_GRP_INVALID = 0xFFFFFFFF
1455} amdsmi_event_group_t;
◆ amdsmi_event_type_t
| enum amdsmi_event_type_t |
Event types Event type enum. Events belonging to a particular event group amdsmi_event_group_t should begin enumerating at the amdsmi_event_group_t value for that group.
Data beats sent to neighbor 0; Each beat represents 32 bytes.
XGMI throughput can be calculated by multiplying a BEATs event such as AMDSMI_EVNT_XGMI_0_BEATS_TX by 32 and dividing by the time for which event collection occurred, amdsmi_counter_value_t.time_running (which is in nanoseconds). To get bytes per second, multiply this value by 109.
Throughput = BEATS/time_running * 109 (bytes/second)
Events in the AMDSMI_EVNT_GRP_XGMI_DATA_OUT group measure the number of beats sent on an XGMI link. Each beat represents 32 bytes. AMDSMI_EVNT_XGMI_DATA_OUT_n represents the number of outbound beats (each representing 32 bytes) on link n.
XGMI throughput can be calculated by multiplying a event such as ::AMDSMI_EVNT_XGMI_DATA_OUT_n by 32 and dividing by the time for which event collection occurred, amdsmi_counter_value_t.time_running (which is in nanoseconds). To get bytes per second, multiply this value by 109.
Definition at line 1487 of file amdsmi.h.
1487 {
1488 AMDSMI_EVNT_FIRST = AMDSMI_EVNT_GRP_XGMI,
1489
1490 AMDSMI_EVNT_XGMI_FIRST = AMDSMI_EVNT_GRP_XGMI,
1491 AMDSMI_EVNT_XGMI_0_NOP_TX = AMDSMI_EVNT_XGMI_FIRST,
1499 AMDSMI_EVNT_XGMI_LAST = AMDSMI_EVNT_XGMI_1_BEATS_TX,
1500 AMDSMI_EVNT_XGMI_DATA_OUT_FIRST = AMDSMI_EVNT_GRP_XGMI_DATA_OUT,
1501 AMDSMI_EVNT_XGMI_DATA_OUT_0 = AMDSMI_EVNT_XGMI_DATA_OUT_FIRST,
1507 AMDSMI_EVNT_XGMI_DATA_OUT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_5,
1508 AMDSMI_EVNT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_LAST
1509} amdsmi_event_type_t;
◆ amdsmi_counter_command_t
◆ amdsmi_evt_notification_type_t
Event notification event types.
Definition at line 1538 of file amdsmi.h.
1538 {
1539 AMDSMI_EVT_NOTIF_NONE = 0,
1540 AMDSMI_EVT_NOTIF_VMFAULT = 1,
1541 AMDSMI_EVT_NOTIF_FIRST = AMDSMI_EVT_NOTIF_VMFAULT,
1542 AMDSMI_EVT_NOTIF_THERMAL_THROTTLE = 2,
1543 AMDSMI_EVT_NOTIF_GPU_PRE_RESET = 3,
1544 AMDSMI_EVT_NOTIF_GPU_POST_RESET = 4,
1545 AMDSMI_EVT_NOTIF_MIGRATE_START = 5,
1546 AMDSMI_EVT_NOTIF_MIGRATE_END = 6,
1547 AMDSMI_EVT_NOTIF_PAGE_FAULT_START = 7,
1548 AMDSMI_EVT_NOTIF_PAGE_FAULT_END = 8,
1549 AMDSMI_EVT_NOTIF_QUEUE_EVICTION = 9,
1550 AMDSMI_EVT_NOTIF_QUEUE_RESTORE = 10,
1551 AMDSMI_EVT_NOTIF_UNMAP_FROM_GPU = 11,
1552 AMDSMI_EVT_NOTIF_PROCESS_START = 12,
1553 AMDSMI_EVT_NOTIF_PROCESS_END = 13,
1554 AMDSMI_EVT_NOTIF_LAST = AMDSMI_EVT_NOTIF_PROCESS_END
◆ amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values will be in Celsius.
Definition at line 1581 of file amdsmi.h.
1581 {
1582 AMDSMI_TEMP_CURRENT = 0x0,
1583 AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,
1584 AMDSMI_TEMP_MAX,
1585 AMDSMI_TEMP_MIN,
1586 AMDSMI_TEMP_MAX_HYST,
1588 AMDSMI_TEMP_MIN_HYST,
1590 AMDSMI_TEMP_CRITICAL,
1594 AMDSMI_TEMP_EMERGENCY,
1600 AMDSMI_TEMP_CRIT_MIN,
1604 AMDSMI_TEMP_OFFSET,
1606 AMDSMI_TEMP_LOWEST,
1607 AMDSMI_TEMP_HIGHEST,
1608 AMDSMI_TEMP_SHUTDOWN,
1609 AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN
1610} amdsmi_temperature_metric_t;
◆ amdsmi_voltage_metric_t
Voltage Metrics. This enum is used to identify various Voltage metrics. Corresponding values will be in millivolt.
Definition at line 1618 of file amdsmi.h.
1618 {
1619 AMDSMI_VOLT_CURRENT = 0x0,
1620
1621 AMDSMI_VOLT_FIRST = AMDSMI_VOLT_CURRENT,
1622 AMDSMI_VOLT_MAX,
1623 AMDSMI_VOLT_MIN_CRIT,
1624 AMDSMI_VOLT_MIN,
1625 AMDSMI_VOLT_MAX_CRIT,
1626 AMDSMI_VOLT_AVERAGE,
1627 AMDSMI_VOLT_LOWEST,
1628 AMDSMI_VOLT_HIGHEST,
1629
1630 AMDSMI_VOLT_LAST = AMDSMI_VOLT_HIGHEST
1631} amdsmi_voltage_metric_t;
◆ amdsmi_voltage_type_t
This ennumeration is used to indicate which type of voltage reading should be obtained.
| Enumerator | |
|---|---|
| AMDSMI_VOLT_TYPE_VDDGFX | Vddgfx GPU voltage. |
| AMDSMI_VOLT_TYPE_VDDBOARD | Voltage for VDDBOARD. |
| AMDSMI_VOLT_TYPE_INVALID | Invalid type. |
Definition at line 1639 of file amdsmi.h.
1639 {
1640 AMDSMI_VOLT_TYPE_FIRST = 0,
1641
1642 AMDSMI_VOLT_TYPE_VDDGFX = AMDSMI_VOLT_TYPE_FIRST,
1644 AMDSMI_VOLT_TYPE_LAST = AMDSMI_VOLT_TYPE_VDDBOARD,
1645 AMDSMI_VOLT_TYPE_INVALID = 0xFFFFFFFF
1646} amdsmi_voltage_type_t;
◆ amdsmi_power_profile_preset_masks_t
Pre-set Profile Selections. These bitmasks can be AND'd with the amdsmi_power_profile_status_t.available_profiles returned from :: amdsmi_get_gpu_power_profile_presets to determine which power profiles are supported by the system.
Definition at line 1656 of file amdsmi.h.
1656 {
1657 AMDSMI_PWR_PROF_PRST_CUSTOM_MASK = 0x1,
1658 AMDSMI_PWR_PROF_PRST_VIDEO_MASK = 0x2,
1659 AMDSMI_PWR_PROF_PRST_POWER_SAVING_MASK = 0x4,
1660 AMDSMI_PWR_PROF_PRST_COMPUTE_MASK = 0x8,
1661 AMDSMI_PWR_PROF_PRST_VR_MASK = 0x10,
1662
1663 // 3D Full Screen Power Profile
1664 AMDSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK = 0x20,
1665 AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT = 0x40,
1666 AMDSMI_PWR_PROF_PRST_LAST = AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT,
1667
1668 // Invalid power profile
1669 AMDSMI_PWR_PROF_PRST_INVALID = 0xFFFFFFFFFFFFFFFF
◆ amdsmi_gpu_block_t
| enum amdsmi_gpu_block_t |
This enum is used to identify different GPU blocks.
Definition at line 1677 of file amdsmi.h.
1677 {
1678 AMDSMI_GPU_BLOCK_INVALID = 0,
1679 AMDSMI_GPU_BLOCK_FIRST = (1ULL << 0),
1680 AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
1681 AMDSMI_GPU_BLOCK_SDMA = (1ULL << 1),
1682 AMDSMI_GPU_BLOCK_GFX = (1ULL << 2),
1683 AMDSMI_GPU_BLOCK_MMHUB = (1ULL << 3),
1684 AMDSMI_GPU_BLOCK_ATHUB = (1ULL << 4),
1685 AMDSMI_GPU_BLOCK_PCIE_BIF = (1ULL << 5),
1686 AMDSMI_GPU_BLOCK_HDP = (1ULL << 6),
1687 AMDSMI_GPU_BLOCK_XGMI_WAFL = (1ULL << 7),
1688 AMDSMI_GPU_BLOCK_DF = (1ULL << 8),
1689 AMDSMI_GPU_BLOCK_SMN = (1ULL << 9),
1690 AMDSMI_GPU_BLOCK_SEM = (1ULL << 10),
1691 AMDSMI_GPU_BLOCK_MP0 = (1ULL << 11),
1692 AMDSMI_GPU_BLOCK_MP1 = (1ULL << 12),
1693 AMDSMI_GPU_BLOCK_FUSE = (1ULL << 13),
1694 AMDSMI_GPU_BLOCK_MCA = (1ULL << 14),
1695 AMDSMI_GPU_BLOCK_VCN = (1ULL << 15),
1696 AMDSMI_GPU_BLOCK_JPEG = (1ULL << 16),
1697 AMDSMI_GPU_BLOCK_IH = (1ULL << 17),
1698 AMDSMI_GPU_BLOCK_MPIO = (1ULL << 18),
1699 AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,
1700 AMDSMI_GPU_BLOCK_RESERVED = (1ULL << 63)
1701} amdsmi_gpu_block_t;
◆ amdsmi_clk_limit_type_t
◆ amdsmi_cper_sev_t
| enum amdsmi_cper_sev_t |
Cper sev.
Definition at line 1718 of file amdsmi.h.
1718 {
1719 AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,
1720 AMDSMI_CPER_SEV_FATAL = 1,
1721 AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,
1722 AMDSMI_CPER_SEV_NUM = 3,
1723 AMDSMI_CPER_SEV_UNUSED = 10
1724} amdsmi_cper_sev_t;
◆ amdsmi_cper_notify_type_t
Cper notify.
Definition at line 1731 of file amdsmi.h.
1731 {
1732 AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,
1733 AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,
1734 AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,
1735 AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,
1736 AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,
1737 AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,
1738 AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,
1739 AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,
1740 AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,
1741 AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,
1742 AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,
1743 AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT = 0x49A341DF69293BC9
1745} amdsmi_cper_notify_type_t;
◆ amdsmi_ras_err_state_t
The current ECC state.
Definition at line 1777 of file amdsmi.h.
1777 {
1778 AMDSMI_RAS_ERR_STATE_NONE = 0,
1786
1787 AMDSMI_RAS_ERR_STATE_LAST = AMDSMI_RAS_ERR_STATE_ENABLED,
1788 AMDSMI_RAS_ERR_STATE_INVALID = 0xFFFFFFFF
1789} amdsmi_ras_err_state_t;
◆ amdsmi_memory_type_t
| enum amdsmi_memory_type_t |
Types of memory.
- Note
- Sum of the process memory is not expected to be the total memory usage.
| Enumerator | |
|---|---|
| AMDSMI_MEM_TYPE_VRAM | VRAM memory. |
| AMDSMI_MEM_TYPE_VIS_VRAM | VRAM memory that is visible. |
| AMDSMI_MEM_TYPE_GTT | GTT memory. |
Definition at line 1798 of file amdsmi.h.
1798 {
1799 AMDSMI_MEM_TYPE_FIRST = 0,
1800
1801 AMDSMI_MEM_TYPE_VRAM = AMDSMI_MEM_TYPE_FIRST,
1802 AMDSMI_MEM_TYPE_VIS_VRAM,
1803 AMDSMI_MEM_TYPE_GTT,
1804
1805 AMDSMI_MEM_TYPE_LAST = AMDSMI_MEM_TYPE_GTT
1806} amdsmi_memory_type_t;
◆ amdsmi_freq_ind_t
| enum amdsmi_freq_ind_t |
The values of this enum are used as frequency identifiers.
| Enumerator | |
|---|---|
| AMDSMI_FREQ_IND_MIN | Index used for the minimum frequency value. |
| AMDSMI_FREQ_IND_MAX | Index used for the maximum frequency value. |
| AMDSMI_FREQ_IND_INVALID | An invalid frequency index. |
Definition at line 1813 of file amdsmi.h.
1813 {
1814 AMDSMI_FREQ_IND_MIN = 0,
1815 AMDSMI_FREQ_IND_MAX = 1,
1816 AMDSMI_FREQ_IND_INVALID = 0xFFFFFFFF
1817} amdsmi_freq_ind_t;
◆ amdsmi_xgmi_status_t
| enum amdsmi_xgmi_status_t |
XGMI Status.
| Enumerator | |
|---|---|
| AMDSMI_XGMI_STATUS_NO_ERRORS | XGMI No Errors. |
| AMDSMI_XGMI_STATUS_ERROR | XGMI Errors. |
| AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS | XGMI Multiple Errors. |
Definition at line 1824 of file amdsmi.h.
1824 {
1825 AMDSMI_XGMI_STATUS_NO_ERRORS = 0,
1826 AMDSMI_XGMI_STATUS_ERROR,
1828} amdsmi_xgmi_status_t;
◆ amdsmi_memory_page_status_t
Reserved Memory Page States.
◆ amdsmi_utilization_counter_type_t
The utilization counter type.
Definition at line 1855 of file amdsmi.h.
1855 {
1856 AMDSMI_UTILIZATION_COUNTER_FIRST = 0,
1861 // Fine grain activity counters
1862 AMDSMI_FINE_GRAIN_GFX_ACTIVITY = 100,
1863 AMDSMI_FINE_GRAIN_MEM_ACTIVITY = 101,
1864 AMDSMI_FINE_DECODER_ACTIVITY = 102,
1865 AMDSMI_UTILIZATION_COUNTER_LAST = AMDSMI_FINE_DECODER_ACTIVITY
◆ amdsmi_xgmi_link_status_type_t
XGMI Link Status Type.
| Enumerator | |
|---|---|
| AMDSMI_XGMI_LINK_DOWN | XGMI link status is down. |
| AMDSMI_XGMI_LINK_UP | XGMI link status is up. |
| AMDSMI_XGMI_LINK_DISABLE | XGMI link status is disabled. |
◆ amdsmi_reg_type_t
| enum amdsmi_reg_type_t |
This register type for register table.
| Enumerator | |
|---|---|
| AMDSMI_REG_XGMI | XGMI registers. |
| AMDSMI_REG_WAFL | WAFL registers. |
| AMDSMI_REG_PCIE | PCIe registers. |
| AMDSMI_REG_USR | Usr registers. |
| AMDSMI_REG_USR1 | Usr1 registers. |
Definition at line 2495 of file amdsmi.h.
2495 {
2496 AMDSMI_REG_XGMI,
2497 AMDSMI_REG_WAFL,
2498 AMDSMI_REG_PCIE,
2499 AMDSMI_REG_USR,
2500 AMDSMI_REG_USR1
2501} amdsmi_reg_type_t;
◆ amdsmi_virtualization_mode_t
Variant placeholder.
Place-holder "variant" for functions that have don't have any variants, but do have monitors or sensors.
◆ amdsmi_affinity_scope_t
Scope for Numa affinity or Socket affinity.
| Enumerator | |
|---|---|
| AMDSMI_AFFINITY_SCOPE_NODE | Memory affinity as numa node. |
| AMDSMI_AFFINITY_SCOPE_SOCKET | socket affinity |
Definition at line 2581 of file amdsmi.h.
2581 {
2584} amdsmi_affinity_scope_t;
◆ amdsmi_npm_status_t
| enum amdsmi_npm_status_t |
◆ amdsmi_ptl_data_format_t
PTL (Peak Tops Limiter) data format types These correspond to the hardware data types used in matrix operations. Only F8 and XF32 are always supported at full performance. From the remaining five types, only two can be supported at peak performance simultaneously.
Definition at line 2616 of file amdsmi.h.
2616 {
2617 AMDSMI_PTL_DATA_FORMAT_I8 = 0x0,
2618 AMDSMI_PTL_DATA_FORMAT_F16 = 0x1,
2619 AMDSMI_PTL_DATA_FORMAT_BF16 = 0x2,
2620 AMDSMI_PTL_DATA_FORMAT_F32 = 0x3,
2621 AMDSMI_PTL_DATA_FORMAT_F64 = 0x4,
2622 AMDSMI_PTL_DATA_FORMAT_F8 = 0x5,
2623 AMDSMI_PTL_DATA_FORMAT_VECTOR = 0x6,
2624 AMDSMI_PTL_DATA_FORMAT_INVALID = 0xFFFFFFFF
2625} amdsmi_ptl_data_format_t;
◆ amdsmi_io_bw_encoding_t
◆ amdsmi_nic_link_type_t
NIC Link Types. This enum is used to identify the link type between NIC and GPU processors based on their PCIe and NUMA connectivity.
Definition at line 2877 of file amdsmi.h.
2877 {
2884} amdsmi_nic_link_type_t;