amdsmi.h File Reference#
amdsmi.h File Reference
AMD System Management Interface API. More...
#include <stdbool.h>#include <time.h>#include <stdint.h>Go to the source code of this file.
Data Structures | |
| struct | amdsmi_hsmp_driver_version_t |
| This structure holds HSMP Driver version information. More... | |
| struct | amdsmi_range_t |
| This structure represents a range (e.g., frequencies or voltages). More... | |
| struct | amdsmi_xgmi_info_t |
| XGMI Information. More... | |
| struct | amdsmi_vram_usage_t |
| VRam Usage. More... | |
| struct | amdsmi_violation_status_t |
| This structure hold violation status information. Note: for MI3x asics and higher, older ASICs will show unsupported. More... | |
| struct | amdsmi_frequency_range_t |
| Frequency Range. More... | |
| union | amdsmi_bdf_t |
| bdf types More... | |
| struct | amdsmi_bdf_t::bdf_ |
| struct | amdsmi_enumeration_info_t |
| Structure holds enumeration information. More... | |
| struct | amdsmi_pcie_info_t |
| pcie information More... | |
| struct | amdsmi_pcie_info_t::pcie_static_ |
| struct | amdsmi_pcie_info_t::pcie_metric_ |
| struct | amdsmi_power_cap_info_t |
| Power Cap Information. More... | |
| struct | amdsmi_vbios_info_t |
| VBios Information. More... | |
| struct | amdsmi_gpu_cache_info_t |
| GPU Cache Information. More... | |
| struct | amdsmi_gpu_cache_info_t::cache_ |
| struct | amdsmi_fw_info_t |
| Firmware Information. More... | |
| struct | amdsmi_fw_info_t::fw_info_list_ |
| struct | amdsmi_asic_info_t |
| ASIC Information. More... | |
| struct | amdsmi_kfd_info_t |
| Structure holds kfd information. More... | |
| union | amdsmi_nps_caps_t |
| This union holds memory partition bitmask. More... | |
| struct | amdsmi_nps_caps_t::nps_flags_ |
| struct | amdsmi_memory_partition_config_t |
| Memory Partition Configuration. This structure is used to identify various memory partition configurations. More... | |
| struct | amdsmi_memory_partition_config_t::numa_range_ |
| struct | amdsmi_accelerator_partition_profile_t |
| Accelerator Partition Resource Profile. More... | |
| struct | amdsmi_accelerator_partition_resource_profile_t |
| Accelerator Partition Resources. This struct is used to identify various partition resource profiles. More... | |
| struct | amdsmi_accelerator_partition_profile_config_t |
| Accelerator Partition Profile Configurations. More... | |
| struct | amdsmi_cpu_util_t |
| This structure holds CPU utilization information. More... | |
| struct | amdsmi_link_metrics_t |
| Link Metrics. More... | |
| struct | amdsmi_link_metrics_t::_links |
| struct | amdsmi_vram_info_t |
| VRam Information. More... | |
| struct | amdsmi_driver_info_t |
| Driver Information. More... | |
| struct | amdsmi_board_info_t |
| Board Information. More... | |
| struct | amdsmi_power_info_t |
| Power Information. More... | |
| struct | amdsmi_clk_info_t |
| Clock Information. More... | |
| struct | amdsmi_engine_usage_t |
| Engine Usage amdsmi_engine_usage_t: This structure holds common GPU activity values seen in both BM or SRIOV. More... | |
| struct | amdsmi_proc_info_t |
| Process Information. More... | |
| struct | amdsmi_proc_info_t::engine_usage_ |
| struct | amdsmi_proc_info_t::memory_usage_ |
| struct | amdsmi_proc_gpu_entry_t |
| Per-GPU process entry within a PID-grouped result. More... | |
| struct | amdsmi_proc_info_by_pid_t |
| Process info aggregated across all GPUs, keyed by PID. More... | |
| struct | amdsmi_p2p_capability_t |
| IO Link P2P Capability. More... | |
| struct | amdsmi_counter_value_t |
| Counter value. More... | |
| struct | amdsmi_evt_notification_data_t |
| Event notification data returned from event notification API. More... | |
| struct | amdsmi_gpu_ras_policy_v4_0_t |
| Ras policy v4.0. More... | |
| struct | amdsmi_gpu_ras_policy_info_t |
| Ras policy info structure for storing version and different ras policy version structures. More... | |
| union | amdsmi_gpu_ras_policy_info_t::policy_data_ |
| struct | amdsmi_utilization_counter_t |
| The utilization counter data. More... | |
| struct | amdsmi_retired_page_record_t |
| Reserved Memory Page Record. More... | |
| struct | amdsmi_power_profile_status_t |
| This structure contains information about which power profiles are supported by the system for a given device, and which power profile is currently active. More... | |
| struct | amdsmi_frequencies_t |
| This structure holds information about clock frequencies. More... | |
| struct | amdsmi_dpm_policy_entry_t |
| The dpm policy. More... | |
| struct | amdsmi_dpm_policy_t |
| DPM Policy. More... | |
| struct | amdsmi_pcie_bandwidth_t |
| This structure holds information about the possible PCIe bandwidths. Specifically, the possible transfer rates and their associated numbers of lanes are stored here. More... | |
| struct | amdsmi_version_t |
| This structure holds version information. More... | |
| struct | amdsmi_od_vddc_point_t |
| This structure represents a point on the frequency-voltage plane. More... | |
| struct | amdsmi_freq_volt_region_t |
| This structure holds 2 amdsmi_range_t's, one for frequency and one for voltage. These 2 ranges indicate the range of possible values for the corresponding amdsmi_od_vddc_point_t. More... | |
| struct | amdsmi_od_volt_curve_t |
| OD Vold Curve AMDSMI_NUM_VOLTAGE_CURVE_POINTS number of amdsmi_od_vddc_point_t's. More... | |
| struct | amdsmi_od_volt_freq_data_t |
| This structure holds the frequency-voltage values for a device. More... | |
| struct | amd_metrics_table_header_t |
| Structure holds the gpu metrics table header for a device. More... | |
| struct | amdsmi_gpu_xcp_metrics_t |
| The following structures hold the gpu statistics for a device. More... | |
| struct | amdsmi_apu_metrics_t |
| APU metrics auxiliary data. More... | |
| struct | amdsmi_gpu_metrics_t |
| Structure holds the gpu metrics values for a device. More... | |
| struct | amdsmi_xgmi_link_status_t |
| XGMI Link Status. More... | |
| struct | amdsmi_name_value_t |
| This structure holds the name value pairs. More... | |
| struct | amdsmi_ras_feature_t |
| This structure holds ras feature information. More... | |
| struct | amdsmi_ras_feature_t::ras_info_ |
| struct | amdsmi_error_count_t |
| This structure holds error counts. More... | |
| struct | amdsmi_process_info_t |
| This structure contains information specific to a process. Sum of the process memory is not expected to be the total memory usage. More... | |
| struct | amdsmi_topology_nearest_t |
| Topology Nearest. More... | |
| struct | amdsmi_npm_info_t |
| NPM info. More... | |
| struct | amdsmi_smu_fw_version_t |
| This structure holds SMU Firmware version information. More... | |
| struct | amdsmi_ddr_bw_metrics_t |
| DDR bandwidth metrics. More... | |
| struct | amdsmi_temp_range_refresh_rate_t |
| temperature range and refresh rate metrics of a DIMM More... | |
| struct | amdsmi_dimm_power_t |
| DIMM Power(mW), power update rate(ms) and dimm address. More... | |
| struct | amdsmi_dimm_thermal_t |
| DIMM temperature(°C) and update rate(ms) and dimm address. More... | |
| struct | amdsmi_link_id_bw_type_t |
| LINK name and Bandwidth type Information.It contains link names i.e valid link names are "P0", "P1", "P2", "P3", "P4", "G0", "G1", "G2", "G3", "G4" "G5", "G6", "G7" Valid bandwidth types 1(Aggregate_BW), 2 (Read BW), 4 (Write BW). More... | |
| struct | amdsmi_dpm_level_t |
| max and min LCLK DPM level on a given NBIO ID. Valid max and min DPM level values are 0 - 1. More... | |
| struct | amdsmi_hsmp_metrics_table_t |
| HSMP Metrics table (supported only with hsmp proto version 6). More... | |
| struct | amdsmi_cpu_info_t |
| cpu info data More... | |
| struct | amdsmi_sock_info_t |
| cpu socket info data More... | |
| struct | amdsmi_nic_stat_t |
| Structure for NIC statistic name-value pairs. More... | |
| struct | amdsmi_nic_asic_info_t |
| NIC asic information. More... | |
| struct | amdsmi_nic_bus_info_t |
| NIC bus information. More... | |
| struct | amdsmi_nic_numa_info_t |
| NIC NUMA information. More... | |
| struct | amdsmi_nic_fw_t |
| NIC firmware information. More... | |
| struct | amdsmi_nic_fw_info_t |
| NIC firmware information collection. More... | |
| struct | amdsmi_nic_port_t |
| NIC port information. More... | |
| struct | amdsmi_nic_port_info_t |
| NIC port information collection. More... | |
| struct | amdsmi_nic_driver_info_t |
| NIC driver information. More... | |
| struct | amdsmi_nic_rdma_port_info_t |
| NIC RDMA port information. More... | |
| struct | amdsmi_nic_rdma_dev_info_t |
| NIC RDMA device information. More... | |
| struct | amdsmi_nic_rdma_devices_info_t |
| NIC RDMA devices information collection. More... | |
| struct | amdsmi_fabric_telemetry_item_t |
| Fabric telemetry item structure. More... | |
| struct | amdsmi_fabric_label_t |
| struct | amdsmi_fabric_telemetry_instance_t |
| Fabric telemetry instance structure. More... | |
| struct | amdsmi_fabric_telemetry_dataset_t |
| Fabric telemetry dataset structure. More... | |
| struct | amdsmi_fabric_telemetry_t |
| Fabric telemetry structure. More... | |
| struct | amdsmi_fabric_info_v1_t |
| Fabric device configuration information (version 1) More... | |
| struct | amdsmi_fabric_info_ver_t |
| union | amdsmi_fabric_info_ver_t::fabric_info_ |
| struct | amdsmi_fabric_info_t |
| Fabric device information structure. More... | |
| struct | amdsmi_cper_guid_t |
| Cper. More... | |
| struct | amdsmi_cper_timestamp_t |
| union | amdsmi_cper_valid_bits_t |
| struct | amdsmi_cper_valid_bits_t::valid_bits_ |
| struct | amdsmi_cper_hdr_t |
| struct | amdsmi_uma_carveout_option_t |
| struct | amdsmi_uma_carveout_info_t |
| struct | amdsmi_ttm_info_t |
Macros | |
| #define | AMDSMI_MAX_MM_IP_COUNT 8 |
| Maximum size definitions. | |
| #define | AMDSMI_MAX_STRING_LENGTH 256 |
| Maximum length for string buffers. | |
| #define | AMDSMI_MAX_DEVICES 32 |
| Maximum number of devices supported. | |
| #define | AMDSMI_MAX_CACHE_TYPES 10 |
| Maximum number of cache types. | |
| #define | AMDSMI_MAX_ACCELERATOR_PROFILE 32 |
| Maximum number of accelerator profiles. | |
| #define | AMDSMI_MAX_CP_PROFILE_RESOURCES 32 |
| Maximum number of compute profile resources. | |
| #define | AMDSMI_MAX_ACCELERATOR_PARTITIONS 8 |
| Maximum number of accelerator partitions. | |
| #define | AMDSMI_MAX_NUM_NUMA_NODES 32 |
| Maximum number of NUMA nodes. | |
| #define | AMDSMI_GPU_UUID_SIZE 38 |
| Size of GPU UUID string. | |
| #define | AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64 |
| Common defines. | |
| #define | AMDSMI_MAX_CONTAINER_TYPE 2 |
| Maximum number of container types. | |
| #define | CENTRIGRADE_TO_MILLI_CENTIGRADE 1000 |
| The following structure holds the gpu metrics values for a device. | |
| #define | AMDSMI_NUM_HBM_INSTANCES 4 |
| This should match NUM_HBM_INSTANCES. | |
| #define | AMDSMI_MAX_NUM_VCN 4 |
| This should match MAX_NUM_VCN. | |
| #define | AMDSMI_MAX_NUM_CLKS 4 |
| This should match MAX_NUM_CLKS. | |
| #define | AMDSMI_MAX_NUM_XGMI_LINKS 8 |
| This should match MAX_NUM_XGMI_LINKS. | |
| #define | AMDSMI_MAX_NUM_GFX_CLKS 8 |
| This should match MAX_NUM_GFX_CLKS. | |
| #define | AMDSMI_MAX_AID 4 |
| This should match AMDSMI_MAX_AID. | |
| #define | AMDSMI_MAX_ENGINES 8 |
| This should match AMDSMI_MAX_ENGINES. | |
| #define | AMDSMI_MAX_NUM_JPEG 32 |
| This should match AMDSMI_MAX_NUM_JPEG (8*4=32) | |
| #define | AMDSMI_MAX_NUM_JPEG_ENG_V1 40 |
| Introduced in gpu metrics v1.8, document presents NUM_JPEG_ENG_V1 but will change to AMDSMI_MAX_NUM_JPEG_ENG_V1 for continuity. | |
| #define | AMDSMI_MAX_NUM_XCC 8 |
| This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units, ACE (Asynchronous Compute Engines), caches, and global resources organized as one unit. | |
| #define | AMDSMI_MAX_NUM_XCP 8 |
| This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Graphics Compute Partitions. Each physical gpu could have a maximum of 8 separate partitions associated with each (depending on ASIC support). | |
| #define | AMDSMI_APU_MAX_CORES 16 |
| APU metrics: max number of cores, L3, and IPUs. | |
| #define | AMDSMI_APU_V24_CORES 8 |
| v2_4 core count | |
| #define | AMDSMI_APU_MAX_L3 2 |
| v2_4 | |
| #define | AMDSMI_APU_MAX_IPU 8 |
| v3_0, average_ipu_activity[] | |
| #define | MAX_NUMBER_OF_AFIDS_PER_RECORD 12 |
| Max Number of AFIDs that will be inside one cper entry. | |
| #define | AMDSMI_MAX_VF_COUNT 32 |
| Maximum size definitions AMDSMI. | |
| #define | AMDSMI_MAX_DRIVER_NUM 2 |
| Maximum drivers supported. | |
| #define | AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9 |
| DFC firmware entries supported. | |
| #define | AMDSMI_MAX_WHITE_LIST_ELEMENTS 16 |
| Max white list elements for device access control. | |
| #define | AMDSMI_MAX_BLACK_LIST_ELEMENTS 64 |
| Max black list elements for device access control. | |
| #define | AMDSMI_MAX_UUID_ELEMENTS 16 |
| Max UUID elements supported. | |
| #define | AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS 8 |
| Max Trusted Application white list elements. | |
| #define | AMDSMI_MAX_ERR_RECORDS 10 |
| Maximum error records that can be stored. | |
| #define | AMDSMI_MAX_PROFILE_COUNT 16 |
| Maximum profiles supported. | |
| #define | AMDSMI_MAX_NUM_HBM_STACKS 12 |
| Introduced in gpu metrics v1.9+. | |
| #define | AMDSMI_MAX_NUM_AID 2 |
| Maximum number of AID supported. | |
| #define | AMDSMI_MAX_NUM_MID 2 |
| Maximum number of MID supported. | |
| #define | AMDSMI_MAX_NUM_CLKS_PER_AID 2 |
| Maximum number of clocks per AID supported. | |
| #define | AMDSMI_MAX_NUM_CLKS_PER_MID 2 |
| Maximum number of clocks per MID supported. | |
| #define | AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d" |
| String format. | |
| #define | AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d" |
| Date format string. | |
| #define | AMDSMI_LIB_VERSION_MAJOR 26 |
| library versioning | |
| #define | AMDSMI_LIB_VERSION_MINOR 5 |
| Minor version should be updated for each API change, but without changing headers. | |
| #define | AMDSMI_LIB_VERSION_RELEASE 0 |
| #define | AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR, MINOR, RELEASE) (#MAJOR "." #MINOR "." #RELEASE) |
| #define | AMDSMI_LIB_VERSION_EXPAND_PARTS(MAJOR_STR, MINOR_STR, RELEASE_STR) AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR_STR, MINOR_STR, RELEASE_STR) |
| #define | AMDSMI_LIB_VERSION_STRING |
| #define | AMDSMI_PF_INDEX (AMDSMI_MAX_VF_COUNT - 1) |
| Maximum size definitions AMDSMI. | |
| #define | AMDSMI_MAX_DRIVER_INFO_RSVD 64 |
| #define | AMDSMI_MAX_SPD_DIMM_ADDRESS 0xFF |
| SPD DIMM register validation limits. | |
| #define | AMDSMI_MAX_SPD_LID 0xF |
| Maximum SPD logical ID [11:8]. | |
| #define | AMDSMI_MAX_SPD_REG_OFFSET 0x7FF |
| Maximum SPD register offset [22:12]. | |
| #define | AMDSMI_MAX_SPD_REG_SPACE 0x1 |
| Maximum SPD register space [23]. | |
| #define | AMDSMI_MAX_SPD_WRITE_DATA 0xFF |
| Maximum SPD write data [31:24]. | |
| #define | MAX_SVI3_RAIL_INDEX 4 |
| Maximum SVI3 rail index. | |
| #define | MAX_SVI3_RAIL_SELECTION 1 |
| Maximum SVI3 rail selection. | |
| #define | POWER_EFFICIENCY_MODE_4 0x4 |
| Power Efficiency mode selection. | |
| #define | POWER_EFFICIENCY_MODE_5 0x5 |
| Power Efficiency mode selection. | |
| #define | AMDSMI_MAX_POWER_EFFICIENCY_UTIL 0x7F |
| [9:3]=Balanced core mode utilization point(%) | |
| #define | AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT 0x1FFFFF |
| [30:10]=Balanced core mode PPT limit(mW) | |
| #define | AMDSMI_RAIL_INDEX_NONE 0xFFFFFFFF |
| Rail Index value defined as maximum when not passed. | |
| #define | AMDSMI_MAX_NUM_FREQUENCIES 33 |
| #define | AMDSMI_MAX_FAN_SPEED 255 |
| #define | AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3 |
| #define | AMDSMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1)) |
| Macro to generate event bitmask from event id. | |
| #define | AMDSMI_MAX_UTILIZATION_VALUES 4 |
| The max number of values per counter type. | |
| #define | AMDSMI_MAX_NUM_PM_POLICIES 32 |
| Maximum number of power management policies. | |
| #define | AMDSMI_MAX_NIC_PORTS 32 |
| Maximum size definitions AMDSMI NIC. | |
| #define | AMDSMI_MAX_NIC_RDMA_DEV 32 |
| Maximum number of NIC RDMA devices. | |
| #define | AMDSMI_MAX_NIC_FW 16 |
| Maximum number of NIC firmwares. | |
| #define | AMDSMI_FABRIC_LABEL_MAX_LENGTH 32 |
| Fabric textual label structure. | |
| #define | AMDSMI_MAX_CARVEOUT_OPTIONS 16 |
| Maximum carveout options. | |
Typedefs | |
| typedef void * | amdsmi_processor_handle |
| opaque handler point to underlying implementation | |
| typedef void * | amdsmi_socket_handle |
| typedef void * | amdsmi_node_handle |
| opaque handler point to underlying implementation | |
| typedef void * | amdsmi_cpusocket_handle |
| opaque handler point to underlying implementation | |
| typedef amdsmi_processor_type_t | processor_type_t |
| Backward-compatibility alias for amdsmi_processor_type_t. | |
| typedef uint32_t | amdsmi_process_handle_t |
| Process Handle. | |
| typedef uintptr_t | amdsmi_event_handle_t |
| Handle to performance event counter. | |
| typedef uint64_t | amdsmi_bit_field_t |
| Bitfield used in various AMDSMI calls. | |
Functions | |
| amdsmi_status_t | amdsmi_init (uint64_t init_flags) |
| Initialize the AMD SMI library. | |
| amdsmi_status_t | amdsmi_shut_down (void) |
| Shutdown the AMD SMI library. | |
| amdsmi_status_t | amdsmi_get_socket_handles (uint32_t *socket_count, amdsmi_socket_handle *socket_handles) |
| Get the list of socket handles in the system. | |
| amdsmi_status_t | amdsmi_get_socket_info (amdsmi_socket_handle socket_handle, size_t len, char *name) |
| Get information about the given socket. | |
| amdsmi_status_t | amdsmi_get_processor_handles (amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles) |
| Get the list of the processor handles associated to a socket. | |
| amdsmi_status_t | amdsmi_get_node_handle (amdsmi_processor_handle processor_handle, amdsmi_node_handle *node_handle) |
| Get the node handle associated with processor handle. | |
| amdsmi_status_t | amdsmi_get_processor_type (amdsmi_processor_handle processor_handle, amdsmi_processor_type_t *processor_type) |
| Get the processor type of the processor_handle. | |
| amdsmi_status_t | amdsmi_get_processor_info (amdsmi_processor_handle processor_handle, size_t len, char *name) |
| Get information about the given processor. | |
| amdsmi_status_t | amdsmi_get_processor_count_from_handles (amdsmi_processor_handle *processor_handles, uint32_t *processor_count, uint32_t *nr_cpusockets, uint32_t *nr_cpucores, uint32_t *nr_gpus) |
| Get respective processor counts from the processor handles. | |
| amdsmi_status_t | amdsmi_get_processor_handles_by_type (amdsmi_socket_handle socket_handle, amdsmi_processor_type_t processor_type, amdsmi_processor_handle *processor_handles, uint32_t *processor_count) |
| Returns a list of processor handles of the specified type in the system. | |
| amdsmi_status_t | amdsmi_get_processor_handle_from_bdf (amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle) |
| Get processor handle with the matching bdf. | |
| amdsmi_status_t | amdsmi_get_gpu_device_bdf (amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf) |
| Returns BDF of the given GPU device. | |
| amdsmi_status_t | amdsmi_get_gpu_device_uuid (amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid) |
| Returns the UUID of the device. | |
| amdsmi_status_t | amdsmi_get_gpu_enumeration_info (amdsmi_processor_handle processor_handle, amdsmi_enumeration_info_t *info) |
| Returns the Enumeration information for the device. | |
| amdsmi_status_t | amdsmi_get_cpu_affinity_with_scope (amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope) |
| Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node or socket for the device. | |
| amdsmi_status_t | amdsmi_get_gpu_virtualization_mode (amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode) |
| Returns the virtualization mode for the target device. | |
| amdsmi_status_t | amdsmi_get_gpu_id (amdsmi_processor_handle processor_handle, uint16_t *id) |
| Get the device id associated with the device with provided device handler. | |
| amdsmi_status_t | amdsmi_get_gpu_revision (amdsmi_processor_handle processor_handle, uint16_t *revision) |
| Get the device revision associated with the device. | |
| amdsmi_status_t | amdsmi_get_gpu_vendor_name (amdsmi_processor_handle processor_handle, char *name, size_t len) |
| Get the name string for a give vendor ID. | |
| amdsmi_status_t | amdsmi_get_gpu_vram_vendor (amdsmi_processor_handle processor_handle, char *brand, uint32_t len) |
| Get the vram vendor string of a device. | |
| amdsmi_status_t | amdsmi_get_gpu_subsystem_id (amdsmi_processor_handle processor_handle, uint16_t *id) |
| Get the subsystem device id associated with the device with provided processor handle. | |
| amdsmi_status_t | amdsmi_get_gpu_subsystem_name (amdsmi_processor_handle processor_handle, char *name, size_t len) |
| Get the name string for the device subsystem. | |
| amdsmi_status_t | amdsmi_get_gpu_pci_bandwidth (amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth) |
| Get the list of possible PCIe bandwidths that are available. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_bdf_id (amdsmi_processor_handle processor_handle, uint64_t *bdfid) |
| Get the unique PCI device identifier associated for a device. | |
| amdsmi_status_t | amdsmi_get_gpu_topo_numa_affinity (amdsmi_processor_handle processor_handle, int32_t *numa_node) |
| Get the NUMA node associated with a device. | |
| amdsmi_status_t | amdsmi_get_gpu_pci_throughput (amdsmi_processor_handle processor_handle, uint64_t *sent, uint64_t *received, uint64_t *max_pkt_sz) |
| Get PCIe traffic information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_pci_replay_counter (amdsmi_processor_handle processor_handle, uint64_t *counter) |
| Get PCIe replay counter. | |
| amdsmi_status_t | amdsmi_set_gpu_pci_bandwidth (amdsmi_processor_handle processor_handle, uint64_t bw_bitmask) |
| Control the set of allowed PCIe bandwidths that can be used. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_energy_count (amdsmi_processor_handle processor_handle, uint64_t *energy_accumulator, float *counter_resolution, uint64_t *timestamp) |
| Get the energy accumulator counter of the processor with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_power_cap (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap) |
| Set the maximum gpu power cap value. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_power_profile (amdsmi_processor_handle processor_handle, uint32_t reserved, amdsmi_power_profile_preset_masks_t profile) |
| Set the power performance profile. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_supported_power_cap (amdsmi_processor_handle processor_handle, uint32_t *sensor_count, uint32_t *sensor_inds, amdsmi_power_cap_type_t *sensor_types) |
| Query the supported power cap sensors and their types for a device. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_power (amdsmi_processor_handle processor_handle, uint32_t *ppower) |
| Get the socket power. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_power_cap (amdsmi_processor_handle processor_handle, uint32_t *pcap) |
| Get the socket power cap. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_power_cap_max (amdsmi_processor_handle processor_handle, uint32_t *pmax) |
| Get the maximum power cap value for a given socket. | |
| amdsmi_status_t | amdsmi_get_cpu_pwr_svi_telemetry_all_rails (amdsmi_processor_handle processor_handle, uint32_t *power) |
| Get the SVI based power telemetry for all rails. | |
| amdsmi_status_t | amdsmi_set_cpu_socket_power_cap (amdsmi_processor_handle processor_handle, uint32_t pcap) |
| Set the power cap value for a given socket. | |
| amdsmi_status_t | amdsmi_set_cpu_pwr_efficiency_mode (amdsmi_processor_handle processor_handle, uint8_t power_efficiency_mode, uint32_t *utilization, uint32_t *ppt_limit) |
| Set the power efficiency profile policy. | |
| amdsmi_status_t | amdsmi_get_cpu_pwr_efficiency_mode (amdsmi_processor_handle processor_handle, uint32_t *power_efficiency_mode, uint32_t *utilization, uint32_t *ppt_limit) |
| Get the power efficiency profile policy. | |
| amdsmi_status_t | amdsmi_get_cpu_core_ccd_power (amdsmi_processor_handle processor_handle, uint32_t *power) |
| Read CCD (Core Complex Die) power consumption. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_total (amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *total) |
| Get the total amount of memory that exists. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_usage (amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *used) |
| Get the current memory usage. | |
| amdsmi_status_t | amdsmi_get_gpu_bad_page_info (amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *info) |
| Get the bad pages of a processor. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_bad_page_threshold (amdsmi_processor_handle processor_handle, uint32_t *threshold) |
| Get the bad pages threshold of a processor. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_gpu_validate_ras_eeprom (amdsmi_processor_handle processor_handle) |
| Verify the checksum of RAS EEPROM. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_ras_block_features_enabled (amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state) |
| Returns if RAS features are enabled or disabled for given block. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_reserved_pages (amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *records) |
| Get information about reserved ("retired") memory pages. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_fan_rpms (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed) |
| Get the fan speed in RPMs of the device with the specified processor handle and 0-based sensor index. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_fan_speed (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed) |
| Get the fan speed for the specified device as a value relative to the maximum fan speed. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_fan_speed_max (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t *max_speed) |
| Get the max. fan speed of the device with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_cache_info (amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info) |
| Returns gpu cache info. | |
| amdsmi_status_t | amdsmi_get_gpu_volt_metric (amdsmi_processor_handle processor_handle, amdsmi_voltage_type_t sensor_type, amdsmi_voltage_metric_t metric, int64_t *voltage) |
| Get the voltage metric value for the specified metric, from the specified voltage sensor on the specified device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_reset_gpu_fan (amdsmi_processor_handle processor_handle, uint32_t sensor_ind) |
| Reset the fan to automatic driver control. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_fan_speed (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t speed) |
| Set the fan speed for the specified device with the provided speed, in RPMs. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_busy_percent (amdsmi_processor_handle processor_handle, uint32_t *gpu_busy_percent) |
| Get GPU busy percent from gpu_busy_percent sysfs file. | |
| amdsmi_status_t | amdsmi_get_utilization_count (amdsmi_processor_handle processor_handle, amdsmi_utilization_counter_t utilization_counters[], uint32_t count, uint64_t *timestamp) |
| Get coarse grain utilization counter of the specified device. | |
| amdsmi_status_t | amdsmi_get_gpu_perf_level (amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t *perf) |
| Get the performance level of the device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_perf_determinism_mode (amdsmi_processor_handle processor_handle, uint64_t clkvalue) |
| Enter performance determinism mode with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_overdrive_level (amdsmi_processor_handle processor_handle, uint32_t *od) |
| Get the overdrive percent associated with the device with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_mem_overdrive_level (amdsmi_processor_handle processor_handle, uint32_t *od) |
| Get the GPU memory clock overdrive percent associated with the device with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_clk_freq (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_frequencies_t *f) |
| Get the list of possible system clock speeds of device for a specified clock type. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_reset_gpu (amdsmi_processor_handle processor_handle) |
| Triggers a chain that resets all GPUs. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_od_volt_info (amdsmi_processor_handle processor_handle, amdsmi_od_volt_freq_data_t *odv) |
| This function retrieves the overdrive GFX & MCLK information. If valid for the GPU it will also populate the voltage curve data. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_metrics_header_info (amdsmi_processor_handle processor_handle, amd_metrics_table_header_t *header_value) |
| Get the 'metrics_header_info' from the GPU metrics associated with the device. | |
| amdsmi_status_t | amdsmi_get_gpu_metrics_info (amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics) |
| This function retrieves the gpu metrics information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_partition_metrics_info (amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics) |
| This function retrieves the partition metrics information. | |
| amdsmi_status_t | amdsmi_get_gpu_pm_metrics_info (amdsmi_processor_handle processor_handle, amdsmi_name_value_t **pm_metrics, uint32_t *num_of_metrics) |
| Get the pm metrics table with provided device index. | |
| amdsmi_status_t | amdsmi_get_gpu_reg_table_info (amdsmi_processor_handle processor_handle, amdsmi_reg_type_t reg_type, amdsmi_name_value_t **reg_metrics, uint32_t *num_of_metrics) |
| Get the register metrics table with provided device index and register type. | |
| amdsmi_status_t | amdsmi_set_gpu_clk_range (amdsmi_processor_handle processor_handle, uint64_t minclkvalue, uint64_t maxclkvalue, amdsmi_clk_type_t clkType) |
| This function sets the clock range information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_clk_limit (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_limit_type_t limit_type, uint64_t clk_value) |
| This function sets the clock sets the clock min/max level. | |
| amdsmi_status_t | amdsmi_set_gpu_od_clk_info (amdsmi_processor_handle processor_handle, amdsmi_freq_ind_t level, uint64_t clkvalue, amdsmi_clk_type_t clkType) |
| This function sets the clock frequency information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_od_volt_info (amdsmi_processor_handle processor_handle, uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue) |
| This function sets 1 of the 3 voltage curve points. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_od_volt_curve_regions (amdsmi_processor_handle processor_handle, uint32_t *num_regions, amdsmi_freq_volt_region_t *buffer) |
| This function will retrieve the current valid regions in the frequency/voltage space. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_power_profile_presets (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_profile_status_t *status) |
| Get the list of available preset power profiles and an indication of which profile is currently active. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_perf_level (amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t perf_lvl) |
| Set the PowerPlay performance level associated with the device with provided processor handle with the provided value. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_overdrive_level (amdsmi_processor_handle processor_handle, uint32_t od) |
| Set the overdrive percent associated with the device with provided processor handle with the provided value. See details for WARNING. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_clk_freq (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, uint64_t freq_bitmask) |
| Control the set of allowed frequencies that can be used for the specified clock. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_soc_pstate (amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy) |
| Get the soc pstate policy for the processor. | |
| amdsmi_status_t | amdsmi_set_soc_pstate (amdsmi_processor_handle processor_handle, uint32_t policy_id) |
| Set the soc pstate policy for the processor. | |
| amdsmi_status_t | amdsmi_get_xgmi_plpd (amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd) |
| Get the xgmi per-link power down policy parameter for the processor. | |
| amdsmi_status_t | amdsmi_set_xgmi_plpd (amdsmi_processor_handle processor_handle, uint32_t policy_id) |
| Set the xgmi per-link power down policy parameter for the processor. | |
| amdsmi_status_t | amdsmi_get_gpu_process_isolation (amdsmi_processor_handle processor_handle, uint32_t *pisolate) |
| Get the status of the Process Isolation. | |
| amdsmi_status_t | amdsmi_set_gpu_process_isolation (amdsmi_processor_handle processor_handle, uint32_t pisolate) |
| Enable/disable the system Process Isolation. | |
| amdsmi_status_t | amdsmi_clean_gpu_local_data (amdsmi_processor_handle processor_handle) |
| Run the cleaner shader to clean up data in LDS/GPRs. | |
| amdsmi_status_t | amdsmi_alloc_fabric_telemetry (amdsmi_processor_handle processor_handle, uint32_t category_mask, amdsmi_fabric_telemetry_t **telemetry) |
| Allocate storage for Fabric telemetry data. | |
| amdsmi_status_t | amdsmi_get_fabric_telemetry_data (amdsmi_processor_handle processor_handle, amdsmi_fabric_telemetry_t *telemetry) |
| Get Fabric telemetry data. | |
| const char * | amdsmi_fabric_telem_id_to_string (uint64_t telem_id) |
| Get string name for a telemetry item ID. | |
| amdsmi_status_t | amdsmi_free_fabric_telemetry (amdsmi_processor_handle processor_handle, amdsmi_fabric_telemetry_t *telemetry) |
| Free Fabric telemetry storage. | |
| amdsmi_status_t | amdsmi_get_gpu_fabric_info (amdsmi_processor_handle processor_handle, amdsmi_fabric_info_t *info) |
| Get Fabric device information. | |
| amdsmi_status_t | amdsmi_get_lib_version (amdsmi_version_t *version) |
| Get the build version information for the currently running build of AMDSMI. | |
| amdsmi_status_t | amdsmi_get_gpu_ecc_count (amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec) |
| Retrieve the error counts for a GPU block. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_ecc_enabled (amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks) |
| Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_total_ecc_count (amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec) |
| Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_afids_from_cper (char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids) |
| Get the AFIDs from CPER buffer. | |
| amdsmi_status_t | amdsmi_get_gpu_ras_feature_info (amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature) |
| Returns RAS features info. | |
| amdsmi_status_t | amdsmi_get_gpu_cper_entries (amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor) |
| Retrieve CPER entries cached in the driver. | |
| amdsmi_status_t | amdsmi_get_gpu_ecc_status (amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state) |
| Retrieve the ECC status for a GPU block. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_status_code_to_string (amdsmi_status_t status, const char **status_string) |
| Get a description of a provided AMDSMI error status. | |
| amdsmi_status_t | amdsmi_gpu_counter_group_supported (amdsmi_processor_handle processor_handle, amdsmi_event_group_t group) |
| Tell if an event group is supported by a given device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_gpu_create_counter (amdsmi_processor_handle processor_handle, amdsmi_event_type_t type, amdsmi_event_handle_t *evnt_handle) |
| Create a performance counter object. | |
| amdsmi_status_t | amdsmi_gpu_destroy_counter (amdsmi_event_handle_t evnt_handle) |
| Deallocate a performance counter object. | |
| amdsmi_status_t | amdsmi_gpu_control_counter (amdsmi_event_handle_t evt_handle, amdsmi_counter_command_t cmd, void *cmd_args) |
| Issue performance counter control commands. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_gpu_read_counter (amdsmi_event_handle_t evt_handle, amdsmi_counter_value_t *value) |
| Read the current value of a performance counter. | |
| amdsmi_status_t | amdsmi_get_gpu_available_counters (amdsmi_processor_handle processor_handle, amdsmi_event_group_t grp, uint32_t *available) |
| Get the number of currently available counters. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_process_info (amdsmi_process_info_t *procs, uint32_t *num_items) |
| Get process information about processes currently using GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_process_info_by_pid (uint32_t pid, amdsmi_process_info_t *proc) |
| Get process information about a specific process. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_process_gpus (uint32_t pid, uint32_t *dv_indices, uint32_t *num_devices) |
| Get the device indices currently being used by a process. | |
| amdsmi_status_t | amdsmi_gpu_xgmi_error_status (amdsmi_processor_handle processor_handle, amdsmi_xgmi_status_t *status) |
| Retrieve the XGMI error status for a device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_reset_gpu_xgmi_error (amdsmi_processor_handle processor_handle) |
| Reset the XGMI error status for a device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_xgmi_info (amdsmi_processor_handle processor_handle, amdsmi_xgmi_info_t *info) |
| Returns XGMI information for the GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_xgmi_link_status (amdsmi_processor_handle processor_handle, amdsmi_xgmi_link_status_t *link_status) |
| Get the XGMI link status. | |
| amdsmi_status_t | amdsmi_get_link_metrics (amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics) |
| Return link metric information. | |
| amdsmi_status_t | amdsmi_topo_get_numa_node_number (amdsmi_processor_handle processor_handle, uint32_t *numa_node) |
| Retrieve the NUMA CPU node number for a device. | |
| amdsmi_status_t | amdsmi_topo_get_link_weight (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *weight) |
| Retrieve the weight for a connection between 2 GPUs. | |
| amdsmi_status_t | amdsmi_get_minmax_bandwidth_between_processors (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *min_bandwidth, uint64_t *max_bandwidth) |
| Retrieve minimal and maximal io link bandwidth between 2 GPUs. | |
| amdsmi_status_t | amdsmi_topo_get_link_type (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *hops, amdsmi_link_type_t *type) |
| Retrieve the hops and the connection type between 2 GPUs. | |
| amdsmi_status_t | amdsmi_get_link_topology_nearest (amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info) |
| Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level. | |
| amdsmi_status_t | amdsmi_is_P2P_accessible (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, bool *accessible) |
| Return P2P availability status between 2 GPUs. | |
| amdsmi_status_t | amdsmi_topo_get_p2p_status (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap) |
| Retrieve connection type and P2P capabilities between 2 GPUs. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_partition (amdsmi_processor_handle processor_handle, char *compute_partition, uint32_t len) |
| Retrieves the current compute partitioning for a desired device. | |
| amdsmi_status_t | amdsmi_set_gpu_compute_partition (amdsmi_processor_handle processor_handle, amdsmi_compute_partition_type_t compute_partition) |
| Modifies a selected device's compute partition setting. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_partition_mem_alloc_mode (amdsmi_processor_handle processor_handle, amdsmi_compute_partition_mem_alloc_mode_t *mode) |
| Retrieves the current compute partition memory allocation mode for a desired device. | |
| amdsmi_status_t | amdsmi_set_gpu_compute_partition_mem_alloc_mode (amdsmi_processor_handle processor_handle, amdsmi_compute_partition_mem_alloc_mode_t mode) |
| Modifies a selected device's compute partition memory allocation mode. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_partition (amdsmi_processor_handle processor_handle, char *memory_partition, uint32_t len) |
| Retrieves the current memory partition for a desired device. | |
| amdsmi_status_t | amdsmi_set_gpu_memory_partition (amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t memory_partition) |
| Modifies a selected device's current memory partition setting. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_partition_config (amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config) |
| Returns current gpu memory partition capabilities. | |
| amdsmi_status_t | amdsmi_set_gpu_memory_partition_mode (amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode) |
| Sets memory partition mode Set memory partition setting based on memory_partition mode from amdsmi_get_gpu_memory_partition_config. | |
| amdsmi_status_t | amdsmi_get_gpu_accelerator_partition_profile_config (amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config) |
| Returns gpu accelerator partition caps as currently configured in the system. | |
| amdsmi_status_t | amdsmi_get_gpu_accelerator_partition_profile (amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id) |
| Returns current gpu accelerator partition cap. | |
| amdsmi_status_t | amdsmi_set_gpu_accelerator_partition_profile (amdsmi_processor_handle processor_handle, uint32_t profile_index) |
| Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_profile_config. | |
| amdsmi_status_t | amdsmi_init_gpu_event_notification (amdsmi_processor_handle processor_handle) |
| Prepare to collect event notifications for a GPU. | |
| amdsmi_status_t | amdsmi_set_gpu_event_notification_mask (amdsmi_processor_handle processor_handle, uint64_t mask) |
| Specify which events to collect for a device. | |
| amdsmi_status_t | amdsmi_get_gpu_event_notification (int timeout_ms, uint32_t *num_elem, amdsmi_evt_notification_data_t *data) |
| Collect event notifications, waiting a specified amount of time. | |
| amdsmi_status_t | amdsmi_stop_gpu_event_notification (amdsmi_processor_handle processor_handle) |
| Close any file handles and free any resources used by event notification for a GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_driver_info (amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info) |
| Returns the driver version information. | |
| amdsmi_status_t | amdsmi_get_gpu_asic_info (amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info) |
| Returns the ASIC information for the device. | |
| amdsmi_status_t | amdsmi_get_gpu_kfd_info (amdsmi_processor_handle processor_handle, amdsmi_kfd_info_t *info) |
| Returns the KFD (Kernel Fusion Driver) information for the device. | |
| amdsmi_status_t | amdsmi_get_gpu_vram_info (amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info) |
| Returns vram info. | |
| amdsmi_status_t | amdsmi_get_gpu_board_info (amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info) |
| Returns the board part number and board information for the requested device. | |
| amdsmi_status_t | amdsmi_get_power_cap_info (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info) |
| Returns the power caps as currently configured in the system. | |
| amdsmi_status_t | amdsmi_get_pcie_info (amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info) |
| Returns the PCIe info for the GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_xcd_counter (amdsmi_processor_handle processor_handle, uint16_t *xcd_count) |
| Returns the 'xcd_counter' from the GPU metrics associated with the device. | |
| amdsmi_status_t | amdsmi_get_npm_info (amdsmi_node_handle node_handle, amdsmi_npm_info_t *info) |
| Retrieves node power management (NPM) status and power limit for the specified node. | |
| amdsmi_status_t | amdsmi_get_fw_info (amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info) |
| Returns the firmware versions running on the device. | |
| amdsmi_status_t | amdsmi_get_gpu_vbios_info (amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info) |
| Returns the static information for the vBIOS on the device. | |
| amdsmi_status_t | amdsmi_get_temp_metric (amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature) |
| Get the temperature metric value for the specified metric, from the specified temperature sensor on the specified device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_activity (amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info) |
| Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentage from 0-100%. | |
| amdsmi_status_t | amdsmi_get_power_info (amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info) |
| Returns the current power and voltage of the GPU. | |
| amdsmi_status_t | amdsmi_is_gpu_power_management_enabled (amdsmi_processor_handle processor_handle, bool *enabled) |
| Returns is power management enabled. | |
| amdsmi_status_t | amdsmi_get_clock_info (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info) |
| Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory. This call reports the averages over 1s in MHz. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_vram_usage (amdsmi_processor_handle processor_handle, amdsmi_vram_usage_t *info) |
| Returns the VRAM usage (both total and used memory) in MegaBytes. | |
| amdsmi_status_t | amdsmi_get_violation_status (amdsmi_processor_handle processor_handle, amdsmi_violation_status_t *info) |
| Returns the violations for a processor. | |
| amdsmi_status_t | amdsmi_get_gpu_process_list (amdsmi_processor_handle processor_handle, uint32_t *max_processes, amdsmi_proc_info_t *list) |
| Returns the list of process information running on a given GPU. If pdh.dll is not present on the system, this API returns AMDSMI_STATUS_NOT_SUPPORTED. Sum of the process memory is not expected to be the total memory usage. | |
| amdsmi_status_t | amdsmi_get_gpu_process_list_by_pid (amdsmi_processor_handle *processor_handles, uint32_t num_processors, amdsmi_proc_info_by_pid_t *procs, uint32_t *max_processes) |
| Get the list of processes running on one or more GPUs, grouped by PID. | |
| amdsmi_status_t | amdsmi_gpu_driver_reload (void) |
| Restart the device driver (kmod module) for all AMD GPUs on the system. | |
| amdsmi_status_t | amdsmi_get_gpu_ptl_state (amdsmi_processor_handle processor_handle, bool *enabled) |
| Get PTL enable/disable state. | |
| amdsmi_status_t | amdsmi_set_gpu_ptl_state (amdsmi_processor_handle processor_handle, bool enable) |
| Set PTL enable/disable state. | |
| amdsmi_status_t | amdsmi_get_gpu_ptl_formats (amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t *data_format1, amdsmi_ptl_data_format_t *data_format2) |
| Get PTL (Peak Tops Limiter) formats for the processor. | |
| amdsmi_status_t | amdsmi_set_gpu_ptl_formats (amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t data_format1, amdsmi_ptl_data_format_t data_format2) |
| Set PTL with specified preferred data formats. | |
| amdsmi_status_t | amdsmi_get_cpu_handles (uint32_t *cpu_count, amdsmi_processor_handle *processor_handles) |
| Get the list of cpu handles in the system. | |
| amdsmi_status_t | amdsmi_get_cpucore_handles (uint32_t *cores_count, amdsmi_processor_handle *processor_handles) |
| Get the list of the cpu core handles in a system. | |
| amdsmi_status_t | amdsmi_get_cpu_core_energy (amdsmi_processor_handle processor_handle, uint64_t *penergy) |
| Get the core energy for a given core. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_energy (amdsmi_processor_handle processor_handle, uint64_t *penergy) |
| Get the socket energy for a given socket. | |
| amdsmi_status_t | amdsmi_get_threads_per_core (uint32_t *threads_per_core) |
| Get Number of threads Per Core. | |
| amdsmi_status_t | amdsmi_get_cpu_hsmp_driver_version (amdsmi_processor_handle processor_handle, amdsmi_hsmp_driver_version_t *amdsmi_hsmp_driver_ver) |
| Get HSMP Driver Version. | |
| amdsmi_status_t | amdsmi_get_cpu_smu_fw_version (amdsmi_processor_handle processor_handle, amdsmi_smu_fw_version_t *amdsmi_smu_fw) |
| Get SMU Firmware Version. | |
| amdsmi_status_t | amdsmi_get_cpu_hsmp_proto_ver (amdsmi_processor_handle processor_handle, uint32_t *proto_ver) |
| Get HSMP protocol Version. | |
| amdsmi_status_t | amdsmi_get_cpu_prochot_status (amdsmi_processor_handle processor_handle, uint32_t *prochot) |
| Get normalized status of the processor's PROCHOT status. | |
| amdsmi_status_t | amdsmi_get_cpu_fclk_mclk (amdsmi_processor_handle processor_handle, uint32_t *fclk, uint32_t *mclk) |
| Get Data fabric clock and Memory clock in MHz. | |
| amdsmi_status_t | amdsmi_get_cpu_cclk_limit (amdsmi_processor_handle processor_handle, uint32_t *cclk) |
| Get core clock in MHz. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_current_active_freq_limit (amdsmi_processor_handle processor_handle, uint16_t *freq, char **src_type) |
| Get current active frequency limit of the socket. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_freq_range (amdsmi_processor_handle processor_handle, uint16_t *fmax, uint16_t *fmin) |
| Get socket frequency range. | |
| amdsmi_status_t | amdsmi_get_cpu_core_current_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *freq) |
| Get socket frequency limit of the core. | |
| amdsmi_status_t | amdsmi_set_cpu_rail_isofreq_policy (amdsmi_processor_handle processor_handle, bool *rail_isofreq_policy) |
| Set CPU rail isolated frequency policy for independent core clock control per power rail. | |
| amdsmi_status_t | amdsmi_get_cpu_rail_isofreq_policy (amdsmi_processor_handle processor_handle, uint8_t *rail_isofreq_policy) |
| Get CPU rail isolated frequency policy status for independent core clock control per power rail. | |
| amdsmi_status_t | amdsmi_set_cpu_dfc_ctrl (amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl) |
| Set the DFCState enabling control. | |
| amdsmi_status_t | amdsmi_get_cpu_dfc_ctrl (amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl) |
| Get the current DFCState enabling control status. | |
| amdsmi_status_t | amdsmi_get_cpu_core_boostlimit (amdsmi_processor_handle processor_handle, uint32_t *pboostlimit) |
| Get the core boost limit. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_c0_residency (amdsmi_processor_handle processor_handle, uint32_t *pc0_residency) |
| Get the socket c0 residency. | |
| amdsmi_status_t | amdsmi_set_cpu_core_boostlimit (amdsmi_processor_handle processor_handle, uint32_t boostlimit) |
| Set the core boostlimit value. | |
| amdsmi_status_t | amdsmi_set_cpu_socket_boostlimit (amdsmi_processor_handle processor_handle, uint32_t boostlimit) |
| Set the socket boostlimit value. | |
| amdsmi_status_t | amdsmi_get_cpu_core_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *floor_freq) |
| Get the CPU core floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *floor_freq) |
| Get the CPU floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_core_eff_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq) |
| Get the CPU core effective floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_eff_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq) |
| Get the CPU effective floor limit frequency. | |
| amdsmi_status_t | amdsmi_set_cpu_core_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t floor_freq) |
| Set the CPU core floor limit frequency. | |
| amdsmi_status_t | amdsmi_set_cpu_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t floor_freq) |
| Set the CPU socket floor limit frequency. | |
| amdsmi_status_t | amdsmi_set_cpu_msr_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq) |
| Set CPU floor limit frequency via MSR(Model Specific Register). | |
| amdsmi_status_t | amdsmi_set_cpu_core_msr_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq) |
| Set CPU core MSR floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_freq_range (uint32_t *fmax, uint32_t *fmin) |
| Get the CPU socket frequency range. | |
| amdsmi_status_t | amdsmi_set_cpu_sdps_limit (amdsmi_processor_handle processor_handle, uint32_t sdps_limit) |
| Set the SDPS(Socket DIMM Power Sloshing) limit for a given processor socket. | |
| amdsmi_status_t | amdsmi_get_cpu_sdps_limit (amdsmi_processor_handle processor_handle, uint32_t *sdps_limit) |
| Get the current SDPS limit for a given processor socket. | |
| amdsmi_status_t | amdsmi_get_cpu_ddr_bw (amdsmi_processor_handle processor_handle, amdsmi_ddr_bw_metrics_t *ddr_bw) |
| Get the DDR bandwidth data. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_temperature (amdsmi_processor_handle processor_handle, uint32_t *ptmon) |
| Get socket temperature. | |
| amdsmi_status_t | amdsmi_get_cpu_tdelta (amdsmi_processor_handle processor_handle, uint8_t *tdelta) |
| Read Thermal Delta (TDELTA) Behavior. | |
| amdsmi_status_t | amdsmi_get_cpu_svi3_vr_controller_temp (amdsmi_processor_handle processor_handle, uint32_t *rail_selection, uint32_t *rail_index, uint32_t *temp) |
| Get Temperature of SVI3 VR(Voltage Rail) | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_temp_range_and_refresh_rate (amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_temp_range_refresh_rate_t *rate) |
| Get DIMM temperature range and refresh rate. | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_power_consumption (amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_power_t *dimm_pow) |
| Get DIMM power consumption. | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_thermal_sensor (amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_thermal_t *dimm_temp) |
| Get DIMM thermal sensor value. | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_sb_reg (amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t *data) |
| Read DIMM sideband register data. | |
| amdsmi_status_t | amdsmi_set_cpu_dimm_sb_reg (amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t write_data) |
| Write Data to DIMM Sideband Register. | |
| amdsmi_status_t | amdsmi_set_cpu_xgmi_width (amdsmi_processor_handle processor_handle, uint8_t min, uint8_t max) |
| Set xgmi width. | |
| amdsmi_status_t | amdsmi_set_cpu_gmi3_link_width_range (amdsmi_processor_handle processor_handle, uint8_t min_link_width, uint8_t max_link_width) |
| Set gmi3 link width range. | |
| amdsmi_status_t | amdsmi_cpu_apb_enable (amdsmi_processor_handle processor_handle) |
| Enable APB. | |
| amdsmi_status_t | amdsmi_cpu_apb_disable (amdsmi_processor_handle processor_handle, uint8_t pstate) |
| Disable APB. | |
| amdsmi_status_t | amdsmi_set_cpu_socket_lclk_dpm_level (amdsmi_processor_handle processor_handle, uint8_t nbio_id, uint8_t min, uint8_t max) |
| Set NBIO lclk dpm level value. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_lclk_dpm_level (amdsmi_processor_handle processor_handle, uint8_t nbio_id, amdsmi_dpm_level_t *nbio) |
| Get NBIO LCLK dpm level. | |
| amdsmi_status_t | amdsmi_set_cpu_pcie_link_rate (amdsmi_processor_handle processor_handle, uint8_t rate_ctrl, uint8_t *prev_mode) |
| Set pcie link rate. | |
| amdsmi_status_t | amdsmi_set_cpu_df_pstate_range (amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate) |
| Set df pstate range. | |
| amdsmi_status_t | amdsmi_set_cpu_xgmi_pstate_range (amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate) |
| Set the Min and Max XGMI PState Range. | |
| amdsmi_status_t | amdsmi_get_cpu_xgmi_pstate_range (amdsmi_processor_handle processor_handle, uint8_t *min_pstate, uint8_t *max_pstate) |
| Get the Max and Min XGMI PState Range. | |
| amdsmi_status_t | amdsmi_get_cpu_pc6_enable (amdsmi_processor_handle processor_handle, uint8_t *enabled) |
| Get the PC6 Enable State. | |
| amdsmi_status_t | amdsmi_set_cpu_pc6_enable (amdsmi_processor_handle processor_handle, uint8_t enable) |
| Set the PC6 Enable State. | |
| amdsmi_status_t | amdsmi_get_cpu_cc6_enable (amdsmi_processor_handle processor_handle, uint8_t *enabled) |
| Get the Core C6 Enable State. | |
| amdsmi_status_t | amdsmi_set_cpu_cc6_enable (amdsmi_processor_handle processor_handle, uint8_t enable) |
| Set the Core C6 Enable State. | |
| amdsmi_status_t | amdsmi_get_cpu_current_io_bandwidth (amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *io_bw) |
| Get current input output bandwidth. | |
| amdsmi_status_t | amdsmi_get_cpu_current_xgmi_bw (amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *xgmi_bw) |
| Get current input output bandwidth. | |
| amdsmi_status_t | amdsmi_get_hsmp_metrics_table_version (amdsmi_processor_handle processor_handle, uint32_t *metrics_version) |
| Get HSMP metrics table version. | |
| amdsmi_status_t | amdsmi_get_hsmp_metrics_table (amdsmi_processor_handle processor_handle, amdsmi_hsmp_metrics_table_t *metrics_table) |
| Get HSMP metrics table. | |
| amdsmi_status_t | amdsmi_first_online_core_on_cpu_socket (amdsmi_processor_handle processor_handle, uint32_t *pcore_ind) |
| Get first online core on socket. | |
| amdsmi_status_t | amdsmi_get_cpu_family (uint32_t *cpu_family) |
| Get CPU family. | |
| amdsmi_status_t | amdsmi_get_cpu_model (uint32_t *cpu_model) |
| Get CPU model. | |
| amdsmi_status_t | amdsmi_get_cpu_model_name (amdsmi_processor_handle processor_handle, amdsmi_cpu_info_t *cpu_info) |
| Retrieve the CPU processor model name based on the processor index. | |
| amdsmi_status_t | amdsmi_get_esmi_err_msg (amdsmi_status_t status, const char **status_string) |
| Get a description of provided AMDSMI error status for esmi errors. | |
| amdsmi_status_t | amdsmi_get_cpu_cores_per_socket (uint32_t sock_count, amdsmi_sock_info_t *soc_info) |
| Get cpu cores per socket from sys filesystem. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_count (uint32_t *sock_count) |
| Get CPU socket count from sys filesystem. | |
| amdsmi_status_t | amdsmi_get_cpu_enabled_commands (amdsmi_processor_handle processor_handle, bool *r_mask, uint32_t *mask0, uint32_t *mask1, uint32_t *mask2) |
| Get HSMP Enabled Commands information for a given CPU socket. | |
| amdsmi_status_t | amdsmi_get_nic_driver_info (amdsmi_processor_handle processor_handle, amdsmi_nic_driver_info_t *info) |
| Retrieves information about the NIC driver. | |
| amdsmi_status_t | amdsmi_get_nic_asic_info (amdsmi_processor_handle processor_handle, amdsmi_nic_asic_info_t *info) |
| Retrieves ASIC information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_bus_info (amdsmi_processor_handle processor_handle, amdsmi_nic_bus_info_t *info) |
| Retrieves BUS information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_numa_info (amdsmi_processor_handle processor_handle, amdsmi_nic_numa_info_t *info) |
| Retrieves NUMA information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_port_info (amdsmi_processor_handle processor_handle, amdsmi_nic_port_info_t *info) |
| Retrieves PORT information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_rdma_dev_info (amdsmi_processor_handle processor_handle, amdsmi_nic_rdma_devices_info_t *info) |
| Retrieves RDMA devices information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_rdma_port_statistics (amdsmi_processor_handle processor_handle, uint32_t rdma_port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats) |
| Retrieve RDMA port statistics for the NIC. | |
| amdsmi_status_t | amdsmi_get_gpu_uma_carveout_info (amdsmi_processor_handle processor_handle, amdsmi_uma_carveout_info_t *info) |
| Get UMA carveout configuration information. | |
| amdsmi_status_t | amdsmi_set_gpu_uma_carveout (amdsmi_processor_handle processor_handle, uint32_t option_index) |
| Set UMA carveout configuration. | |
| amdsmi_status_t | amdsmi_get_ttm_info (amdsmi_ttm_info_t *info) |
| Get TTM configuration information. | |
| amdsmi_status_t | amdsmi_set_ttm_pages_limit (uint64_t pages) |
| Set TTM pages limit. | |
| amdsmi_status_t | amdsmi_reset_ttm_pages_limit (void) |
| Reset TTM pages limit to system default. | |
Detailed Description
AMD System Management Interface API.
Definition in file amdsmi.h.
Macro Definition Documentation
◆ AMDSMI_MAX_MM_IP_COUNT
| #define AMDSMI_MAX_MM_IP_COUNT 8 |
◆ AMDSMI_MAX_STRING_LENGTH
| #define AMDSMI_MAX_STRING_LENGTH 256 |
◆ AMDSMI_MAX_DEVICES
| #define AMDSMI_MAX_DEVICES 32 |
◆ AMDSMI_MAX_CACHE_TYPES
| #define AMDSMI_MAX_CACHE_TYPES 10 |
◆ AMDSMI_MAX_ACCELERATOR_PROFILE
| #define AMDSMI_MAX_ACCELERATOR_PROFILE 32 |
◆ AMDSMI_MAX_CP_PROFILE_RESOURCES
| #define AMDSMI_MAX_CP_PROFILE_RESOURCES 32 |
◆ AMDSMI_MAX_ACCELERATOR_PARTITIONS
| #define AMDSMI_MAX_ACCELERATOR_PARTITIONS 8 |
◆ AMDSMI_MAX_NUM_NUMA_NODES
| #define AMDSMI_MAX_NUM_NUMA_NODES 32 |
◆ AMDSMI_GPU_UUID_SIZE
◆ AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK
| #define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64 |
◆ AMDSMI_MAX_CONTAINER_TYPE
| #define AMDSMI_MAX_CONTAINER_TYPE 2 |
◆ CENTRIGRADE_TO_MILLI_CENTIGRADE
| #define CENTRIGRADE_TO_MILLI_CENTIGRADE 1000 |
◆ AMDSMI_NUM_HBM_INSTANCES
| #define AMDSMI_NUM_HBM_INSTANCES 4 |
◆ AMDSMI_MAX_NUM_VCN
| #define AMDSMI_MAX_NUM_VCN 4 |
◆ AMDSMI_MAX_NUM_CLKS
| #define AMDSMI_MAX_NUM_CLKS 4 |
◆ AMDSMI_MAX_NUM_XGMI_LINKS
| #define AMDSMI_MAX_NUM_XGMI_LINKS 8 |
◆ AMDSMI_MAX_NUM_GFX_CLKS
| #define AMDSMI_MAX_NUM_GFX_CLKS 8 |
◆ AMDSMI_MAX_AID
◆ AMDSMI_MAX_ENGINES
| #define AMDSMI_MAX_ENGINES 8 |
◆ AMDSMI_MAX_NUM_JPEG
| #define AMDSMI_MAX_NUM_JPEG 32 |
◆ AMDSMI_MAX_NUM_JPEG_ENG_V1
| #define AMDSMI_MAX_NUM_JPEG_ENG_V1 40 |
◆ AMDSMI_MAX_NUM_XCC
| #define AMDSMI_MAX_NUM_XCC 8 |
This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units, ACE (Asynchronous Compute Engines), caches, and global resources organized as one unit.
Refer to amd.com documentation for more detail: https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/white-papers/amd-cdna-3-white-paper.pdf
◆ AMDSMI_MAX_NUM_XCP
| #define AMDSMI_MAX_NUM_XCP 8 |
This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Graphics Compute Partitions. Each physical gpu could have a maximum of 8 separate partitions associated with each (depending on ASIC support).
Refer to amd.com documentation for more detail: https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/white-papers/amd-cdna-3-white-paper.pdf
◆ AMDSMI_APU_MAX_CORES
| #define AMDSMI_APU_MAX_CORES 16 |
◆ AMDSMI_APU_V24_CORES
◆ AMDSMI_APU_MAX_L3
◆ AMDSMI_APU_MAX_IPU
◆ MAX_NUMBER_OF_AFIDS_PER_RECORD
| #define MAX_NUMBER_OF_AFIDS_PER_RECORD 12 |
◆ AMDSMI_MAX_VF_COUNT
| #define AMDSMI_MAX_VF_COUNT 32 |
◆ AMDSMI_MAX_DRIVER_NUM
◆ AMDSMI_DFC_FW_NUMBER_OF_ENTRIES
| #define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9 |
◆ AMDSMI_MAX_WHITE_LIST_ELEMENTS
| #define AMDSMI_MAX_WHITE_LIST_ELEMENTS 16 |
◆ AMDSMI_MAX_BLACK_LIST_ELEMENTS
| #define AMDSMI_MAX_BLACK_LIST_ELEMENTS 64 |
◆ AMDSMI_MAX_UUID_ELEMENTS
| #define AMDSMI_MAX_UUID_ELEMENTS 16 |
◆ AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS
| #define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS 8 |
◆ AMDSMI_MAX_ERR_RECORDS
| #define AMDSMI_MAX_ERR_RECORDS 10 |
◆ AMDSMI_MAX_PROFILE_COUNT
| #define AMDSMI_MAX_PROFILE_COUNT 16 |
◆ AMDSMI_MAX_NUM_HBM_STACKS
| #define AMDSMI_MAX_NUM_HBM_STACKS 12 |
◆ AMDSMI_MAX_NUM_AID
| #define AMDSMI_MAX_NUM_AID 2 |
◆ AMDSMI_MAX_NUM_MID
| #define AMDSMI_MAX_NUM_MID 2 |
◆ AMDSMI_MAX_NUM_CLKS_PER_AID
| #define AMDSMI_MAX_NUM_CLKS_PER_AID 2 |
◆ AMDSMI_MAX_NUM_CLKS_PER_MID
| #define AMDSMI_MAX_NUM_CLKS_PER_MID 2 |
◆ AMDSMI_TIME_FORMAT
| #define AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d" |
◆ AMDSMI_DATE_FORMAT
| #define AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d" |
◆ AMDSMI_LIB_VERSION_MAJOR
| #define AMDSMI_LIB_VERSION_MAJOR 26 |
◆ AMDSMI_LIB_VERSION_MINOR
| #define AMDSMI_LIB_VERSION_MINOR 5 |
◆ AMDSMI_LIB_VERSION_RELEASE
| #define AMDSMI_LIB_VERSION_RELEASE 0 |
◆ AMDSMI_LIB_VERSION_CREATE_STRING
| #define AMDSMI_LIB_VERSION_CREATE_STRING | ( | MAJOR, | |
| MINOR, | |||
| RELEASE | |||
| ) | (#MAJOR "." #MINOR "." #RELEASE) |
◆ AMDSMI_LIB_VERSION_EXPAND_PARTS
| #define AMDSMI_LIB_VERSION_EXPAND_PARTS | ( | MAJOR_STR, | |
| MINOR_STR, | |||
| RELEASE_STR | |||
| ) | AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR_STR, MINOR_STR, RELEASE_STR) |
Definition at line 253 of file amdsmi.h.
272 {
273 AMDSMI_MM_UVD,
274 AMDSMI_MM_VCE,
275 AMDSMI_MM_VCN,
276 AMDSMI_MM__MAX
277} amdsmi_mm_ip_t;
278
284typedef enum {
285 AMDSMI_CONTAINER_LXC,
287} amdsmi_container_types_t;
288
295typedef void* amdsmi_socket_handle;
296
303
304#ifdef ENABLE_ESMI_LIB
305
312
318typedef struct {
319 uint32_t major;
320 uint32_t minor;
322
328#define AMDSMI_MAX_SPD_DIMM_ADDRESS 0xFF
329#define AMDSMI_MAX_SPD_LID 0xF
330#define AMDSMI_MAX_SPD_REG_OFFSET 0x7FF
331#define AMDSMI_MAX_SPD_REG_SPACE 0x1
332#define AMDSMI_MAX_SPD_WRITE_DATA 0xFF
333#define MAX_SVI3_RAIL_INDEX 4
334#define MAX_SVI3_RAIL_SELECTION 1
335#define POWER_EFFICIENCY_MODE_4 0x4
336#define POWER_EFFICIENCY_MODE_5 0x5
337#define AMDSMI_MAX_POWER_EFFICIENCY_UTIL 0x7F
338#define AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT 0x1FFFFF
339#define AMDSMI_RAIL_INDEX_NONE 0xFFFFFFFF
340
341#endif
342
348typedef enum {
349 AMDSMI_PROCESSOR_TYPE_UNKNOWN = 0,
360} amdsmi_processor_type_t;
361
372
381typedef enum {
382 AMDSMI_STATUS_SUCCESS = 0,
383 // Library usage errors
384 AMDSMI_STATUS_INVAL = 1,
385 AMDSMI_STATUS_NOT_SUPPORTED = 2,
386 AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,
387 AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,
388 AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,
389 AMDSMI_STATUS_DRM_ERROR = 6,
390 AMDSMI_STATUS_API_FAILED = 7,
391 AMDSMI_STATUS_TIMEOUT = 8,
392 AMDSMI_STATUS_RETRY = 9,
393 AMDSMI_STATUS_NO_PERM = 10,
394 AMDSMI_STATUS_INTERRUPT = 11,
395 AMDSMI_STATUS_IO = 12,
396 AMDSMI_STATUS_ADDRESS_FAULT = 13,
397 AMDSMI_STATUS_FILE_ERROR = 14,
398 AMDSMI_STATUS_OUT_OF_RESOURCES = 15,
399 AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,
400 AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,
401 AMDSMI_STATUS_INIT_ERROR = 18,
402 AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,
403 AMDSMI_STATUS_DIRECTORY_NOT_FOUND = 20,
404 AMDSMI_STATUS_IPC_ERROR = 21,
405 // Processor related errors
406 AMDSMI_STATUS_BUSY = 30,
407 AMDSMI_STATUS_NOT_FOUND = 31,
408 AMDSMI_STATUS_NOT_INIT = 32,
409 AMDSMI_STATUS_NO_SLOT = 33,
410 AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,
411 // Data and size errors
412 AMDSMI_STATUS_MORE_DATA = 39,
413 AMDSMI_STATUS_NO_DATA = 40,
414 AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,
415 AMDSMI_STATUS_UNEXPECTED_SIZE = 42,
416 AMDSMI_STATUS_UNEXPECTED_DATA = 43,
417 // esmi errors
418 AMDSMI_STATUS_NON_AMD_CPU = 44,
419 AMDSMI_STATUS_NO_ENERGY_DRV = 45,
420 AMDSMI_STATUS_NO_MSR_DRV = 46,
421 AMDSMI_STATUS_NO_HSMP_DRV = 47,
422 AMDSMI_STATUS_NO_HSMP_SUP = 48,
423 AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,
424 AMDSMI_STATUS_HSMP_TIMEOUT = 50,
425 AMDSMI_STATUS_NO_DRV = 51,
426 AMDSMI_STATUS_FILE_NOT_FOUND = 52,
427 AMDSMI_STATUS_ARG_PTR_NULL = 53,
428 AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,
429 AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,
430 AMDSMI_STATUS_CORRUPTED_EEPROM = 56,
431 // General errors
432 AMDSMI_STATUS_MAP_ERROR = 0xFFFFFFFE,
433 AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF
434} amdsmi_status_t;
435
441typedef enum {
442 AMDSMI_CLK_TYPE_SYS = 0x0,
443 AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,
445 AMDSMI_CLK_TYPE_DF,
447 AMDSMI_CLK_TYPE_DCEF,
449 AMDSMI_CLK_TYPE_SOC,
450 AMDSMI_CLK_TYPE_MEM,
451 AMDSMI_CLK_TYPE_PCIE,
456 AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1
457} amdsmi_clk_type_t;
458
464typedef enum {
465 AMDSMI_ACCELERATOR_PARTITION_INVALID = 0,
476 AMDSMI_ACCELERATOR_PARTITION_MAX
478
484typedef enum {
490 AMDSMI_ACCELERATOR_MAX
492
499typedef enum {
500 AMDSMI_COMPUTE_PARTITION_INVALID = 0,
512
519typedef enum {
525
531typedef enum {
532 AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
533 AMDSMI_MEMORY_PARTITION_NPS1 = 1,
535 AMDSMI_MEMORY_PARTITION_NPS2 = 2,
538 AMDSMI_MEMORY_PARTITION_NPS4 = 4,
541 AMDSMI_MEMORY_PARTITION_NPS8 = 8,
547
554typedef enum {
556 AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
565
566 // GPU Board Node temperature
567 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST = 100,
569 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST,
578 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_LAST = 149,
579
580 // GPU Board VR (Voltage Regulator) temperature
581 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST = 150,
583 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST,
623 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_LAST = 199,
626
627 // Baseboard System temperature
628 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST = 200,
630 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST,
663 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST = 249,
665 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST
667
674typedef enum {
675 AMDSMI_FW_ID_SMU = 1,
677 AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
678 AMDSMI_FW_ID_CP_CE,
679 AMDSMI_FW_ID_CP_PFP,
680 AMDSMI_FW_ID_CP_ME,
685 AMDSMI_FW_ID_CP_MEC1,
687 AMDSMI_FW_ID_CP_MEC2,
689 AMDSMI_FW_ID_RLC,
690 AMDSMI_FW_ID_SDMA0,
691 AMDSMI_FW_ID_SDMA1,
692 AMDSMI_FW_ID_SDMA2,
693 AMDSMI_FW_ID_SDMA3,
694 AMDSMI_FW_ID_SDMA4,
695 AMDSMI_FW_ID_SDMA5,
696 AMDSMI_FW_ID_SDMA6,
697 AMDSMI_FW_ID_SDMA7,
698 AMDSMI_FW_ID_VCN,
699 AMDSMI_FW_ID_UVD,
700 AMDSMI_FW_ID_VCE,
701 AMDSMI_FW_ID_ISP,
710 AMDSMI_FW_ID_RLC_V,
711 AMDSMI_FW_ID_MMSCH,
714 AMDSMI_FW_ID_PSP_TOC,
716 AMDSMI_FW_ID_DFC,
717 AMDSMI_FW_ID_PSP_SPL,
718 AMDSMI_FW_ID_DRV_CAP,
719 AMDSMI_FW_ID_MC,
720 AMDSMI_FW_ID_PSP_BL,
721 AMDSMI_FW_ID_CP_PM4,
722 AMDSMI_FW_ID_RLC_P,
729 AMDSMI_FW_ID_CP_MES,
730 AMDSMI_FW_ID_MES_KIQ,
734 AMDSMI_FW_ID_RLX6,
736 AMDSMI_FW_ID_RS64_ME,
753 AMDSMI_FW_ID_PPTABLE,
754 AMDSMI_FW_ID_PSP_SOC,
755 AMDSMI_FW_ID_PSP_DBG,
761 AMDSMI_FW_ID_ASD,
762 AMDSMI_FW_ID_TA_RAS,
763 AMDSMI_FW_ID_TA_XGMI,
766 AMDSMI_FW_ID_PM,
767 AMDSMI_FW_ID_DMCU,
769 AMDSMI_FW_ID__MAX
770} amdsmi_fw_block_t;
771
777typedef enum {
778 AMDSMI_VRAM_TYPE_UNKNOWN = 0,
779 // HBM
780 AMDSMI_VRAM_TYPE_HBM = 1,
781 AMDSMI_VRAM_TYPE_HBM2 = 2,
782 AMDSMI_VRAM_TYPE_HBM2E = 3,
783 AMDSMI_VRAM_TYPE_HBM3 = 4,
784 AMDSMI_VRAM_TYPE_HBM3E = 5,
785 // DDR
786 AMDSMI_VRAM_TYPE_DDR2 = 10,
787 AMDSMI_VRAM_TYPE_DDR3 = 11,
788 AMDSMI_VRAM_TYPE_DDR4 = 12,
789 AMDSMI_VRAM_TYPE_DDR5 = 13,
790 // GDDR
791 AMDSMI_VRAM_TYPE_GDDR1 = 17,
792 AMDSMI_VRAM_TYPE_GDDR2 = 18,
793 AMDSMI_VRAM_TYPE_GDDR3 = 19,
794 AMDSMI_VRAM_TYPE_GDDR4 = 20,
795 AMDSMI_VRAM_TYPE_GDDR5 = 21,
796 AMDSMI_VRAM_TYPE_GDDR6 = 22,
797 AMDSMI_VRAM_TYPE_GDDR7 = 23,
798 // LPDDR
799 AMDSMI_VRAM_TYPE_LPDDR4 = 30,
800 AMDSMI_VRAM_TYPE_LPDDR5 = 31,
801 AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_LPDDR5
802} amdsmi_vram_type_t;
803
809typedef struct {
810 uint64_t lower_bound;
811 uint64_t upper_bound;
812 uint64_t reserved[2];
813} amdsmi_range_t;
814
820typedef struct {
821 uint8_t xgmi_lanes;
822 uint64_t xgmi_hive_id;
823 uint64_t xgmi_node_id;
824 uint32_t index;
825 uint32_t reserved[9];
826} amdsmi_xgmi_info_t;
827
833typedef struct {
834 uint32_t vram_total;
835 uint32_t vram_used;
836 uint32_t reserved[2];
837} amdsmi_vram_usage_t;
838
845typedef struct {
846 uint64_t reference_timestamp;
847 uint64_t violation_timestamp;
849 uint64_t acc_counter;
850 uint64_t acc_prochot_thrm;
852 uint64_t acc_ppt_pwr;
854 uint64_t acc_socket_thrm;
856 uint64_t acc_vr_thrm;
858 uint64_t acc_hbm_thrm;
860 uint64_t acc_gfx_clk_below_host_limit;
867 uint64_t per_prochot_thrm;
869 uint64_t per_ppt_pwr;
871 uint64_t per_socket_thrm;
873 uint64_t per_vr_thrm;
875 uint64_t per_hbm_thrm;
877 uint64_t per_gfx_clk_below_host_limit;
884 uint8_t active_prochot_thrm;
886 uint8_t active_ppt_pwr;
888 uint8_t active_socket_thrm;
890 uint8_t active_vr_thrm;
892 uint8_t active_hbm_thrm;
894 uint8_t active_gfx_clk_below_host_limit;
898 // GPU metrics 1.8 violations
899 uint64_t acc_gfx_clk_below_host_limit_pwr[AMDSMI_MAX_NUM_XCP]
900 [AMDSMI_MAX_NUM_XCC];
905 uint64_t acc_gfx_clk_below_host_limit_thm[AMDSMI_MAX_NUM_XCP]
906 [AMDSMI_MAX_NUM_XCC];
911 uint64_t acc_low_utilization[AMDSMI_MAX_NUM_XCP]
912 [AMDSMI_MAX_NUM_XCC];
915 uint64_t acc_gfx_clk_below_host_limit_total[AMDSMI_MAX_NUM_XCP]
916 [AMDSMI_MAX_NUM_XCC];
922 uint64_t per_gfx_clk_below_host_limit_pwr
923 [AMDSMI_MAX_NUM_XCP]
924 [AMDSMI_MAX_NUM_XCC];
926 uint64_t per_gfx_clk_below_host_limit_thm
927 [AMDSMI_MAX_NUM_XCP]
928 [AMDSMI_MAX_NUM_XCC];
930 uint64_t per_low_utilization[AMDSMI_MAX_NUM_XCP]
931 [AMDSMI_MAX_NUM_XCC];
934 uint64_t per_gfx_clk_below_host_limit_total
935 [AMDSMI_MAX_NUM_XCP]
936 [AMDSMI_MAX_NUM_XCC];
939 uint8_t active_gfx_clk_below_host_limit_pwr
940 [AMDSMI_MAX_NUM_XCP]
941 [AMDSMI_MAX_NUM_XCC];
943 uint8_t active_gfx_clk_below_host_limit_thm
947 uint8_t active_low_utilization[AMDSMI_MAX_NUM_XCP]
948 [AMDSMI_MAX_NUM_XCC];
951 uint8_t active_gfx_clk_below_host_limit_total
952 [AMDSMI_MAX_NUM_XCP]
953 [AMDSMI_MAX_NUM_XCC];
959
965typedef struct {
966 amdsmi_range_t supported_freq_range;
967 amdsmi_range_t current_freq_range;
968 uint32_t reserved[8];
969} amdsmi_frequency_range_t;
970
976typedef union {
977 struct bdf_ {
978 uint64_t function_number : 3;
979 uint64_t device_number : 5;
980 uint64_t bus_number : 8;
981 uint64_t domain_number : 48;
982 } bdf;
983 struct {
984 uint64_t function_number : 3;
985 uint64_t device_number : 5;
986 uint64_t bus_number : 8;
987 uint64_t domain_number : 48;
988 };
989 uint64_t as_uint;
990} amdsmi_bdf_t;
991
997typedef struct {
998 uint32_t drm_render;
999 uint32_t drm_card;
1000 uint32_t hsa_id;
1001 uint32_t hip_id;
1003 uint32_t oam_id;
1004} amdsmi_enumeration_info_t;
1005
1011typedef enum {
1016} amdsmi_card_form_factor_t;
1017
1023typedef struct {
1024 struct pcie_static_ {
1025 uint16_t max_pcie_width;
1026 uint32_t max_pcie_speed;
1027 uint32_t pcie_interface_version;
1028 amdsmi_card_form_factor_t slot_type;
1029 uint32_t max_pcie_interface_version;
1030 uint64_t reserved[9];
1031 } pcie_static;
1032 struct pcie_metric_ {
1033 uint16_t pcie_width;
1034 uint32_t pcie_speed;
1035 uint32_t pcie_bandwidth;
1036 uint64_t pcie_replay_count;
1037 uint64_t pcie_l0_to_recovery_count;
1039 uint64_t pcie_replay_roll_over_count;
1041 uint64_t pcie_nak_sent_count;
1042 uint64_t pcie_nak_received_count;
1044 uint32_t pcie_lc_perf_other_end_recovery_count;
1045 uint64_t reserved[12];
1046 } pcie_metric;
1047 uint64_t reserved[32];
1048} amdsmi_pcie_info_t;
1049
1055typedef struct {
1056 uint64_t power_cap;
1057 uint64_t default_power_cap;
1058 uint64_t dpm_cap;
1059 uint64_t min_power_cap;
1060 uint64_t max_power_cap;
1061 uint64_t reserved[3];
1062} amdsmi_power_cap_info_t;
1063
1069typedef enum {
1072} amdsmi_power_cap_type_t;
1073
1079typedef struct {
1085 uint64_t reserved[36];
1086} amdsmi_vbios_info_t;
1087
1093typedef enum {
1094 AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,
1095 AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,
1096 AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,
1097 AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,
1098 AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010
1099} amdsmi_cache_property_type_t;
1100
1106typedef struct {
1107 uint32_t num_cache_types;
1108 struct cache_ {
1109 uint32_t cache_properties;
1110 uint32_t cache_size;
1111 uint32_t cache_level;
1112 uint32_t max_num_cu_shared;
1113 uint32_t num_cache_instance;
1114 uint32_t reserved[3];
1115 } cache[AMDSMI_MAX_CACHE_TYPES];
1116 uint32_t reserved[15];
1117} amdsmi_gpu_cache_info_t;
1118
1124typedef struct {
1125 uint8_t num_fw_info;
1126 struct fw_info_list_ {
1127 amdsmi_fw_block_t fw_id;
1128 uint64_t fw_version;
1129 uint64_t reserved[2];
1130 } fw_info_list[AMDSMI_FW_ID__MAX];
1131 uint32_t reserved[7];
1132} amdsmi_fw_info_t;
1133
1139typedef struct {
1141 uint32_t vendor_id;
1143 uint32_t subvendor_id;
1144 uint64_t device_id;
1145 uint32_t rev_id;
1148 uint32_t oam_id;
1149 uint32_t num_of_compute_units;
1150 uint64_t target_graphics_version;
1151 uint32_t subsystem_id;
1152 uint64_t flags;
1153 uint32_t reserved[18];
1154} amdsmi_asic_info_t;
1155
1161typedef struct {
1162 uint64_t kfd_id;
1163 uint32_t node_id;
1164 uint32_t current_partition_id;
1165 uint32_t reserved[12];
1166} amdsmi_kfd_info_t;
1167
1173typedef union {
1174 struct nps_flags_ {
1175 uint32_t nps1_cap : 1;
1176 uint32_t nps2_cap : 1;
1177 uint32_t nps4_cap : 1;
1178 uint32_t nps8_cap : 1;
1179 uint32_t reserved : 28;
1180 } nps_flags;
1181 uint32_t nps_cap_mask;
1182} amdsmi_nps_caps_t;
1183
1190typedef struct {
1191 amdsmi_nps_caps_t partition_caps;
1192 amdsmi_memory_partition_type_t mp_mode;
1193 uint32_t num_numa_ranges;
1194 struct numa_range_ {
1195 amdsmi_vram_type_t memory_type;
1196 uint64_t start;
1197 uint64_t end;
1198 } numa_range[AMDSMI_MAX_NUM_NUMA_NODES];
1199 uint64_t reserved[11];
1201
1207typedef struct {
1208 amdsmi_accelerator_partition_type_t profile_type;
1209 uint32_t num_partitions;
1210 amdsmi_nps_caps_t memory_caps;
1211 uint32_t profile_index;
1213 uint32_t num_resources;
1215 uint64_t reserved[13];
1217
1224typedef struct {
1225 uint32_t profile_index;
1226 amdsmi_accelerator_partition_resource_type_t resource_type;
1227 uint32_t partition_resource;
1228 uint32_t num_partitions_share_resource;
1229 uint64_t reserved[6];
1231
1237typedef struct {
1238 uint32_t num_profiles;
1239 uint32_t num_resource_profiles;
1241 resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];
1242 uint32_t default_profile_index;
1244 uint64_t reserved[30];
1246
1252typedef enum {
1253 AMDSMI_LINK_TYPE_INTERNAL = 0,
1254 AMDSMI_LINK_TYPE_PCIE = 1,
1255 AMDSMI_LINK_TYPE_XGMI = 2,
1256 AMDSMI_LINK_TYPE_NOT_APPLICABLE = 3,
1257 AMDSMI_LINK_TYPE_UNKNOWN = 4,
1258 AMDSMI_LINK_TYPE_NUMA = 5,
1260 AMDSMI_LINK_TYPE_XNUMA =
1261 6
1262} amdsmi_link_type_t;
1263
1269typedef struct {
1270 uint32_t cpu_util_total;
1271 uint32_t cpu_util_user;
1272 uint32_t cpu_util_nice;
1273 uint32_t cpu_util_sys;
1274 uint32_t cpu_util_irq;
1275} amdsmi_cpu_util_t;
1276
1282typedef enum {
1283 AMDSMI_LINK_STATUS_ENABLED = 0,
1284 AMDSMI_LINK_STATUS_DISABLED = 1,
1285 AMDSMI_LINK_STATUS_INACTIVE = 2,
1286 AMDSMI_LINK_STATUS_ERROR = 3
1287} amdsmi_link_status_t;
1288
1294typedef struct {
1295 uint32_t num_links;
1296 struct _links {
1297 amdsmi_bdf_t bdf;
1298 uint32_t bit_rate;
1299 uint32_t max_bandwidth;
1300 amdsmi_link_type_t link_type;
1301 uint64_t read;
1302 uint64_t write;
1303 amdsmi_link_status_t link_status;
1304 uint64_t reserved[1];
1305 } links[AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK];
1306 uint64_t reserved[7];
1307} amdsmi_link_metrics_t;
1308
1314typedef struct {
1315 amdsmi_vram_type_t vram_type;
1317 uint64_t vram_size;
1318 uint32_t vram_bit_width;
1319 uint64_t vram_max_bandwidth;
1320 uint64_t reserved[37];
1321} amdsmi_vram_info_t;
1322
1328typedef struct {
1332} amdsmi_driver_info_t;
1333
1339typedef struct {
1345 uint64_t reserved[64];
1346} amdsmi_board_info_t;
1347
1355typedef struct {
1356 uint64_t socket_power;
1357 uint32_t current_socket_power;
1359 uint32_t average_socket_power;
1361 uint64_t gfx_voltage;
1362 uint64_t soc_voltage;
1363 uint64_t mem_voltage;
1364 uint32_t power_limit;
1365 uint32_t ubb_power;
1366 uint64_t reserved[18];
1367} amdsmi_power_info_t;
1368
1374typedef struct {
1375 uint32_t clk;
1376 uint32_t min_clk;
1377 uint32_t max_clk;
1378 uint8_t clk_locked;
1379 uint8_t clk_deep_sleep;
1380 uint32_t reserved[4];
1381} amdsmi_clk_info_t;
1382
1392typedef struct {
1393 uint32_t gfx_activity;
1394 uint32_t umc_activity;
1395 uint32_t mm_activity;
1396 uint32_t reserved[13];
1397} amdsmi_engine_usage_t;
1398
1405
1411typedef struct {
1413 amdsmi_process_handle_t pid;
1414 uint64_t mem;
1415 struct engine_usage_ {
1416 uint64_t gfx;
1417 uint64_t enc;
1418 uint32_t reserved[12];
1419 } engine_usage;
1420 struct memory_usage_ {
1421 uint64_t gtt_mem;
1422 uint64_t cpu_mem;
1423 uint64_t vram_mem;
1424 uint32_t reserved[10];
1425 } memory_usage;
1427 uint32_t cu_occupancy;
1428 uint32_t evicted_time;
1429 uint64_t sdma_usage;
1430 uint32_t reserved[8];
1431} amdsmi_proc_info_t;
1432
1438typedef struct {
1439 uint32_t gpu_index;
1440 uint64_t mem;
1441 struct {
1442 uint64_t gfx;
1443 uint64_t enc;
1444 uint32_t reserved[12];
1445 } engine_usage;
1446 struct {
1447 uint64_t gtt_mem;
1448 uint64_t cpu_mem;
1449 uint64_t vram_mem;
1450 uint32_t reserved[10];
1451 } memory_usage;
1452 uint32_t cu_occupancy;
1453 uint32_t evicted_time;
1454 uint64_t sdma_usage;
1455 uint32_t reserved[8];
1456} amdsmi_proc_gpu_entry_t;
1457
1463typedef struct {
1464 amdsmi_process_handle_t pid;
1467 uint32_t num_gpus;
1469} amdsmi_proc_info_by_pid_t;
1470
1476typedef struct {
1477 uint8_t is_iolink_coherent;
1478 uint8_t is_iolink_atomics_32bit;
1479 uint8_t is_iolink_atomics_64bit;
1480 uint8_t is_iolink_dma;
1481 uint8_t is_iolink_bi_directional;
1482} amdsmi_p2p_capability_t;
1483
1486#define AMDSMI_MAX_NUM_FREQUENCIES 33
1487
1492#define AMDSMI_MAX_FAN_SPEED 255
1493
1496#define AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3
1497
1503typedef enum {
1504 AMDSMI_DEV_PERF_LEVEL_AUTO = 0,
1505 AMDSMI_DEV_PERF_LEVEL_FIRST = AMDSMI_DEV_PERF_LEVEL_AUTO,
1515 AMDSMI_DEV_PERF_LEVEL_LAST = AMDSMI_DEV_PERF_LEVEL_DETERMINISM,
1516 AMDSMI_DEV_PERF_LEVEL_UNKNOWN = 0x100
1517} amdsmi_dev_perf_level_t;
1518
1525
1533typedef enum {
1534 AMDSMI_EVNT_GRP_XGMI = 0,
1535 AMDSMI_EVNT_GRP_XGMI_DATA_OUT = 10,
1536 AMDSMI_EVNT_GRP_INVALID = 0xFFFFFFFF
1537} amdsmi_event_group_t;
1538
1569typedef enum {
1570 AMDSMI_EVNT_FIRST = AMDSMI_EVNT_GRP_XGMI,
1571
1572 AMDSMI_EVNT_XGMI_FIRST = AMDSMI_EVNT_GRP_XGMI,
1573 AMDSMI_EVNT_XGMI_0_NOP_TX = AMDSMI_EVNT_XGMI_FIRST,
1581 AMDSMI_EVNT_XGMI_LAST = AMDSMI_EVNT_XGMI_1_BEATS_TX,
1582 AMDSMI_EVNT_XGMI_DATA_OUT_FIRST = AMDSMI_EVNT_GRP_XGMI_DATA_OUT,
1583 AMDSMI_EVNT_XGMI_DATA_OUT_0 = AMDSMI_EVNT_XGMI_DATA_OUT_FIRST,
1589 AMDSMI_EVNT_XGMI_DATA_OUT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_5,
1590 AMDSMI_EVNT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_LAST
1591} amdsmi_event_type_t;
1592
1598typedef enum {
1599 AMDSMI_CNTR_CMD_START = 0,
1600 AMDSMI_CNTR_CMD_STOP
1602} amdsmi_counter_command_t;
1603
1609typedef struct {
1610 uint64_t value;
1611 uint64_t time_enabled;
1612 uint64_t time_running;
1613} amdsmi_counter_value_t;
1614
1620typedef enum {
1621 AMDSMI_EVT_NOTIF_NONE = 0,
1622 AMDSMI_EVT_NOTIF_VMFAULT = 1,
1623 AMDSMI_EVT_NOTIF_FIRST = AMDSMI_EVT_NOTIF_VMFAULT,
1624 AMDSMI_EVT_NOTIF_THERMAL_THROTTLE = 2,
1625 AMDSMI_EVT_NOTIF_GPU_PRE_RESET = 3,
1626 AMDSMI_EVT_NOTIF_GPU_POST_RESET = 4,
1627 AMDSMI_EVT_NOTIF_MIGRATE_START = 5,
1628 AMDSMI_EVT_NOTIF_MIGRATE_END = 6,
1629 AMDSMI_EVT_NOTIF_PAGE_FAULT_START = 7,
1630 AMDSMI_EVT_NOTIF_PAGE_FAULT_END = 8,
1631 AMDSMI_EVT_NOTIF_QUEUE_EVICTION = 9,
1632 AMDSMI_EVT_NOTIF_QUEUE_RESTORE = 10,
1633 AMDSMI_EVT_NOTIF_UNMAP_FROM_GPU = 11,
1634 AMDSMI_EVT_NOTIF_PROCESS_START = 12,
1635 AMDSMI_EVT_NOTIF_PROCESS_END = 13,
1636 AMDSMI_EVT_NOTIF_LAST = AMDSMI_EVT_NOTIF_PROCESS_END
1638
1644#define AMDSMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))
1645
1651typedef struct {
1652 amdsmi_processor_handle processor_handle;
1653 amdsmi_evt_notification_type_t event;
1656
1663typedef enum {
1664 AMDSMI_TEMP_CURRENT = 0x0,
1665 AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,
1666 AMDSMI_TEMP_MAX,
1667 AMDSMI_TEMP_MIN,
1668 AMDSMI_TEMP_MAX_HYST,
1670 AMDSMI_TEMP_MIN_HYST,
1672 AMDSMI_TEMP_CRITICAL,
1676 AMDSMI_TEMP_EMERGENCY,
1682 AMDSMI_TEMP_CRIT_MIN,
1686 AMDSMI_TEMP_OFFSET,
1688 AMDSMI_TEMP_LOWEST,
1689 AMDSMI_TEMP_HIGHEST,
1690 AMDSMI_TEMP_SHUTDOWN,
1691 AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN
1692} amdsmi_temperature_metric_t;
1693
1700typedef enum {
1701 AMDSMI_VOLT_CURRENT = 0x0,
1702
1703 AMDSMI_VOLT_FIRST = AMDSMI_VOLT_CURRENT,
1704 AMDSMI_VOLT_MAX,
1705 AMDSMI_VOLT_MIN_CRIT,
1706 AMDSMI_VOLT_MIN,
1707 AMDSMI_VOLT_MAX_CRIT,
1708 AMDSMI_VOLT_AVERAGE,
1709 AMDSMI_VOLT_LOWEST,
1710 AMDSMI_VOLT_HIGHEST,
1711
1712 AMDSMI_VOLT_LAST = AMDSMI_VOLT_HIGHEST
1713} amdsmi_voltage_metric_t;
1714
1721typedef enum {
1722 AMDSMI_VOLT_TYPE_FIRST = 0,
1723
1724 AMDSMI_VOLT_TYPE_VDDGFX = AMDSMI_VOLT_TYPE_FIRST,
1726 AMDSMI_VOLT_TYPE_LAST = AMDSMI_VOLT_TYPE_VDDBOARD,
1727 AMDSMI_VOLT_TYPE_INVALID = 0xFFFFFFFF
1728} amdsmi_voltage_type_t;
1729
1738typedef enum {
1739 AMDSMI_PWR_PROF_PRST_CUSTOM_MASK = 0x1,
1740 AMDSMI_PWR_PROF_PRST_VIDEO_MASK = 0x2,
1741 AMDSMI_PWR_PROF_PRST_POWER_SAVING_MASK = 0x4,
1742 AMDSMI_PWR_PROF_PRST_COMPUTE_MASK = 0x8,
1743 AMDSMI_PWR_PROF_PRST_VR_MASK = 0x10,
1744
1745 // 3D Full Screen Power Profile
1746 AMDSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK = 0x20,
1747 AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT = 0x40,
1748 AMDSMI_PWR_PROF_PRST_LAST = AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT,
1749
1750 // Invalid power profile
1751 AMDSMI_PWR_PROF_PRST_INVALID = 0xFFFFFFFFFFFFFFFF
1753
1759typedef enum {
1760 AMDSMI_GPU_BLOCK_INVALID = 0,
1761 AMDSMI_GPU_BLOCK_FIRST = (1ULL << 0),
1762 AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
1763 AMDSMI_GPU_BLOCK_SDMA = (1ULL << 1),
1764 AMDSMI_GPU_BLOCK_GFX = (1ULL << 2),
1765 AMDSMI_GPU_BLOCK_MMHUB = (1ULL << 3),
1766 AMDSMI_GPU_BLOCK_ATHUB = (1ULL << 4),
1767 AMDSMI_GPU_BLOCK_PCIE_BIF = (1ULL << 5),
1768 AMDSMI_GPU_BLOCK_HDP = (1ULL << 6),
1769 AMDSMI_GPU_BLOCK_XGMI_WAFL = (1ULL << 7),
1770 AMDSMI_GPU_BLOCK_DF = (1ULL << 8),
1771 AMDSMI_GPU_BLOCK_SMN = (1ULL << 9),
1772 AMDSMI_GPU_BLOCK_SEM = (1ULL << 10),
1773 AMDSMI_GPU_BLOCK_MP0 = (1ULL << 11),
1774 AMDSMI_GPU_BLOCK_MP1 = (1ULL << 12),
1775 AMDSMI_GPU_BLOCK_FUSE = (1ULL << 13),
1776 AMDSMI_GPU_BLOCK_MCA = (1ULL << 14),
1777 AMDSMI_GPU_BLOCK_VCN = (1ULL << 15),
1778 AMDSMI_GPU_BLOCK_JPEG = (1ULL << 16),
1779 AMDSMI_GPU_BLOCK_IH = (1ULL << 17),
1780 AMDSMI_GPU_BLOCK_MPIO = (1ULL << 18),
1781 AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,
1782 AMDSMI_GPU_BLOCK_RESERVED = (1ULL << 63)
1783} amdsmi_gpu_block_t;
1784
1790typedef enum {
1791 CLK_LIMIT_MIN,
1792 CLK_LIMIT_MAX
1793} amdsmi_clk_limit_type_t;
1794
1800typedef enum {
1801 AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,
1802 AMDSMI_CPER_SEV_FATAL = 1,
1803 AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,
1804 AMDSMI_CPER_SEV_NUM = 3,
1805 AMDSMI_CPER_SEV_UNUSED = 10
1806} amdsmi_cper_sev_t;
1807
1813typedef enum {
1814 AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,
1815 AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,
1816 AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,
1817 AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,
1818 AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,
1819 AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,
1820 AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,
1821 AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,
1822 AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,
1823 AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,
1824 AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,
1825 AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT = 0x49A341DF69293BC9
1827} amdsmi_cper_notify_type_t;
1828
1834typedef struct {
1835 uint16_t dram_non_critical_region_threshold;
1836 uint16_t dram_critical_region_threshold;
1837} amdsmi_gpu_ras_policy_v4_0_t;
1838
1845typedef struct {
1846 uint8_t major_version;
1847 uint8_t minor_version;
1848 union policy_data_ {
1849 amdsmi_gpu_ras_policy_v4_0_t v4_0;
1850 uint64_t info[5];
1851 } policy_data;
1852} amdsmi_gpu_ras_policy_info_t;
1853
1859typedef enum {
1860 AMDSMI_RAS_ERR_STATE_NONE = 0,
1868
1869 AMDSMI_RAS_ERR_STATE_LAST = AMDSMI_RAS_ERR_STATE_ENABLED,
1870 AMDSMI_RAS_ERR_STATE_INVALID = 0xFFFFFFFF
1871} amdsmi_ras_err_state_t;
1872
1880typedef enum {
1881 AMDSMI_MEM_TYPE_FIRST = 0,
1882
1883 AMDSMI_MEM_TYPE_VRAM = AMDSMI_MEM_TYPE_FIRST,
1884 AMDSMI_MEM_TYPE_VIS_VRAM,
1885 AMDSMI_MEM_TYPE_GTT,
1886
1887 AMDSMI_MEM_TYPE_LAST = AMDSMI_MEM_TYPE_GTT
1888} amdsmi_memory_type_t;
1889
1895typedef enum {
1896 AMDSMI_FREQ_IND_MIN = 0,
1897 AMDSMI_FREQ_IND_MAX = 1,
1898 AMDSMI_FREQ_IND_INVALID = 0xFFFFFFFF
1899} amdsmi_freq_ind_t;
1900
1906typedef enum {
1907 AMDSMI_XGMI_STATUS_NO_ERRORS = 0,
1908 AMDSMI_XGMI_STATUS_ERROR,
1910} amdsmi_xgmi_status_t;
1911
1918
1924typedef enum {
1925 AMDSMI_MEM_PAGE_STATUS_RESERVED = 0,
1930} amdsmi_memory_page_status_t;
1931
1937typedef enum {
1938 AMDSMI_UTILIZATION_COUNTER_FIRST = 0,
1943 // Fine grain activity counters
1944 AMDSMI_FINE_GRAIN_GFX_ACTIVITY = 100,
1945 AMDSMI_FINE_GRAIN_MEM_ACTIVITY = 101,
1946 AMDSMI_FINE_DECODER_ACTIVITY = 102,
1947 AMDSMI_UTILIZATION_COUNTER_LAST = AMDSMI_FINE_DECODER_ACTIVITY
1949
1950#define AMDSMI_MAX_UTILIZATION_VALUES 4
1951
1959typedef struct {
1960 amdsmi_utilization_counter_type_t type;
1961 uint64_t value;
1962 uint64_t fine_value[AMDSMI_MAX_UTILIZATION_VALUES];
1963 uint16_t fine_value_count;
1964} amdsmi_utilization_counter_t;
1965
1971typedef struct {
1972 uint64_t page_address;
1973 uint64_t page_size;
1974 amdsmi_memory_page_status_t status;
1975} amdsmi_retired_page_record_t;
1976
1984typedef struct {
1985 amdsmi_bit_field_t available_profiles;
1986 amdsmi_power_profile_preset_masks_t current;
1987 uint32_t num_profiles;
1989
1995typedef struct {
1996 bool has_deep_sleep;
1997 uint32_t num_supported;
1998 uint32_t current;
2003 uint64_t frequency[AMDSMI_MAX_NUM_FREQUENCIES];
2005} amdsmi_frequencies_t;
2006
2012typedef struct {
2013 uint32_t policy_id;
2015} amdsmi_dpm_policy_entry_t;
2016
2017#define AMDSMI_MAX_NUM_PM_POLICIES 32
2018
2026typedef struct {
2027 uint32_t num_supported;
2028 uint32_t current;
2030} amdsmi_dpm_policy_t;
2031
2041typedef struct {
2042 amdsmi_frequencies_t transfer_rate;
2043 uint32_t lanes[AMDSMI_MAX_NUM_FREQUENCIES];
2044} amdsmi_pcie_bandwidth_t;
2045
2051typedef struct {
2052 uint32_t major;
2053 uint32_t minor;
2054 uint32_t release;
2055 const char* build;
2056} amdsmi_version_t;
2057
2063typedef struct {
2064 uint64_t frequency;
2065 uint64_t voltage;
2066} amdsmi_od_vddc_point_t;
2067
2075typedef struct {
2076 amdsmi_range_t freq_range;
2077 amdsmi_range_t volt_range;
2078} amdsmi_freq_volt_region_t;
2079
2086typedef struct {
2089} amdsmi_od_volt_curve_t;
2090
2096typedef struct {
2097 amdsmi_range_t curr_sclk_range;
2098 amdsmi_range_t curr_mclk_range;
2099 amdsmi_range_t curr_fclk_range;
2100 amdsmi_range_t sclk_freq_limits;
2101 amdsmi_range_t mclk_freq_limits;
2102 amdsmi_range_t fclk_freq_limits;
2103 amdsmi_od_volt_curve_t curve;
2104 uint32_t num_regions;
2105} amdsmi_od_volt_freq_data_t;
2106
2114typedef struct {
2115 // TODO(amd) Doxygen documents
2116 // Note: This should match: AMDGpuMetricsHeader_v1_t
2118 uint16_t structure_size;
2119 uint8_t format_revision;
2120 uint8_t content_revision;
2122} amd_metrics_table_header_t;
2123
2129typedef struct {
2134 uint32_t gfx_busy_inst[AMDSMI_MAX_NUM_XCC];
2135 uint16_t jpeg_busy[AMDSMI_MAX_NUM_JPEG_ENG_V1];
2137 uint16_t vcn_busy[AMDSMI_MAX_NUM_VCN];
2138 uint64_t gfx_busy_acc[AMDSMI_MAX_NUM_XCC];
2139
2143 /* Total App Clock Counter Accumulated */
2144 uint64_t gfx_below_host_limit_acc[AMDSMI_MAX_NUM_XCC];
2145
2149 /* Total App Clock Counter Accumulated */
2150 uint64_t gfx_below_host_limit_ppt_acc[AMDSMI_MAX_NUM_XCC];
2151 uint64_t gfx_below_host_limit_thm_acc[AMDSMI_MAX_NUM_XCC];
2152 uint64_t gfx_low_utilization_acc[AMDSMI_MAX_NUM_XCC];
2153 uint64_t gfx_below_host_limit_total_acc[AMDSMI_MAX_NUM_XCC];
2154
2158 uint16_t temperature_xcd[AMDSMI_MAX_NUM_XCC];
2159} amdsmi_gpu_xcp_metrics_t;
2160
2187typedef struct {
2191 uint16_t temperature_gfx;
2192 uint16_t temperature_soc;
2193 uint16_t temperature_core[AMDSMI_APU_MAX_CORES];
2194 uint16_t temperature_l3[AMDSMI_APU_MAX_L3];
2195 uint16_t temperature_skin;
2196
2200 uint16_t average_gfx_activity;
2201 uint16_t average_mm_activity;
2202 uint16_t average_vcn_activity;
2203 uint16_t average_ipu_activity[AMDSMI_APU_MAX_IPU];
2204 uint16_t average_core_c0_activity[AMDSMI_APU_MAX_CORES];
2205 uint16_t average_dram_reads;
2206 uint16_t average_dram_writes;
2207 uint16_t average_ipu_reads;
2208 uint16_t average_ipu_writes;
2209
2217 uint32_t average_socket_power;
2218 uint16_t average_cpu_power;
2219 uint16_t average_soc_power;
2220 uint32_t average_gfx_power;
2221 uint16_t average_core_power[AMDSMI_APU_MAX_CORES];
2222 uint16_t average_ipu_power;
2223 uint32_t average_apu_power;
2224 uint32_t average_dgpu_power;
2225 uint32_t average_all_core_power;
2226 uint16_t average_sys_power;
2227 uint16_t stapm_power_limit;
2228 uint16_t current_stapm_power_limit;
2229
2233 uint16_t average_gfxclk_frequency;
2234 uint16_t average_socclk_frequency;
2235 uint16_t average_uclk_frequency;
2236 uint16_t average_fclk_frequency;
2237 uint16_t average_vclk_frequency;
2238 uint16_t average_dclk_frequency;
2239 uint16_t average_vpeclk_frequency;
2240 uint16_t average_ipuclk_frequency;
2241 uint16_t average_mpipu_frequency;
2242
2246 uint16_t current_gfxclk;
2247 uint16_t current_socclk;
2248 uint16_t current_uclk;
2249 uint16_t current_fclk;
2250 uint16_t current_vclk;
2251 uint16_t current_dclk;
2252 uint16_t current_coreclk[AMDSMI_APU_MAX_CORES];
2253 uint16_t current_l3clk[AMDSMI_APU_MAX_L3];
2254 uint16_t current_core_maxfreq;
2255 uint16_t current_gfx_maxfreq;
2256
2260 uint32_t throttle_status;
2261 uint64_t indep_throttle_status;
2262 uint32_t throttle_residency_prochot;
2263 uint32_t throttle_residency_spl;
2264 uint32_t throttle_residency_fppt;
2265 uint32_t throttle_residency_sppt;
2266 uint32_t throttle_residency_thm_core;
2267 uint32_t throttle_residency_thm_gfx;
2268 uint32_t throttle_residency_thm_soc;
2269
2273 uint16_t fan_pwm;
2274
2278 uint16_t average_temperature_gfx;
2279 uint16_t average_temperature_soc;
2280 uint16_t average_temperature_core[AMDSMI_APU_MAX_CORES];
2281 uint16_t average_temperature_l3[AMDSMI_APU_MAX_L3];
2282
2286 uint16_t average_cpu_voltage;
2287 uint16_t average_soc_voltage;
2288 uint16_t average_gfx_voltage;
2289 uint16_t average_cpu_current;
2290 uint16_t average_soc_current;
2291 uint16_t average_gfx_current;
2292
2296 uint32_t time_filter_alphavalue;
2297
2298} amdsmi_apu_metrics_t;
2299
2316typedef struct {
2317 amd_metrics_table_header_t common_header;
2318
2324 uint16_t temperature_edge;
2325 uint16_t temperature_hotspot;
2326 uint16_t temperature_mem;
2327 uint16_t temperature_vrgfx;
2328 uint16_t temperature_vrsoc;
2329 uint16_t temperature_vrmem;
2330
2334 uint16_t average_gfx_activity;
2335 uint16_t average_umc_activity;
2336 uint16_t average_mm_activity;
2337
2341 uint16_t average_socket_power;
2342 uint64_t energy_accumulator;
2343
2345 uint64_t system_clock_counter;
2346
2350 uint16_t average_gfxclk_frequency;
2351 uint16_t average_socclk_frequency;
2352 uint16_t average_uclk_frequency;
2353 uint16_t average_vclk0_frequency;
2354 uint16_t average_dclk0_frequency;
2355 uint16_t average_vclk1_frequency;
2356 uint16_t average_dclk1_frequency;
2357
2361 uint16_t current_gfxclk;
2362 uint16_t current_socclk;
2363 uint16_t current_uclk;
2364 uint16_t current_vclk0;
2365 uint16_t current_dclk0;
2366 uint16_t current_vclk1;
2367 uint16_t current_dclk1;
2368
2369 uint32_t throttle_status;
2370
2371 uint16_t current_fan_speed;
2372
2376 uint16_t pcie_link_width;
2377 uint16_t pcie_link_speed;
2378
2379 /*
2380 * v1.1 additions
2381 */
2382 uint32_t gfx_activity_acc;
2383 uint32_t mem_activity_acc;
2384 uint16_t temperature_hbm[AMDSMI_NUM_HBM_INSTANCES];
2385
2386 /*
2387 * v1.2 additions
2388 */
2389 uint64_t firmware_timestamp;
2390
2391 /*
2392 * v1.3 additions
2393 */
2394 uint16_t voltage_soc;
2395 uint16_t voltage_gfx;
2396 uint16_t voltage_mem;
2397
2398 uint64_t indep_throttle_status;
2399
2400 /*
2401 * v1.4 additions
2402 */
2403 uint16_t current_socket_power;
2404
2405 uint16_t vcn_activity[AMDSMI_MAX_NUM_VCN];
2406
2407 uint32_t gfxclk_lock_status;
2408
2409 uint16_t xgmi_link_width;
2410 uint16_t xgmi_link_speed;
2411
2412 uint64_t pcie_bandwidth_acc;
2413 uint64_t pcie_bandwidth_inst;
2414 uint64_t pcie_l0_to_recov_count_acc;
2415 uint64_t pcie_replay_count_acc;
2416 uint64_t pcie_replay_rover_count_acc;
2417
2421 uint64_t xgmi_read_data_acc[AMDSMI_MAX_NUM_XGMI_LINKS];
2422 uint64_t xgmi_write_data_acc[AMDSMI_MAX_NUM_XGMI_LINKS];
2423
2427 uint16_t current_gfxclks[AMDSMI_MAX_NUM_GFX_CLKS];
2428 uint16_t current_socclks[AMDSMI_MAX_NUM_CLKS];
2429 uint16_t current_vclk0s[AMDSMI_MAX_NUM_CLKS];
2430 uint16_t current_dclk0s[AMDSMI_MAX_NUM_CLKS];
2431
2435 uint16_t jpeg_activity[AMDSMI_MAX_NUM_JPEG];
2436 uint32_t pcie_nak_sent_count_acc;
2437 uint32_t pcie_nak_rcvd_count_acc;
2438
2442 uint64_t accumulation_counter;
2443
2447 uint64_t prochot_residency_acc;
2448
2464 uint64_t ppt_residency_acc;
2465
2481 uint64_t socket_thm_residency_acc;
2482 uint64_t vr_thm_residency_acc;
2483 uint64_t hbm_thm_residency_acc;
2484
2485 uint16_t num_partition;
2486
2490 uint32_t pcie_lc_perf_other_end_recovery;
2491
2495 uint64_t vram_max_bandwidth;
2496
2497 uint16_t xgmi_link_status[AMDSMI_MAX_NUM_XGMI_LINKS];
2498
2502 uint16_t
2503 temperature_hbm_stacks[AMDSMI_MAX_NUM_HBM_STACKS];
2504 uint16_t temperature_mid[AMDSMI_MAX_NUM_MID];
2505 uint16_t temperature_aid[AMDSMI_MAX_NUM_AID];
2506
2507 uint16_t current_uclk_aid[AMDSMI_MAX_NUM_CLKS_PER_AID];
2508 uint16_t current_socclks_mid[AMDSMI_MAX_NUM_CLKS_PER_MID];
2509
2540 amdsmi_apu_metrics_t* apu_metrics;
2541
2542} amdsmi_gpu_metrics_t;
2543
2549typedef enum {
2550 AMDSMI_XGMI_LINK_DOWN,
2551 AMDSMI_XGMI_LINK_UP,
2554
2560typedef struct {
2561 uint32_t total_links;
2563 uint64_t reserved[7];
2564} amdsmi_xgmi_link_status_t;
2565
2571typedef struct {
2573 uint64_t value;
2574} amdsmi_name_value_t;
2575
2581typedef enum {
2582 AMDSMI_REG_XGMI,
2583 AMDSMI_REG_WAFL,
2584 AMDSMI_REG_PCIE,
2585 AMDSMI_REG_USR,
2586 AMDSMI_REG_USR1
2587} amdsmi_reg_type_t;
2588
2594typedef struct {
2595 uint32_t ras_eeprom_version;
2597 uint32_t ecc_correction_schema_flag;
2600 struct ras_info_ {
2601 uint32_t dram_ecc : 1;
2602 uint32_t sram_ecc : 1;
2603 uint32_t poisoning : 1;
2604 uint32_t rsvd : 29;
2605 } ras_info;
2606 bool needs_reboot;
2607} amdsmi_ras_feature_t;
2608
2614typedef struct {
2615 uint64_t correctable_count;
2616 uint64_t uncorrectable_count;
2617 uint64_t deferred_count;
2618 uint64_t reserved[5];
2619} amdsmi_error_count_t;
2620
2627typedef struct {
2628 uint32_t process_id;
2629 uint64_t vram_usage;
2630 uint64_t sdma_usage;
2631 uint32_t cu_occupancy;
2632 uint32_t evicted_time;
2633} amdsmi_process_info_t;
2634
2640typedef struct {
2641 uint32_t count;
2643 uint64_t reserved[15];
2644} amdsmi_topology_nearest_t;
2645
2654typedef enum {
2655 AMDSMI_VIRTUALIZATION_MODE_UNKNOWN = 0,
2660} amdsmi_virtualization_mode_t;
2661
2667typedef enum {
2670} amdsmi_affinity_scope_t;
2671
2677typedef enum {
2680} amdsmi_npm_status_t;
2681
2687typedef struct {
2688 amdsmi_npm_status_t status;
2689 uint64_t limit;
2690 uint32_t ubb_power_threshold;
2691 uint64_t reserved[5];
2692} amdsmi_npm_info_t;
2693
2702typedef enum {
2703 AMDSMI_PTL_DATA_FORMAT_I8 = 0x0,
2704 AMDSMI_PTL_DATA_FORMAT_F16 = 0x1,
2705 AMDSMI_PTL_DATA_FORMAT_BF16 = 0x2,
2706 AMDSMI_PTL_DATA_FORMAT_F32 = 0x3,
2707 AMDSMI_PTL_DATA_FORMAT_F64 = 0x4,
2708 AMDSMI_PTL_DATA_FORMAT_F8 = 0x5,
2709 AMDSMI_PTL_DATA_FORMAT_VECTOR = 0x6,
2710 AMDSMI_PTL_DATA_FORMAT_INVALID = 0xFFFFFFFF
2711} amdsmi_ptl_data_format_t;
2712
2713#ifdef ENABLE_ESMI_LIB
2714
2720typedef struct {
2721 uint8_t debug;
2722 uint8_t minor;
2723 uint8_t major;
2724 uint8_t unused;
2725} amdsmi_smu_fw_version_t;
2726
2732typedef struct {
2733 uint32_t max_bw;
2734 uint32_t utilized_bw;
2735 uint32_t utilized_pct;
2736} amdsmi_ddr_bw_metrics_t;
2737
2743typedef struct {
2744 uint8_t range : 3;
2745 uint8_t ref_rate : 1;
2747
2753typedef struct {
2754 uint16_t power : 15;
2755 uint16_t update_rate : 9;
2756 uint8_t dimm_addr;
2757} amdsmi_dimm_power_t;
2758
2764typedef struct {
2765 uint16_t sensor : 11;
2766 uint16_t update_rate : 9;
2767 uint8_t dimm_addr;
2768 float temp;
2769} amdsmi_dimm_thermal_t;
2770
2776typedef enum {
2777 AGG_BW0 = 1,
2778 RD_BW0 = 2,
2779 WR_BW0 = 4
2780} amdsmi_io_bw_encoding_t;
2781
2791typedef struct {
2792 amdsmi_io_bw_encoding_t bw_type;
2793 char* link_name;
2794} amdsmi_link_id_bw_type_t;
2795
2802typedef struct {
2803 uint8_t max_dpm_level;
2804 uint8_t min_dpm_level;
2805} amdsmi_dpm_level_t;
2806
2812typedef struct __attribute__((__packed__)) {
2813 uint32_t accumulation_counter;
2816 uint32_t max_socket_temperature;
2818 uint32_t max_vr_temperature;
2820 uint32_t max_hbm_temperature;
2821 uint64_t max_socket_temperature_acc;
2822 uint64_t max_vr_temperature_acc;
2823 uint64_t max_hbm_temperature_acc;
2824
2825 uint32_t socket_power_limit;
2827 uint32_t max_socket_power_limit;
2829 uint32_t socket_power;
2830
2831 uint64_t timestamp;
2832 uint64_t socket_energy_acc;
2833 uint64_t ccd_energy_acc;
2834 uint64_t xcd_energy_acc;
2835 uint64_t aid_energy_acc;
2836 uint64_t hbm_energy_acc;
2837
2838 uint32_t cclk_frequency_limit;
2840 uint32_t gfxclk_frequency_limit;
2842 uint32_t fclk_frequency;
2843 uint32_t uclk_frequency;
2844 uint32_t socclk_frequency[4];
2845 uint32_t vclk_frequency[4];
2846 uint32_t dclk_frequency[4];
2847 uint32_t lclk_frequency[4];
2848 uint64_t gfxclk_frequency_acc[8];
2849 uint64_t cclk_frequency_acc[96];
2850
2851 uint32_t max_cclk_frequency;
2852 uint32_t min_cclk_frequency;
2853 uint32_t max_gfxclk_frequency;
2854 uint32_t min_gfxclk_frequency;
2855 uint32_t fclk_frequency_table[4];
2857 uint32_t uclk_frequency_table[4];
2859 uint32_t socclk_frequency_table[4];
2861 uint32_t vclk_frequency_table[4];
2863 uint32_t dclk_frequency_table[4];
2865 uint32_t lclk_frequency_table[4];
2867 uint32_t max_lclk_dpm_range;
2868 uint32_t min_lclk_dpm_range;
2869
2870 uint32_t xgmi_width;
2871 uint32_t xgmi_bitrate;
2872 uint64_t xgmi_read_bandwidth_acc[8];
2874 uint64_t xgmi_write_bandwidth_acc[8];
2877 uint32_t socket_c0_residency;
2878 uint32_t socket_gfx_busy;
2879 uint32_t dram_bandwidth_utilization;
2880 uint64_t socket_c0_residency_acc;
2881 uint64_t socket_gfx_busy_acc;
2882 uint64_t dram_bandwidth_acc;
2883 uint32_t max_dram_bandwidth;
2885 uint64_t dram_bandwidth_utilization_acc;
2886 uint64_t pcie_bandwidth_acc[4];
2887
2888 uint32_t prochot_residency_acc;
2889 uint32_t ppt_residency_acc;
2890 uint32_t socket_thm_residency_acc;
2892 uint32_t vr_thm_residency_acc;
2894 uint32_t hbm_thm_residency_acc;
2896 uint32_t spare;
2897
2898 uint32_t gfxclk_frequency[8];
2899} amdsmi_hsmp_metrics_table_t;
2900
2906static char* const amdsmi_hsmp_freqlimit_src_names[] = {
2907 "cHTC-Active", "PROCHOT", "TDC limit", "PPT Limit",
2908 "OPN Max", "Reliability Limit", "APML Agent", "HSMP Agent"};
2909
2915typedef struct {
2917 uint32_t cpu_family_id;
2918 uint32_t model_id;
2919 uint32_t threads_per_core;
2920 uint32_t cores_per_socket;
2921 bool frequency_boost;
2922 uint32_t vendor_id;
2924 uint32_t subvendor_id;
2925 uint64_t device_id;
2926 uint32_t rev_id;
2928 uint32_t socket_id;
2929 uint32_t core_id;
2930 uint32_t num_of_cpu_cores;
2931 uint32_t socket_count;
2932 uint32_t core_count;
2933 uint32_t reserved[17];
2934} amdsmi_cpu_info_t;
2935
2936#endif
2937
2943typedef struct {
2944 uint32_t socket_id;
2945 uint32_t cores_per_socket;
2946} amdsmi_sock_info_t;
2947
2953#define AMDSMI_MAX_NIC_PORTS 32
2954#define AMDSMI_MAX_NIC_RDMA_DEV 32
2955#define AMDSMI_MAX_NIC_FW 16
2956
2964typedef struct {
2966 uint64_t value;
2967} amdsmi_nic_stat_t;
2968
2974typedef struct {
2975 uint16_t vendor_id;
2976 uint16_t subvendor_id;
2977 uint16_t device_id;
2978 uint16_t subsystem_id;
2979 uint8_t revision;
2985} amdsmi_nic_asic_info_t;
2986
2992typedef struct {
2993 amdsmi_bdf_t bdf;
2994 uint8_t max_pcie_width;
2995 uint32_t max_pcie_speed;
2998} amdsmi_nic_bus_info_t;
2999
3005typedef struct {
3006 uint8_t node;
3008} amdsmi_nic_numa_info_t;
3009
3015typedef struct {
3018} amdsmi_nic_fw_t;
3019
3025typedef struct {
3026 uint32_t num_fw;
3028} amdsmi_nic_fw_info_t;
3029
3052typedef struct {
3053 amdsmi_bdf_t bdf;
3054 uint32_t port_num;
3058 uint8_t ifindex;
3060 uint8_t carrier;
3061 uint16_t mtu;
3063 uint32_t link_speed;
3064 uint32_t active_fec;
3069} amdsmi_nic_port_t;
3070
3076typedef struct {
3077 uint32_t num_ports;
3079} amdsmi_nic_port_info_t;
3080
3086typedef struct {
3089} amdsmi_nic_driver_info_t;
3090
3096typedef struct {
3099 uint8_t rdma_port;
3100 uint16_t max_mtu;
3101 uint16_t active_mtu;
3102} amdsmi_nic_rdma_port_info_t;
3103
3109typedef struct {
3115 uint8_t num_rdma_ports;
3117} amdsmi_nic_rdma_dev_info_t;
3118
3124typedef struct {
3125 uint8_t num_rdma_dev;
3128
3129/*****************************************************************************/
3159
3175
3178/*****************************************************************************/
3216 amdsmi_socket_handle* socket_handles);
3217
3237amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char* name);
3238
3281 uint32_t* processor_count,
3282 amdsmi_processor_handle* processor_handles);
3283
3305 amdsmi_node_handle* node_handle);
3306
3327 amdsmi_processor_type_t* processor_type);
3328
3351 char* name);
3352
3377amdsmi_status_t amdsmi_get_processor_count_from_handles(amdsmi_processor_handle* processor_handles,
3378 uint32_t* processor_count,
3379 uint32_t* nr_cpusockets,
3380 uint32_t* nr_cpucores, uint32_t* nr_gpus);
3381
3411 amdsmi_processor_type_t processor_type,
3412 amdsmi_processor_handle* processor_handles,
3413 uint32_t* processor_count);
3414
3433 amdsmi_processor_handle* processor_handle);
3434
3450 amdsmi_bdf_t* bdf);
3451
3472 unsigned int* uuid_length, char* uuid);
3473
3493 amdsmi_enumeration_info_t* info);
3494
3523 uint32_t cpu_set_size, uint64_t* cpu_set,
3524 amdsmi_affinity_scope_t scope);
3525
3544 amdsmi_virtualization_mode_t* mode);
3545
3548/*****************************************************************************/
3581
3600 uint16_t* revision);
3601
3637amdsmi_status_t amdsmi_get_gpu_vendor_name(amdsmi_processor_handle processor_handle, char* name,
3638 size_t len);
3639
3666amdsmi_status_t amdsmi_get_gpu_vram_vendor(amdsmi_processor_handle processor_handle, char* brand,
3667 uint32_t len);
3668
3692amdsmi_status_t amdsmi_get_gpu_subsystem_id(amdsmi_processor_handle processor_handle, uint16_t* id);
3693
3729amdsmi_status_t amdsmi_get_gpu_subsystem_name(amdsmi_processor_handle processor_handle, char* name,
3730 size_t len);
3731
3734/*****************************************************************************/
3762 amdsmi_pcie_bandwidth_t* bandwidth);
3763
3810amdsmi_status_t amdsmi_get_gpu_bdf_id(amdsmi_processor_handle processor_handle, uint64_t* bdfid);
3811
3836 int32_t* numa_node);
3837
3865 uint64_t* sent, uint64_t* received,
3866 uint64_t* max_pkt_sz);
3867
3892 uint64_t* counter);
3893
3896/*****************************************************************************/
3937 uint64_t bw_bitmask);
3938
3941/*****************************************************************************/
3979 uint64_t* energy_accumulator, float* counter_resolution,
3980 uint64_t* timestamp);
3981
3984/*****************************************************************************/
4012amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind,
4013 uint64_t cap);
4014
4037 uint32_t reserved,
4038 amdsmi_power_profile_preset_masks_t profile);
4039
4061 uint32_t* sensor_count, uint32_t* sensor_inds,
4062 amdsmi_power_cap_type_t* sensor_types);
4063
4078 uint32_t* ppower);
4079
4094 uint32_t* pcap);
4095
4110 uint32_t* pmax);
4111
4125amdsmi_status_t amdsmi_get_cpu_pwr_svi_telemetry_all_rails(amdsmi_processor_handle processor_handle,
4126 uint32_t* power);
4127
4142 uint32_t pcap);
4143
4163 uint8_t power_efficiency_mode,
4164 uint32_t* utilization, uint32_t* ppt_limit);
4165
4188 uint32_t* power_efficiency_mode,
4189 uint32_t* utilization, uint32_t* ppt_limit);
4190
4207 uint32_t* power);
4208
4211/*****************************************************************************/
4245 amdsmi_memory_type_t mem_type, uint64_t* total);
4246
4274 amdsmi_memory_type_t mem_type, uint64_t* used);
4275
4301 uint32_t* num_pages,
4302 amdsmi_retired_page_record_t* info);
4303
4323 uint32_t* threshold);
4324
4345
4371amdsmi_status_t amdsmi_get_gpu_ras_block_features_enabled(amdsmi_processor_handle processor_handle,
4372 amdsmi_gpu_block_t block,
4373 amdsmi_ras_err_state_t* state);
4374
4411 uint32_t* num_pages,
4412 amdsmi_retired_page_record_t* records);
4413
4416/*****************************************************************************/
4450 uint32_t sensor_ind, int64_t* speed);
4451
4482 uint32_t sensor_ind, int64_t* speed);
4483
4514 uint32_t sensor_ind, uint64_t* max_speed);
4515
4531 amdsmi_gpu_cache_info_t* info);
4532
4565 amdsmi_voltage_type_t sensor_type,
4566 amdsmi_voltage_metric_t metric, int64_t* voltage);
4567
4570/*****************************************************************************/
4595amdsmi_status_t amdsmi_reset_gpu_fan(amdsmi_processor_handle processor_handle, uint32_t sensor_ind);
4596
4624 uint32_t sensor_ind, uint64_t speed);
4625
4628/*****************************************************************************/
4652 uint32_t* gpu_busy_percent);
4653
4685 amdsmi_utilization_counter_t utilization_counters[],
4686 uint32_t count, uint64_t* timestamp);
4687
4712 amdsmi_dev_perf_level_t* perf);
4713
4737 uint64_t clkvalue);
4738
4763 uint32_t* od);
4764
4789 uint32_t* od);
4790
4816
4836
4861 amdsmi_od_volt_freq_data_t* odv);
4862
4884 amd_metrics_table_header_t* header_value);
4885
4918 amdsmi_gpu_metrics_t* pgpu_metrics);
4919
4951 amdsmi_gpu_metrics_t* pgpu_metrics);
4952
4988 amdsmi_name_value_t** pm_metrics,
4989 uint32_t* num_of_metrics);
4990
5028 amdsmi_reg_type_t reg_type,
5029 amdsmi_name_value_t** reg_metrics,
5030 uint32_t* num_of_metrics);
5031
5060 uint64_t minclkvalue, uint64_t maxclkvalue,
5061 amdsmi_clk_type_t clkType);
5062
5086 amdsmi_clk_type_t clk_type,
5087 amdsmi_clk_limit_type_t limit_type, uint64_t clk_value);
5088
5114 amdsmi_freq_ind_t level, uint64_t clkvalue,
5115 amdsmi_clk_type_t clkType);
5116
5141 uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue);
5142
5183 uint32_t* num_regions,
5184 amdsmi_freq_volt_region_t* buffer);
5185
5222 uint32_t sensor_ind,
5223 amdsmi_power_profile_status_t* status);
5224
5227/*****************************************************************************/
5256 amdsmi_dev_perf_level_t perf_lvl);
5257
5299 uint32_t od);
5300
5338 amdsmi_clk_type_t clk_type, uint64_t freq_bitmask);
5339
5360 amdsmi_dpm_policy_t* policy);
5361
5383amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id);
5384
5405 amdsmi_dpm_policy_t* xgmi_plpd);
5406
5428amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id);
5429
5450 uint32_t* pisolate);
5451
5472 uint32_t pisolate);
5473
5492
5495/*****************************************************************************/
5504typedef enum {
5505 AMDSMI_FABRIC_TELEMETRY_CATEGORY_UNKNOWN = 0xFFFFFFFF,
5506 AMDSMI_FABRIC_TELEMETRY_CATEGORY_UALOE = 0,
5507 AMDSMI_FABRIC_TELEMETRY_CATEGORY_SWITCH = 1,
5508 AMDSMI_FABRIC_TELEMETRY_CATEGORY_CRYPTO = 2,
5509 AMDSMI_FABRIC_TELEMETRY_CATEGORY_PFC = 3,
5510 AMDSMI_FABRIC_TELEMETRY_CATEGORY_NETPORT = 4,
5513 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MAX = 7
5515
5520typedef enum {
5521 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_UALOE = (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_UALOE),
5522 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_SWITCH = (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_SWITCH),
5523 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_CRYPTO = (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_CRYPTO),
5524 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_PFC = (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_PFC),
5525 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_NETPORT = (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_NETPORT),
5526 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_DERIVED_UALOE =
5527 (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_UALOE),
5528 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_DERIVED_NETPORT =
5529 (1U << AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_NETPORT),
5531 (AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_UALOE | AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_SWITCH |
5532 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_CRYPTO | AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_PFC |
5533 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_NETPORT |
5534 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_DERIVED_UALOE |
5535 AMDSMI_FABRIC_TELEMETRY_CATEGORY_MASK_DERIVED_NETPORT)
5537
5541typedef struct {
5542 uint64_t id;
5543 uint64_t value;
5545
5551#define AMDSMI_FABRIC_LABEL_MAX_LENGTH \
5552 32
5553
5554typedef struct {
5556} amdsmi_fabric_label_t;
5557
5563typedef struct {
5564 amdsmi_fabric_label_t name;
5565 unsigned logical_idx;
5566 unsigned item_count;
5567 amdsmi_fabric_telemetry_item_t* items;
5569
5575typedef struct {
5576 amdsmi_fabric_telemetry_category_t category;
5577 uint64_t generation_count;
5578 struct timespec timestamp;
5579 unsigned instance_count;
5580 amdsmi_fabric_telemetry_instance_t* instances;
5582
5590typedef struct {
5592 datasets[AMDSMI_FABRIC_TELEMETRY_CATEGORY_MAX];
5593} amdsmi_fabric_telemetry_t;
5594
5616 uint32_t category_mask,
5617 amdsmi_fabric_telemetry_t** telemetry);
5618
5636 amdsmi_fabric_telemetry_t* telemetry);
5637
5657
5674 amdsmi_fabric_telemetry_t* telemetry);
5675
5681typedef enum {
5683 32,
5684 AMDSMI_FABRIC_MAX_LOCAL_GPUS = 8
5686
5692typedef enum {
5693 AMDSMI_FABRIC_TYPE_UALOE,
5694 AMDSMI_FABRIC_TYPE_UALLINK,
5695 AMDSMI_FABRIC_TYPE_UNKNOWN
5696} amdsmi_fabric_type_t;
5697
5703typedef enum {
5704 AMDSMI_FABRIC_NPA_ADDRESS_MODE_SOURCE_ALIASING,
5705 AMDSMI_FABRIC_NPA_ADDRESS_MODE_SOURCE_IDENTIFICATION,
5706 AMDSMI_FABRIC_NPA_ADDRESS_MODE_UNKNOWN
5708
5714typedef enum {
5715 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_UNCONFIGURED,
5716 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_CONFIGURED,
5717 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_READY,
5718 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_ACTIVE,
5719 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_ERROR,
5720 AMDSMI_FABRIC_ACCELERATOR_VPOD_STATE_UNKNOWN
5722
5728typedef struct {
5729 uint32_t accelerator_id;
5730 amdsmi_fabric_type_t fabric_type;
5731 uint32_t bandwidth;
5732 uint32_t latency;
5733 uint8_t ppod_id[AMDSMI_MAX_UUID_ELEMENTS];
5734 uint32_t ppod_size;
5735 uint32_t vpod_id;
5736 uint32_t vpod_size;
5737 uint32_t vpod_active_accelerators
5740 uint32_t local_accelerators[AMDSMI_FABRIC_MAX_LOCAL_GPUS];
5741 amdsmi_fabric_npa_address_mode_t addr_mode;
5742 amdsmi_fabric_accelerator_vpod_state_t accel_state;
5743} amdsmi_fabric_info_v1_t;
5744
5745typedef struct {
5746 uint32_t version;
5747 union fabric_info_ {
5748 amdsmi_fabric_info_v1_t v1;
5749 } fabric_version;
5750} amdsmi_fabric_info_ver_t;
5751
5756typedef struct {
5757 amdsmi_bdf_t bdf;
5758 amdsmi_fabric_info_ver_t fabric_info;
5759 uint32_t reserved[15];
5760} amdsmi_fabric_info_t;
5761
5793 amdsmi_fabric_info_t* info);
5794
5797/*****************************************************************************/
5820
5823/*****************************************************************************/
5859
5893 uint64_t* enabled_blocks);
5894
5916 amdsmi_error_count_t* ec);
5917
5920#pragma pack(push, 1)
5921
5927typedef struct {
5928 unsigned char b[16];
5929} amdsmi_cper_guid_t;
5930
5931typedef struct {
5932 uint8_t seconds;
5933 uint8_t minutes;
5934 uint8_t hours;
5935 uint8_t flag;
5936 uint8_t day;
5937 uint8_t month;
5938 uint8_t year;
5939 uint8_t century;
5940} amdsmi_cper_timestamp_t;
5941
5942typedef union {
5943 struct valid_bits_ {
5944 uint32_t platform_id : 1;
5945 uint32_t timestamp : 1;
5946 uint32_t partition_id : 1;
5947 uint32_t reserved : 29;
5948 } valid_bits;
5949 uint32_t valid_mask;
5950} amdsmi_cper_valid_bits_t;
5951
5952typedef struct {
5953 char signature[4];
5954 uint16_t revision;
5955 uint32_t signature_end;
5956 uint16_t sec_cnt;
5957 amdsmi_cper_sev_t error_severity;
5958 amdsmi_cper_valid_bits_t cper_valid_bits;
5959 uint32_t record_length;
5960 amdsmi_cper_timestamp_t timestamp;
5961 char platform_id[16];
5962 amdsmi_cper_guid_t partition_id;
5963 char creator_id[16];
5964 amdsmi_cper_guid_t notify_type;
5965 char record_id[8];
5966 uint32_t flags;
5967 uint64_t persistence_info;
5968 uint8_t reserved[12];
5969} amdsmi_cper_hdr_t;
5970
5971#pragma pack(pop)
5972
5973/*****************************************************************************/
6004amdsmi_status_t amdsmi_get_afids_from_cper(char* cper_buffer, uint32_t buf_size, uint64_t* afids,
6005 uint32_t* num_afids);
6006
6022 amdsmi_ras_feature_t* ras_feature);
6023
6063 uint32_t severity_mask, char* cper_data,
6064 uint64_t* buf_size, amdsmi_cper_hdr_t** cper_hdrs,
6065 uint64_t* entry_count, uint64_t* cursor);
6066
6069/*****************************************************************************/
6108
6127amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char** status_string);
6128
6131/*****************************************************************************/
6252 amdsmi_event_group_t group);
6253
6283 amdsmi_event_type_t type,
6284 amdsmi_event_handle_t* evnt_handle);
6285
6303
6327
6349 amdsmi_counter_value_t* value);
6350
6374 amdsmi_event_group_t grp, uint32_t* available);
6375
6378/*****************************************************************************/
6417 uint32_t* num_items);
6418
6440 amdsmi_process_info_t* proc);
6441
6476 uint32_t* num_devices);
6477
6480/*****************************************************************************/
6511 amdsmi_xgmi_status_t* status);
6512
6530
6546 amdsmi_xgmi_info_t* info);
6547
6566 amdsmi_xgmi_link_status_t* link_status);
6567
6570/*****************************************************************************/
6591 amdsmi_link_metrics_t* link_metrics);
6592
6613 uint32_t* numa_node);
6614
6638 amdsmi_processor_handle processor_handle_dst,
6639 uint64_t* weight);
6640
6668 uint64_t* min_bandwidth, uint64_t* max_bandwidth);
6669
6697 amdsmi_processor_handle processor_handle_dst,
6698 uint64_t* hops, amdsmi_link_type_t* type);
6699
6726 amdsmi_link_type_t link_type,
6727 amdsmi_topology_nearest_t* topology_nearest_info);
6728
6752 amdsmi_processor_handle processor_handle_dst,
6753 bool* accessible);
6754
6782 amdsmi_processor_handle processor_handle_dst,
6784
6787/*****************************************************************************/
6827 char* compute_partition, uint32_t len);
6828
6857 amdsmi_compute_partition_type_t compute_partition);
6858
6890
6923/*****************************************************************************/
6963 char* memory_partition, uint32_t len);
6964
6995 amdsmi_memory_partition_type_t memory_partition);
6996
7011amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle,
7012 amdsmi_memory_partition_config_t* config);
7013
7041 amdsmi_memory_partition_type_t mode);
7042
7045/*****************************************************************************/
7070 amdsmi_processor_handle processor_handle,
7071 amdsmi_accelerator_partition_profile_config_t* profile_config);
7072
7095 uint32_t* partition_id);
7096
7115 amdsmi_processor_handle processor_handle, uint32_t profile_index);
7116
7119/*****************************************************************************/
7144
7175amdsmi_status_t amdsmi_set_gpu_event_notification_mask(amdsmi_processor_handle processor_handle,
7176 uint64_t mask);
7177
7218 amdsmi_evt_notification_data_t* data);
7219
7239
7242/*****************************************************************************/
7263 amdsmi_driver_info_t* info);
7264
7267/*****************************************************************************/
7295 amdsmi_asic_info_t* info);
7296
7316 amdsmi_kfd_info_t* info);
7317
7333 amdsmi_vram_info_t* info);
7334
7350 amdsmi_board_info_t* info);
7351
7371 uint32_t sensor_ind, amdsmi_power_cap_info_t* info);
7372
7388 amdsmi_pcie_info_t* info);
7389
7407 uint16_t* xcd_count);
7408
7433
7436/*****************************************************************************/
7456 amdsmi_fw_info_t* info);
7457
7474 amdsmi_vbios_info_t* info);
7475
7478/*****************************************************************************/
7513 amdsmi_temperature_type_t sensor_type,
7514 amdsmi_temperature_metric_t metric, int64_t* temperature);
7515
7531 amdsmi_engine_usage_t* info);
7532
7551 amdsmi_power_info_t* info);
7552
7566amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle,
7567 bool* enabled);
7568
7590
7605 amdsmi_vram_usage_t* info);
7606
7627 amdsmi_violation_status_t* info);
7628
7631/*****************************************************************************/
7691 uint32_t* max_processes, amdsmi_proc_info_t* list);
7692
7717 uint32_t num_processors,
7718 amdsmi_proc_info_by_pid_t* procs,
7719 uint32_t* max_processes);
7720
7723/*****************************************************************************/
7776
7779/*****************************************************************************/
7804amdsmi_status_t amdsmi_get_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool* enabled);
7805
7824amdsmi_status_t amdsmi_set_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool enable);
7825
7849 amdsmi_ptl_data_format_t* data_format1,
7850 amdsmi_ptl_data_format_t* data_format2);
7851
7877 amdsmi_ptl_data_format_t data_format1,
7878 amdsmi_ptl_data_format_t data_format2);
7879
7882#ifdef ENABLE_ESMI_LIB
7883
7884/*****************************************************************************/
7918 amdsmi_processor_handle* processor_handles);
7919
7947 amdsmi_processor_handle* processor_handles);
7948
7951/*****************************************************************************/
7970 uint64_t* penergy);
7971
7986 uint64_t* penergy);
7987
7990/*****************************************************************************/
8007
8021 amdsmi_processor_handle processor_handle, amdsmi_hsmp_driver_version_t* amdsmi_hsmp_driver_ver);
8022
8036 amdsmi_smu_fw_version_t* amdsmi_smu_fw);
8037
8051 uint32_t* proto_ver);
8052
8067 uint32_t* prochot);
8068
8084amdsmi_status_t amdsmi_get_cpu_fclk_mclk(amdsmi_processor_handle processor_handle, uint32_t* fclk,
8085 uint32_t* mclk);
8086
8100amdsmi_status_t amdsmi_get_cpu_cclk_limit(amdsmi_processor_handle processor_handle, uint32_t* cclk);
8101
8119
8136 uint16_t* fmax, uint16_t* fmin);
8137
8151amdsmi_status_t amdsmi_get_cpu_core_current_freq_limit(amdsmi_processor_handle processor_handle,
8152 uint32_t* freq);
8153
8182 bool* rail_isofreq_policy);
8183
8212 uint8_t* rail_isofreq_policy);
8213
8216/*****************************************************************************/
8241 uint8_t* dfc_ctrl);
8242
8262 uint8_t* dfc_ctrl);
8263
8266/*****************************************************************************/
8285 uint32_t* pboostlimit);
8286
8301 uint32_t* pc0_residency);
8302
8317 uint32_t boostlimit);
8318
8333 uint32_t boostlimit);
8334
8351 uint32_t* floor_freq);
8352
8369 uint32_t* floor_freq);
8370
8386amdsmi_status_t amdsmi_get_cpu_core_eff_floor_freq_limit(amdsmi_processor_handle processor_handle,
8387 uint32_t* eff_floor_freq);
8388
8405 uint32_t* eff_floor_freq);
8406
8423 uint32_t floor_freq);
8424
8441 uint32_t floor_freq);
8442
8460 uint32_t msr_floor_freq);
8461
8477amdsmi_status_t amdsmi_set_cpu_core_msr_floor_freq_limit(amdsmi_processor_handle processor_handle,
8478 uint32_t msr_floor_freq);
8479
8495
8510 uint32_t sdps_limit);
8511
8526 uint32_t* sdps_limit);
8527
8530/*****************************************************************************/
8549 amdsmi_ddr_bw_metrics_t* ddr_bw);
8550
8553/*****************************************************************************/
8572 uint32_t* ptmon);
8573
8594amdsmi_status_t amdsmi_get_cpu_tdelta(amdsmi_processor_handle processor_handle, uint8_t* tdelta);
8595
8618amdsmi_status_t amdsmi_get_cpu_svi3_vr_controller_temp(amdsmi_processor_handle processor_handle,
8619 uint32_t* rail_selection,
8620 uint32_t* rail_index, uint32_t* temp);
8621
8624/*****************************************************************************/
8645 amdsmi_processor_handle processor_handle, uint8_t dimm_addr,
8646 amdsmi_temp_range_refresh_rate_t* rate);
8647
8662 uint8_t dimm_addr,
8663 amdsmi_dimm_power_t* dimm_pow);
8664
8681 uint8_t dimm_addr,
8682 amdsmi_dimm_thermal_t* dimm_temp);
8683
8709 uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset,
8710 uint32_t reg_space, uint32_t* data);
8736 uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset,
8737 uint32_t reg_space, uint32_t write_data);
8738
8741/*****************************************************************************/
8761amdsmi_status_t amdsmi_set_cpu_xgmi_width(amdsmi_processor_handle processor_handle, uint8_t min,
8762 uint8_t max);
8763
8766/*****************************************************************************/
8787 uint8_t min_link_width,
8788 uint8_t max_link_width);
8789
8792/*****************************************************************************/
8809
8823amdsmi_status_t amdsmi_cpu_apb_disable(amdsmi_processor_handle processor_handle, uint8_t pstate);
8824
8843 uint8_t nbio_id, uint8_t min, uint8_t max);
8844
8861 uint8_t nbio_id, amdsmi_dpm_level_t* nbio);
8862
8879 uint8_t rate_ctrl, uint8_t* prev_mode);
8880
8897 uint8_t min_pstate, uint8_t max_pstate);
8898
8922 uint8_t min_pstate, uint8_t max_pstate);
8923
8948 uint8_t* min_pstate, uint8_t* max_pstate);
8949
8971 uint8_t* enabled);
8972
8992amdsmi_status_t amdsmi_set_cpu_pc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable);
8993
9015 uint8_t* enabled);
9016
9038amdsmi_status_t amdsmi_set_cpu_cc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable);
9039
9042/*****************************************************************************/
9063 amdsmi_link_id_bw_type_t link, uint32_t* io_bw);
9064
9081 amdsmi_link_id_bw_type_t link, uint32_t* xgmi_bw);
9082
9085/*****************************************************************************/
9104 uint32_t* metrics_version);
9105
9120 amdsmi_hsmp_metrics_table_t* metrics_table);
9121
9124/*****************************************************************************/
9142amdsmi_status_t amdsmi_first_online_core_on_cpu_socket(amdsmi_processor_handle processor_handle,
9143 uint32_t* pcore_ind);
9144
9157
9170
9196 amdsmi_cpu_info_t* cpu_info);
9197
9216
9229amdsmi_status_t amdsmi_get_cpu_cores_per_socket(uint32_t sock_count, amdsmi_sock_info_t* soc_info);
9230
9243
9264 bool* r_mask, uint32_t* mask0, uint32_t* mask1,
9265 uint32_t* mask2);
9266
9269#endif
9270
9271/*****************************************************************************/
9291 amdsmi_nic_driver_info_t* info);
9292
9308 amdsmi_nic_asic_info_t* info);
9309
9325 amdsmi_nic_bus_info_t* info);
9326
9342 amdsmi_nic_numa_info_t* info);
9343
9359 amdsmi_nic_port_info_t* info);
9360
9376 amdsmi_nic_rdma_devices_info_t* info);
9377
9401 uint32_t rdma_port_index, uint32_t* num_stats,
9402 amdsmi_nic_stat_t* stats);
9403
9450#define AMDSMI_MAX_CARVEOUT_OPTIONS 16
9457typedef struct {
9458 uint32_t index;
9460} amdsmi_uma_carveout_option_t;
9461
9467typedef struct {
9468 uint32_t current_index;
9469 uint32_t num_options;
9471 options[AMDSMI_MAX_CARVEOUT_OPTIONS];
9472} amdsmi_uma_carveout_info_t;
9473
9479typedef struct {
9480 uint64_t current_pages;
9481} amdsmi_ttm_info_t;
9482
9505 amdsmi_uma_carveout_info_t* info);
9506
9529 uint32_t option_index);
9530
9551
9572
9590
9593#ifdef __cplusplus
9594}
9595#endif // __cplusplus
9596
9597#endif // __AMDSMI_H__
@ AMDSMI_LINK_TYPE_XNUMA
Two processors connect via different PCIe switches on different CPUs (NIC-to-GPU only)
Definition amdsmi.h:1260
amdsmi_accelerator_partition_resource_type_t
Accelerator Partition Resource Types.
Definition amdsmi.h:484
#define AMDSMI_MAX_NUM_XCP
This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Gr...
Definition amdsmi.h:182
#define AMDSMI_MAX_NUM_XCC
This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units...
Definition amdsmi.h:168
amdsmi_vram_type_t
vRam Types. This enum is used to identify various VRam types.
Definition amdsmi.h:777
amdsmi_event_group_t
Event Groups Enum denoting an event group. The value of the enum is the base value for all the event ...
Definition amdsmi.h:1533
#define AMDSMI_MAX_ACCELERATOR_PARTITIONS
Maximum number of accelerator partitions.
Definition amdsmi.h:70
@ AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT
Definition amdsmi.h:1825
amdsmi_event_type_t
Event types Event type enum. Events belonging to a particular event group amdsmi_event_group_t should...
Definition amdsmi.h:1569
@ AMDSMI_EVNT_XGMI_0_BEATS_TX
Throughput = BEATS/time_running 10^9 bytes/sec.
Definition amdsmi.h:1576
@ AMDSMI_EVNT_XGMI_1_BEATS_TX
Data beats sent to neighbor 1; Each beat represents 32 bytes.
Definition amdsmi.h:1580
#define AMDSMI_MAX_CP_PROFILE_RESOURCES
Maximum number of compute profile resources.
Definition amdsmi.h:69
#define AMDSMI_MAX_UTILIZATION_VALUES
The max number of values per counter type.
Definition amdsmi.h:1950
amdsmi_fw_block_t
The values of this enum are used to identify the various firmware blocks.
Definition amdsmi.h:674
@ AMDSMI_FW_ID_RS64_ME_P0_DATA
Hardware Block RS64 - Micro Engine Partition 0 Data.
Definition amdsmi.h:737
@ AMDSMI_FW_ID_SDMA7
System Direct Memory Access 7 (high speed data transfers)
Definition amdsmi.h:697
@ AMDSMI_FW_ID_PSP_BL
Platform Security Processor Bootloader (initial firmware)
Definition amdsmi.h:720
@ AMDSMI_FW_ID_PSP_SOSDRV
Platform Security Processor Secure Operating System Driver.
Definition amdsmi.h:713
@ AMDSMI_FW_ID_TA_RAS
Trusted Applications - Reliability Availability and Serviceability.
Definition amdsmi.h:762
@ AMDSMI_FW_ID_RLC_SRLS
Rasterizier and L2 Cache - Shared Resource Local Segment.
Definition amdsmi.h:765
@ AMDSMI_FW_ID_SDMA6
System Direct Memory Access 6 (high speed data transfers)
Definition amdsmi.h:696
@ AMDSMI_FW_ID_CP_CE
Compute Processor - Command_Engine (fetch, decode, dispatch)
Definition amdsmi.h:678
@ AMDSMI_FW_ID_RS64_ME_P1_DATA
Hardware Block RS64 - Micro Engine Partition 1 Data.
Definition amdsmi.h:738
@ AMDSMI_FW_ID_SDMA0
System Direct Memory Access 0 (high speed data transfers)
Definition amdsmi.h:690
@ AMDSMI_FW_ID_ISP
Image Signal Processor (processing raw image data from sensors)
Definition amdsmi.h:701
@ AMDSMI_FW_ID_CP_PM4
Compute Processor Packet Processor 4 (processing command packets)
Definition amdsmi.h:721
@ AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1
Hardware Block RLX6 Core 1 - Dynamic RAM Boot.
Definition amdsmi.h:758
@ AMDSMI_FW_ID_IMU_IRAM
Input/Output Memory Management Unit - Instruction RAM.
Definition amdsmi.h:726
@ AMDSMI_FW_ID_SDMA3
System Direct Memory Access 3 (high speed data transfers)
Definition amdsmi.h:693
@ AMDSMI_FW_ID_SDMA1
System Direct Memory Access 1 (high speed data transfers)
Definition amdsmi.h:691
@ AMDSMI_FW_ID_SDMA4
System Direct Memory Access 4 (high speed data transfers)
Definition amdsmi.h:694
@ AMDSMI_FW_ID_RLC_SRLG
Rasterizier and L2 Cache - Shared Resource Local Group.
Definition amdsmi.h:764
@ AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL
Rasterizier and L2 Cache Restore List Control.
Definition amdsmi.h:709
@ AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST
Rasterizier and L2 Cache - Save Restore List.
Definition amdsmi.h:760
@ AMDSMI_FW_ID_CP_PFP
Compute Processor - Pixel Front End Processor (pixelating process)
Definition amdsmi.h:679
@ AMDSMI_FW_ID_REG_ACCESS_WHITELIST
Register Access Whitelist (Prevent unathorizied access)
Definition amdsmi.h:724
@ AMDSMI_FW_ID_SDMA5
System Direct Memory Access 5 (high speed data transfers)
Definition amdsmi.h:695
@ AMDSMI_FW_ID_SDMA2
System Direct Memory Access 2 (high speed data transfers)
Definition amdsmi.h:692
@ AMDSMI_FW_ID_DMCU_ERAM
Digital Micro Controller Unit - Embedded RAM (memory used by DMU)
Definition amdsmi.h:702
@ AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_SCLK
Stable power state with minimum system clock.
Definition amdsmi.h:1513
@ AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_MCLK
Stable power state with minimum memory clock.
Definition amdsmi.h:1512
@ AMDSMI_DEV_PERF_LEVEL_LOW
Keep PowerPlay levels "low", regardless of workload.
Definition amdsmi.h:1506
@ AMDSMI_DEV_PERF_LEVEL_HIGH
Keep PowerPlay levels "high", regardless of workload.
Definition amdsmi.h:1507
@ AMDSMI_PROCESSOR_TYPE_AMD_APU
AMD Accelerated processor type, GPU and CPU on a single die.
Definition amdsmi.h:356
@ AMDSMI_PROCESSOR_TYPE_AMD_CPU
AMD CPU processor type, physical component that holds the CPU.
Definition amdsmi.h:351
amdsmi_processor_type_t processor_type_t
Backward-compatibility alias for amdsmi_processor_type_t.
Definition amdsmi.h:371
amdsmi_voltage_metric_t
Voltage Metrics. This enum is used to identify various Voltage metrics. Corresponding values will be ...
Definition amdsmi.h:1700
amdsmi_compute_partition_mem_alloc_mode_t
Compute Partition Memory Allocation Mode. Controls how GPU memory is allocated across XCPs within a m...
Definition amdsmi.h:519
@ AMDSMI_COMPUTE_PARTITION_MEM_ALLOC_ALL
Definition amdsmi.h:522
#define AMDSMI_MAX_NUM_JPEG_ENG_V1
Introduced in gpu metrics v1.8, document presents NUM_JPEG_ENG_V1 but will change to AMDSMI_MAX_NUM_J...
Definition amdsmi.h:155
amdsmi_voltage_type_t
This ennumeration is used to indicate which type of voltage reading should be obtained.
Definition amdsmi.h:1721
#define AMDSMI_MAX_NUM_CLKS_PER_MID
Maximum number of clocks per MID supported.
Definition amdsmi.h:225
void * amdsmi_processor_handle
opaque handler point to underlying implementation
Definition amdsmi.h:294
@ AMDSMI_STATUS_DIRECTORY_NOT_FOUND
Error when a directory is not found, maps to ENOTDIR.
Definition amdsmi.h:403
@ AMDSMI_STATUS_INSUFFICIENT_SIZE
Not enough resources were available for the operation.
Definition amdsmi.h:414
@ AMDSMI_STATUS_INIT_ERROR
An error occurred when initializing internal data structures.
Definition amdsmi.h:401
@ AMDSMI_STATUS_MORE_DATA
There is more data than the buffer size the user passed.
Definition amdsmi.h:412
@ AMDSMI_STATUS_UNEXPECTED_DATA
The data read or provided is not what was expected.
Definition amdsmi.h:416
@ AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
The provided input is out of allowable or safe range.
Definition amdsmi.h:400
@ AMDSMI_STATUS_REFCOUNT_OVERFLOW
An internal reference counter exceeded INT32_MAX.
Definition amdsmi.h:402
#define AMDSMI_MAX_NUM_CLKS_PER_AID
Maximum number of clocks per AID supported.
Definition amdsmi.h:224
#define AMDSMI_MAX_NUM_PM_POLICIES
Maximum number of power management policies.
Definition amdsmi.h:2017
amdsmi_ptl_data_format_t
PTL (Peak Tops Limiter) data format types These correspond to the hardware data types used in matrix ...
Definition amdsmi.h:2702
void * amdsmi_cpusocket_handle
opaque handler point to underlying implementation
Definition amdsmi.h:311
amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values ...
Definition amdsmi.h:1663
amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the processor a temperature reading should be...
Definition amdsmi.h:554
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR
Definition amdsmi.h:576
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD3
VDDCR VDD3 voltage regulator temperature.
Definition amdsmi.h:586
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_A
VDDCR SOC A voltage regulator temperature.
Definition amdsmi.h:587
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR
Definition amdsmi.h:651
@ AMDSMI_TEMPERATURE_TYPE_HOTSPOT
Hottest temperature reported for entire die.
Definition amdsmi.h:557
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_085_HBM
VDD 0.85V HBM voltage regulator temperature.
Definition amdsmi.h:591
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2
VDDCR VDD2 voltage regulator temperature.
Definition amdsmi.h:585
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_D
Definition amdsmi.h:594
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_04_HBM_D
Definition amdsmi.h:600
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR
Definition amdsmi.h:647
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_075_HBM_D
Definition amdsmi.h:604
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_USR
VDD USR voltage regulator temperature.
Definition amdsmi.h:596
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR
Definition amdsmi.h:574
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_C
VDDCR SOC C voltage regulator temperature.
Definition amdsmi.h:588
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_A
VDDCR SOCIO A voltage regulator temperature.
Definition amdsmi.h:589
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDAN_075_GTA_C
Definition amdsmi.h:612
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR
Definition amdsmi.h:653
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1
VDDCR VDD1 voltage regulator temperature.
Definition amdsmi.h:584
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_C
VDDCR SOCIO C voltage regulator temperature.
Definition amdsmi.h:590
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_075_HBM_B
Definition amdsmi.h:602
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR
Definition amdsmi.h:649
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_065_UCIEAM_A
Definition amdsmi.h:618
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0
VDDCR VDD0 voltage regulator temperature.
Definition amdsmi.h:582
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_0V72_VR
Definition amdsmi.h:641
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_3V3_VR
Definition amdsmi.h:643
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32
VDDIO 1.1V E32 voltage regulator temperature.
Definition amdsmi.h:597
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_075_UCIE
Definition amdsmi.h:614
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_065_UCIEAA
Definition amdsmi.h:616
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDAN_075
VDDAN 0.75V voltage regulator temperature.
Definition amdsmi.h:622
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_04_HBM_B
Definition amdsmi.h:598
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDAN_075_GTA_A
Definition amdsmi.h:610
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_065_UCIEAM_C
Definition amdsmi.h:620
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR
Definition amdsmi.h:657
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_B
Definition amdsmi.h:592
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_GTA_C
Definition amdsmi.h:608
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR
Definition amdsmi.h:572
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR
Definition amdsmi.h:645
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_GTA_A
Definition amdsmi.h:606
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR
Definition amdsmi.h:655
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR
Definition amdsmi.h:659
amdsmi_power_profile_preset_masks_t
Pre-set Profile Selections. These bitmasks can be AND'd with the amdsmi_power_profile_status_t....
Definition amdsmi.h:1738
amdsmi_compute_partition_type_t
Compute Partition. This enum is used to identify various compute partitioning settings.
Definition amdsmi.h:499
amdsmi_status_t amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index)
Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_pr...
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config)
Returns gpu accelerator partition caps as currently configured in the system.
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id)
Returns current gpu accelerator partition cap.
amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info)
Returns the power caps as currently configured in the system.
amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info)
Returns the PCIe info for the GPU.
amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info)
Returns vram info.
amdsmi_status_t amdsmi_get_gpu_xcd_counter(amdsmi_processor_handle processor_handle, uint16_t *xcd_count)
Returns the 'xcd_counter' from the GPU metrics associated with the device.
amdsmi_status_t amdsmi_get_gpu_kfd_info(amdsmi_processor_handle processor_handle, amdsmi_kfd_info_t *info)
Returns the KFD (Kernel Fusion Driver) information for the device.
amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info)
Returns the board part number and board information for the requested device.
amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info)
Returns the ASIC information for the device.
amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd)
Get the xgmi per-link power down policy parameter for the processor.
amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the xgmi per-link power down policy parameter for the processor.
amdsmi_status_t amdsmi_clean_gpu_local_data(amdsmi_processor_handle processor_handle)
Run the cleaner shader to clean up data in LDS/GPRs.
amdsmi_status_t amdsmi_set_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t perf_lvl)
Set the PowerPlay performance level associated with the device with provided processor handle with th...
amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy)
Get the soc pstate policy for the processor.
amdsmi_status_t amdsmi_set_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t od)
Set the overdrive percent associated with the device with provided processor handle with the provided...
amdsmi_status_t amdsmi_set_gpu_process_isolation(amdsmi_processor_handle processor_handle, uint32_t pisolate)
Enable/disable the system Process Isolation.
amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the soc pstate policy for the processor.
amdsmi_status_t amdsmi_get_gpu_process_isolation(amdsmi_processor_handle processor_handle, uint32_t *pisolate)
Get the status of the Process Isolation.
amdsmi_status_t amdsmi_set_clk_freq(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, uint64_t freq_bitmask)
Control the set of allowed frequencies that can be used for the specified clock. It is not supported ...
amdsmi_status_t amdsmi_get_gpu_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics)
This function retrieves the gpu metrics information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_power_profile_presets(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_profile_status_t *status)
Get the list of available preset power profiles and an indication of which profile is currently activ...
amdsmi_status_t amdsmi_get_gpu_busy_percent(amdsmi_processor_handle processor_handle, uint32_t *gpu_busy_percent)
Get GPU busy percent from gpu_busy_percent sysfs file.
amdsmi_status_t amdsmi_set_gpu_clk_limit(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_limit_type_t limit_type, uint64_t clk_value)
This function sets the clock sets the clock min/max level.
amdsmi_status_t amdsmi_get_gpu_pm_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_name_value_t **pm_metrics, uint32_t *num_of_metrics)
Get the pm metrics table with provided device index.
amdsmi_status_t amdsmi_get_utilization_count(amdsmi_processor_handle processor_handle, amdsmi_utilization_counter_t utilization_counters[], uint32_t count, uint64_t *timestamp)
Get coarse grain utilization counter of the specified device.
amdsmi_status_t amdsmi_get_gpu_metrics_header_info(amdsmi_processor_handle processor_handle, amd_metrics_table_header_t *header_value)
Get the 'metrics_header_info' from the GPU metrics associated with the device.
amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle)
Triggers a chain that resets all GPUs. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_od_volt_info(amdsmi_processor_handle processor_handle, uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue)
This function sets 1 of the 3 voltage curve points. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_partition_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics)
This function retrieves the partition metrics information.
amdsmi_status_t amdsmi_set_gpu_clk_range(amdsmi_processor_handle processor_handle, uint64_t minclkvalue, uint64_t maxclkvalue, amdsmi_clk_type_t clkType)
This function sets the clock range information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_mem_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od)
Get the GPU memory clock overdrive percent associated with the device with provided processor handle....
amdsmi_status_t amdsmi_get_clk_freq(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_frequencies_t *f)
Get the list of possible system clock speeds of device for a specified clock type....
amdsmi_status_t amdsmi_get_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t *perf)
Get the performance level of the device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_perf_determinism_mode(amdsmi_processor_handle processor_handle, uint64_t clkvalue)
Enter performance determinism mode with provided processor handle. It is not supported on virtual mac...
amdsmi_status_t amdsmi_get_gpu_od_volt_info(amdsmi_processor_handle processor_handle, amdsmi_od_volt_freq_data_t *odv)
This function retrieves the overdrive GFX & MCLK information. If valid for the GPU it will also popul...
amdsmi_status_t amdsmi_get_gpu_od_volt_curve_regions(amdsmi_processor_handle processor_handle, uint32_t *num_regions, amdsmi_freq_volt_region_t *buffer)
This function will retrieve the current valid regions in the frequency/voltage space....
amdsmi_status_t amdsmi_get_gpu_reg_table_info(amdsmi_processor_handle processor_handle, amdsmi_reg_type_t reg_type, amdsmi_name_value_t **reg_metrics, uint32_t *num_of_metrics)
Get the register metrics table with provided device index and register type.
amdsmi_status_t amdsmi_get_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od)
Get the overdrive percent associated with the device with provided processor handle....
amdsmi_status_t amdsmi_set_gpu_od_clk_info(amdsmi_processor_handle processor_handle, amdsmi_freq_ind_t level, uint64_t clkvalue, amdsmi_clk_type_t clkType)
This function sets the clock frequency information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_compute_partition_mem_alloc_mode(amdsmi_processor_handle processor_handle, amdsmi_compute_partition_mem_alloc_mode_t *mode)
Retrieves the current compute partition memory allocation mode for a desired device.
amdsmi_status_t amdsmi_set_gpu_compute_partition_mem_alloc_mode(amdsmi_processor_handle processor_handle, amdsmi_compute_partition_mem_alloc_mode_t mode)
Modifies a selected device's compute partition memory allocation mode.
amdsmi_status_t amdsmi_set_gpu_compute_partition(amdsmi_processor_handle processor_handle, amdsmi_compute_partition_type_t compute_partition)
Modifies a selected device's compute partition setting.
amdsmi_status_t amdsmi_get_gpu_compute_partition(amdsmi_processor_handle processor_handle, char *compute_partition, uint32_t len)
Retrieves the current compute partitioning for a desired device.
amdsmi_status_t amdsmi_gpu_driver_reload(void)
Restart the device driver (kmod module) for all AMD GPUs on the system.
amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec)
Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU....
amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec)
Retrieve the error counts for a GPU block. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks)
Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string)
Get a description of a provided AMDSMI error status.
amdsmi_status_t amdsmi_get_gpu_ecc_status(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state)
Retrieve the ECC status for a GPU block. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_cpu_current_io_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *io_bw)
Get current input output bandwidth.
amdsmi_status_t amdsmi_get_cpu_current_xgmi_bw(amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *xgmi_bw)
Get current input output bandwidth.
amdsmi_status_t amdsmi_get_cpu_model_name(amdsmi_processor_handle processor_handle, amdsmi_cpu_info_t *cpu_info)
Retrieve the CPU processor model name based on the processor index.
amdsmi_status_t amdsmi_first_online_core_on_cpu_socket(amdsmi_processor_handle processor_handle, uint32_t *pcore_ind)
Get first online core on socket.
amdsmi_status_t amdsmi_get_cpu_socket_count(uint32_t *sock_count)
Get CPU socket count from sys filesystem.
amdsmi_status_t amdsmi_get_cpu_enabled_commands(amdsmi_processor_handle processor_handle, bool *r_mask, uint32_t *mask0, uint32_t *mask1, uint32_t *mask2)
Get HSMP Enabled Commands information for a given CPU socket.
amdsmi_status_t amdsmi_get_cpu_cores_per_socket(uint32_t sock_count, amdsmi_sock_info_t *soc_info)
Get cpu cores per socket from sys filesystem.
amdsmi_status_t amdsmi_get_esmi_err_msg(amdsmi_status_t status, const char **status_string)
Get a description of provided AMDSMI error status for esmi errors.
amdsmi_status_t amdsmi_get_cpu_ddr_bw(amdsmi_processor_handle processor_handle, amdsmi_ddr_bw_metrics_t *ddr_bw)
Get the DDR bandwidth data.
amdsmi_status_t amdsmi_set_cpu_dfc_ctrl(amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl)
Set the DFCState enabling control.
amdsmi_status_t amdsmi_get_cpu_dfc_ctrl(amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl)
Get the current DFCState enabling control status.
amdsmi_status_t amdsmi_get_cpu_dimm_power_consumption(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_power_t *dimm_pow)
Get DIMM power consumption.
amdsmi_status_t amdsmi_get_cpu_dimm_temp_range_and_refresh_rate(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_temp_range_refresh_rate_t *rate)
Get DIMM temperature range and refresh rate.
amdsmi_status_t amdsmi_get_cpu_dimm_sb_reg(amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t *data)
Read DIMM sideband register data.
amdsmi_status_t amdsmi_get_cpu_dimm_thermal_sensor(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_thermal_t *dimm_temp)
Get DIMM thermal sensor value.
amdsmi_status_t amdsmi_set_cpu_dimm_sb_reg(amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t write_data)
Write Data to DIMM Sideband Register.
amdsmi_status_t amdsmi_get_cpu_socket_energy(amdsmi_processor_handle processor_handle, uint64_t *penergy)
Get the socket energy for a given socket.
amdsmi_status_t amdsmi_get_cpu_core_energy(amdsmi_processor_handle processor_handle, uint64_t *penergy)
Get the core energy for a given core.
amdsmi_status_t amdsmi_set_cpu_gmi3_link_width_range(amdsmi_processor_handle processor_handle, uint8_t min_link_width, uint8_t max_link_width)
Set gmi3 link width range.
amdsmi_status_t amdsmi_get_hsmp_metrics_table(amdsmi_processor_handle processor_handle, amdsmi_hsmp_metrics_table_t *metrics_table)
Get HSMP metrics table.
amdsmi_status_t amdsmi_get_hsmp_metrics_table_version(amdsmi_processor_handle processor_handle, uint32_t *metrics_version)
Get HSMP metrics table version.
amdsmi_status_t amdsmi_get_cpu_fclk_mclk(amdsmi_processor_handle processor_handle, uint32_t *fclk, uint32_t *mclk)
Get Data fabric clock and Memory clock in MHz.
amdsmi_status_t amdsmi_get_cpu_rail_isofreq_policy(amdsmi_processor_handle processor_handle, uint8_t *rail_isofreq_policy)
Get CPU rail isolated frequency policy status for independent core clock control per power rail.
amdsmi_status_t amdsmi_get_cpu_prochot_status(amdsmi_processor_handle processor_handle, uint32_t *prochot)
Get normalized status of the processor's PROCHOT status.
amdsmi_status_t amdsmi_get_cpu_hsmp_driver_version(amdsmi_processor_handle processor_handle, amdsmi_hsmp_driver_version_t *amdsmi_hsmp_driver_ver)
Get HSMP Driver Version.
amdsmi_status_t amdsmi_get_cpu_hsmp_proto_ver(amdsmi_processor_handle processor_handle, uint32_t *proto_ver)
Get HSMP protocol Version.
amdsmi_status_t amdsmi_get_cpu_smu_fw_version(amdsmi_processor_handle processor_handle, amdsmi_smu_fw_version_t *amdsmi_smu_fw)
Get SMU Firmware Version.
amdsmi_status_t amdsmi_get_cpu_socket_current_active_freq_limit(amdsmi_processor_handle processor_handle, uint16_t *freq, char **src_type)
Get current active frequency limit of the socket.
amdsmi_status_t amdsmi_get_cpu_core_current_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *freq)
Get socket frequency limit of the core.
amdsmi_status_t amdsmi_get_threads_per_core(uint32_t *threads_per_core)
Get Number of threads Per Core.
amdsmi_status_t amdsmi_get_cpu_socket_freq_range(amdsmi_processor_handle processor_handle, uint16_t *fmax, uint16_t *fmin)
Get socket frequency range.
amdsmi_status_t amdsmi_get_cpu_cclk_limit(amdsmi_processor_handle processor_handle, uint32_t *cclk)
Get core clock in MHz.
amdsmi_status_t amdsmi_set_cpu_rail_isofreq_policy(amdsmi_processor_handle processor_handle, bool *rail_isofreq_policy)
Set CPU rail isolated frequency policy for independent core clock control per power rail.
amdsmi_status_t amdsmi_get_cpu_freq_range(uint32_t *fmax, uint32_t *fmin)
Get the CPU socket frequency range.
amdsmi_status_t amdsmi_set_cpu_sdps_limit(amdsmi_processor_handle processor_handle, uint32_t sdps_limit)
Set the SDPS(Socket DIMM Power Sloshing) limit for a given processor socket.
amdsmi_status_t amdsmi_set_cpu_core_boostlimit(amdsmi_processor_handle processor_handle, uint32_t boostlimit)
Set the core boostlimit value.
amdsmi_status_t amdsmi_get_cpu_sdps_limit(amdsmi_processor_handle processor_handle, uint32_t *sdps_limit)
Get the current SDPS limit for a given processor socket.
amdsmi_status_t amdsmi_get_cpu_socket_c0_residency(amdsmi_processor_handle processor_handle, uint32_t *pc0_residency)
Get the socket c0 residency.
amdsmi_status_t amdsmi_set_cpu_msr_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq)
Set CPU floor limit frequency via MSR(Model Specific Register).
amdsmi_status_t amdsmi_set_cpu_socket_boostlimit(amdsmi_processor_handle processor_handle, uint32_t boostlimit)
Set the socket boostlimit value.
amdsmi_status_t amdsmi_get_cpu_core_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *floor_freq)
Get the CPU core floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *floor_freq)
Get the CPU floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_core_eff_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq)
Get the CPU core effective floor limit frequency.
amdsmi_status_t amdsmi_set_cpu_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t floor_freq)
Set the CPU socket floor limit frequency.
amdsmi_status_t amdsmi_set_cpu_core_msr_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq)
Set CPU core MSR floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_core_boostlimit(amdsmi_processor_handle processor_handle, uint32_t *pboostlimit)
Get the core boost limit.
amdsmi_status_t amdsmi_get_cpu_eff_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq)
Get the CPU effective floor limit frequency.
amdsmi_status_t amdsmi_set_cpu_core_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t floor_freq)
Set the CPU core floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_socket_power_cap_max(amdsmi_processor_handle processor_handle, uint32_t *pmax)
Get the maximum power cap value for a given socket.
amdsmi_status_t amdsmi_set_gpu_power_profile(amdsmi_processor_handle processor_handle, uint32_t reserved, amdsmi_power_profile_preset_masks_t profile)
Set the power performance profile. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_cpu_socket_power_cap(amdsmi_processor_handle processor_handle, uint32_t pcap)
Set the power cap value for a given socket.
amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap)
Set the maximum gpu power cap value. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_cpu_socket_power(amdsmi_processor_handle processor_handle, uint32_t *ppower)
Get the socket power.
amdsmi_status_t amdsmi_get_cpu_core_ccd_power(amdsmi_processor_handle processor_handle, uint32_t *power)
Read CCD (Core Complex Die) power consumption.
amdsmi_status_t amdsmi_get_supported_power_cap(amdsmi_processor_handle processor_handle, uint32_t *sensor_count, uint32_t *sensor_inds, amdsmi_power_cap_type_t *sensor_types)
Query the supported power cap sensors and their types for a device.
amdsmi_status_t amdsmi_get_cpu_socket_power_cap(amdsmi_processor_handle processor_handle, uint32_t *pcap)
Get the socket power cap.
amdsmi_status_t amdsmi_get_cpu_pwr_svi_telemetry_all_rails(amdsmi_processor_handle processor_handle, uint32_t *power)
Get the SVI based power telemetry for all rails.
amdsmi_status_t amdsmi_set_cpu_pwr_efficiency_mode(amdsmi_processor_handle processor_handle, uint8_t power_efficiency_mode, uint32_t *utilization, uint32_t *ppt_limit)
Set the power efficiency profile policy.
amdsmi_status_t amdsmi_get_cpu_pwr_efficiency_mode(amdsmi_processor_handle processor_handle, uint32_t *power_efficiency_mode, uint32_t *utilization, uint32_t *ppt_limit)
Get the power efficiency profile policy.
amdsmi_status_t amdsmi_get_cpu_handles(uint32_t *cpu_count, amdsmi_processor_handle *processor_handles)
Get the list of cpu handles in the system.
amdsmi_status_t amdsmi_get_cpucore_handles(uint32_t *cores_count, amdsmi_processor_handle *processor_handles)
Get the list of the cpu core handles in a system.
amdsmi_status_t amdsmi_cpu_apb_disable(amdsmi_processor_handle processor_handle, uint8_t pstate)
Disable APB.
amdsmi_status_t amdsmi_set_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle, uint8_t nbio_id, uint8_t min, uint8_t max)
Set NBIO lclk dpm level value.
amdsmi_status_t amdsmi_set_cpu_xgmi_pstate_range(amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate)
Set the Min and Max XGMI PState Range.
amdsmi_status_t amdsmi_get_cpu_pc6_enable(amdsmi_processor_handle processor_handle, uint8_t *enabled)
Get the PC6 Enable State.
amdsmi_status_t amdsmi_get_cpu_xgmi_pstate_range(amdsmi_processor_handle processor_handle, uint8_t *min_pstate, uint8_t *max_pstate)
Get the Max and Min XGMI PState Range.
amdsmi_status_t amdsmi_set_cpu_pcie_link_rate(amdsmi_processor_handle processor_handle, uint8_t rate_ctrl, uint8_t *prev_mode)
Set pcie link rate.
amdsmi_status_t amdsmi_get_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle, uint8_t nbio_id, amdsmi_dpm_level_t *nbio)
Get NBIO LCLK dpm level.
amdsmi_status_t amdsmi_set_cpu_cc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable)
Set the Core C6 Enable State.
amdsmi_status_t amdsmi_set_cpu_pc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable)
Set the PC6 Enable State.
amdsmi_status_t amdsmi_set_cpu_df_pstate_range(amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate)
Set df pstate range.
amdsmi_status_t amdsmi_get_cpu_cc6_enable(amdsmi_processor_handle processor_handle, uint8_t *enabled)
Get the Core C6 Enable State.
amdsmi_status_t amdsmi_cpu_apb_enable(amdsmi_processor_handle processor_handle)
Enable APB.
amdsmi_status_t amdsmi_get_cpu_tdelta(amdsmi_processor_handle processor_handle, uint8_t *tdelta)
Read Thermal Delta (TDELTA) Behavior.
amdsmi_status_t amdsmi_get_cpu_svi3_vr_controller_temp(amdsmi_processor_handle processor_handle, uint32_t *rail_selection, uint32_t *rail_index, uint32_t *temp)
Get Temperature of SVI3 VR(Voltage Rail)
amdsmi_status_t amdsmi_get_cpu_socket_temperature(amdsmi_processor_handle processor_handle, uint32_t *ptmon)
Get socket temperature.
amdsmi_status_t amdsmi_set_cpu_xgmi_width(amdsmi_processor_handle processor_handle, uint8_t min, uint8_t max)
Set xgmi width.
amdsmi_status_t amdsmi_set_gpu_event_notification_mask(amdsmi_processor_handle processor_handle, uint64_t mask)
Specify which events to collect for a device.
amdsmi_status_t amdsmi_stop_gpu_event_notification(amdsmi_processor_handle processor_handle)
Close any file handles and free any resources used by event notification for a GPU.
amdsmi_status_t amdsmi_init_gpu_event_notification(amdsmi_processor_handle processor_handle)
Prepare to collect event notifications for a GPU.
amdsmi_status_t amdsmi_get_gpu_event_notification(int timeout_ms, uint32_t *num_elem, amdsmi_evt_notification_data_t *data)
Collect event notifications, waiting a specified amount of time.
amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info)
Returns the static information for the vBIOS on the device.
amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on the device.
amdsmi_status_t amdsmi_get_gpu_fabric_info(amdsmi_processor_handle processor_handle, amdsmi_fabric_info_t *info)
Get Fabric device information.
amdsmi_status_t amdsmi_alloc_fabric_telemetry(amdsmi_processor_handle processor_handle, uint32_t category_mask, amdsmi_fabric_telemetry_t **telemetry)
Allocate storage for Fabric telemetry data.
const char * amdsmi_fabric_telem_id_to_string(uint64_t telem_id)
Get string name for a telemetry item ID.
amdsmi_fabric_telemetry_category_mask_t
Fabric telemetry category bitmask values.
Definition amdsmi.h:5520
amdsmi_status_t amdsmi_free_fabric_telemetry(amdsmi_processor_handle processor_handle, amdsmi_fabric_telemetry_t *telemetry)
Free Fabric telemetry storage.
amdsmi_status_t amdsmi_get_fabric_telemetry_data(amdsmi_processor_handle processor_handle, amdsmi_fabric_telemetry_t *telemetry)
Get Fabric telemetry data.
@ AMDSMI_FABRIC_TELEMETRY_CATEGORY_DERIVED_NETPORT
Derived Network Port telemetry.
Definition amdsmi.h:5512
@ AMDSMI_FABRIC_ACTIVE_ACCELERATORS_BITMAP_SIZE
Active accelerators bitmap size (32 x 32-bit words = 1024 bits)
Definition amdsmi.h:5682
amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info)
Returns the current power and voltage of the GPU.
amdsmi_status_t amdsmi_get_gpu_vram_usage(amdsmi_processor_handle processor_handle, amdsmi_vram_usage_t *info)
Returns the VRAM usage (both total and used memory) in MegaBytes.
amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature)
Get the temperature metric value for the specified metric, from the specified temperature sensor on t...
amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info)
Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentag...
amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info)
Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory....
amdsmi_status_t amdsmi_get_violation_status(amdsmi_processor_handle processor_handle, amdsmi_violation_status_t *info)
Returns the violations for a processor.
amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled)
Returns is power management enabled.
amdsmi_status_t amdsmi_topo_get_link_type(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *hops, amdsmi_link_type_t *type)
Retrieve the hops and the connection type between 2 GPUs.
amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node)
Retrieve the NUMA CPU node number for a device.
amdsmi_status_t amdsmi_get_minmax_bandwidth_between_processors(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *min_bandwidth, uint64_t *max_bandwidth)
Retrieve minimal and maximal io link bandwidth between 2 GPUs.
amdsmi_status_t amdsmi_is_P2P_accessible(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, bool *accessible)
Return P2P availability status between 2 GPUs.
amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics)
Return link metric information.
amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap)
Retrieve connection type and P2P capabilities between 2 GPUs.
amdsmi_status_t amdsmi_topo_get_link_weight(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *weight)
Retrieve the weight for a connection between 2 GPUs.
amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info)
Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level.
amdsmi_status_t amdsmi_get_gpu_subsystem_name(amdsmi_processor_handle processor_handle, char *name, size_t len)
Get the name string for the device subsystem.
amdsmi_status_t amdsmi_get_gpu_revision(amdsmi_processor_handle processor_handle, uint16_t *revision)
Get the device revision associated with the device.
amdsmi_status_t amdsmi_get_gpu_vendor_name(amdsmi_processor_handle processor_handle, char *name, size_t len)
Get the name string for a give vendor ID.
amdsmi_status_t amdsmi_get_gpu_id(amdsmi_processor_handle processor_handle, uint16_t *id)
Get the device id associated with the device with provided device handler.
amdsmi_status_t amdsmi_get_gpu_vram_vendor(amdsmi_processor_handle processor_handle, char *brand, uint32_t len)
Get the vram vendor string of a device.
amdsmi_status_t amdsmi_get_gpu_subsystem_id(amdsmi_processor_handle processor_handle, uint16_t *id)
Get the subsystem device id associated with the device with provided processor handle.
amdsmi_status_t amdsmi_get_gpu_uma_carveout_info(amdsmi_processor_handle processor_handle, amdsmi_uma_carveout_info_t *info)
Get UMA carveout configuration information.
amdsmi_status_t amdsmi_set_ttm_pages_limit(uint64_t pages)
Set TTM pages limit.
amdsmi_status_t amdsmi_get_ttm_info(amdsmi_ttm_info_t *info)
Get TTM configuration information.
amdsmi_status_t amdsmi_reset_ttm_pages_limit(void)
Reset TTM pages limit to system default.
amdsmi_status_t amdsmi_set_gpu_uma_carveout(amdsmi_processor_handle processor_handle, uint32_t option_index)
Set UMA carveout configuration.
amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config)
Returns current gpu memory partition capabilities.
amdsmi_status_t amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode)
Sets memory partition mode Set memory partition setting based on memory_partition mode from amdsmi_ge...
amdsmi_status_t amdsmi_get_gpu_memory_partition(amdsmi_processor_handle processor_handle, char *memory_partition, uint32_t len)
Retrieves the current memory partition for a desired device.
amdsmi_status_t amdsmi_set_gpu_memory_partition(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t memory_partition)
Modifies a selected device's current memory partition setting.
amdsmi_status_t amdsmi_get_gpu_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold)
Get the bad pages threshold of a processor. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_memory_total(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *total)
Get the total amount of memory that exists.
amdsmi_status_t amdsmi_get_gpu_ras_block_features_enabled(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state)
Returns if RAS features are enabled or disabled for given block. It is not supported on virtual machi...
amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *info)
Get the bad pages of a processor. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_memory_reserved_pages(amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *records)
Get information about reserved ("retired") memory pages. It is not supported on virtual machine guest...
amdsmi_status_t amdsmi_get_gpu_memory_usage(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *used)
Get the current memory usage.
amdsmi_status_t amdsmi_gpu_validate_ras_eeprom(amdsmi_processor_handle processor_handle)
Verify the checksum of RAS EEPROM. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_nic_rdma_dev_info(amdsmi_processor_handle processor_handle, amdsmi_nic_rdma_devices_info_t *info)
Retrieves RDMA devices information for the NIC.
amdsmi_status_t amdsmi_get_nic_rdma_port_statistics(amdsmi_processor_handle processor_handle, uint32_t rdma_port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats)
Retrieve RDMA port statistics for the NIC.
amdsmi_status_t amdsmi_get_nic_port_info(amdsmi_processor_handle processor_handle, amdsmi_nic_port_info_t *info)
Retrieves PORT information for the NIC.
amdsmi_status_t amdsmi_get_nic_driver_info(amdsmi_processor_handle processor_handle, amdsmi_nic_driver_info_t *info)
Retrieves information about the NIC driver.
amdsmi_status_t amdsmi_get_nic_bus_info(amdsmi_processor_handle processor_handle, amdsmi_nic_bus_info_t *info)
Retrieves BUS information for the NIC.
amdsmi_status_t amdsmi_get_nic_asic_info(amdsmi_processor_handle processor_handle, amdsmi_nic_asic_info_t *info)
Retrieves ASIC information for the NIC.
amdsmi_status_t amdsmi_get_nic_numa_info(amdsmi_processor_handle processor_handle, amdsmi_nic_numa_info_t *info)
Retrieves NUMA information for the NIC.
amdsmi_status_t amdsmi_get_npm_info(amdsmi_node_handle node_handle, amdsmi_npm_info_t *info)
Retrieves node power management (NPM) status and power limit for the specified node.
amdsmi_status_t amdsmi_set_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, uint64_t bw_bitmask)
Control the set of allowed PCIe bandwidths that can be used. It is not supported on virtual machine g...
amdsmi_status_t amdsmi_get_gpu_topo_numa_affinity(amdsmi_processor_handle processor_handle, int32_t *numa_node)
Get the NUMA node associated with a device.
amdsmi_status_t amdsmi_get_gpu_pci_throughput(amdsmi_processor_handle processor_handle, uint64_t *sent, uint64_t *received, uint64_t *max_pkt_sz)
Get PCIe traffic information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth)
Get the list of possible PCIe bandwidths that are available. It is not supported on virtual machine g...
amdsmi_status_t amdsmi_get_gpu_pci_replay_counter(amdsmi_processor_handle processor_handle, uint64_t *counter)
Get PCIe replay counter.
amdsmi_status_t amdsmi_get_gpu_bdf_id(amdsmi_processor_handle processor_handle, uint64_t *bdfid)
Get the unique PCI device identifier associated for a device.
amdsmi_status_t amdsmi_get_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool *enabled)
Get PTL enable/disable state.
amdsmi_status_t amdsmi_set_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool enable)
Set PTL enable/disable state.
amdsmi_status_t amdsmi_set_gpu_ptl_formats(amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t data_format1, amdsmi_ptl_data_format_t data_format2)
Set PTL with specified preferred data formats.
amdsmi_status_t amdsmi_get_gpu_ptl_formats(amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t *data_format1, amdsmi_ptl_data_format_t *data_format2)
Get PTL (Peak Tops Limiter) formats for the processor.
amdsmi_status_t amdsmi_get_gpu_available_counters(amdsmi_processor_handle processor_handle, amdsmi_event_group_t grp, uint32_t *available)
Get the number of currently available counters. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_read_counter(amdsmi_event_handle_t evt_handle, amdsmi_counter_value_t *value)
Read the current value of a performance counter.
amdsmi_status_t amdsmi_gpu_control_counter(amdsmi_event_handle_t evt_handle, amdsmi_counter_command_t cmd, void *cmd_args)
Issue performance counter control commands. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_counter_group_supported(amdsmi_processor_handle processor_handle, amdsmi_event_group_t group)
Tell if an event group is supported by a given device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_destroy_counter(amdsmi_event_handle_t evnt_handle)
Deallocate a performance counter object.
amdsmi_status_t amdsmi_gpu_create_counter(amdsmi_processor_handle processor_handle, amdsmi_event_type_t type, amdsmi_event_handle_t *evnt_handle)
Create a performance counter object.
amdsmi_status_t amdsmi_set_gpu_fan_speed(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t speed)
Set the fan speed for the specified device with the provided speed, in RPMs. It is not supported on v...
amdsmi_status_t amdsmi_reset_gpu_fan(amdsmi_processor_handle processor_handle, uint32_t sensor_ind)
Reset the fan to automatic driver control. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_fan_speed(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed)
Get the fan speed for the specified device as a value relative to the maximum fan speed....
amdsmi_status_t amdsmi_get_gpu_fan_speed_max(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t *max_speed)
Get the max. fan speed of the device with provided processor handle. It is not supported on virtual m...
amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info)
Returns gpu cache info.
amdsmi_status_t amdsmi_get_gpu_fan_rpms(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed)
Get the fan speed in RPMs of the device with the specified processor handle and 0-based sensor index....
amdsmi_status_t amdsmi_get_gpu_volt_metric(amdsmi_processor_handle processor_handle, amdsmi_voltage_type_t sensor_type, amdsmi_voltage_metric_t metric, int64_t *voltage)
Get the voltage metric value for the specified metric, from the specified voltage sensor on the speci...
amdsmi_status_t amdsmi_get_energy_count(amdsmi_processor_handle processor_handle, uint64_t *energy_accumulator, float *counter_resolution, uint64_t *timestamp)
Get the energy accumulator counter of the processor with provided processor handle....
amdsmi_status_t amdsmi_get_processor_info(amdsmi_processor_handle processor_handle, size_t len, char *name)
Get information about the given processor.
amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)
Get the list of the processor handles associated to a socket.
amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, amdsmi_processor_type_t *processor_type)
Get the processor type of the processor_handle.
amdsmi_status_t amdsmi_get_processor_handles_by_type(amdsmi_socket_handle socket_handle, amdsmi_processor_type_t processor_type, amdsmi_processor_handle *processor_handles, uint32_t *processor_count)
Returns a list of processor handles of the specified type in the system.
amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the device.
amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name)
Get information about the given socket.
amdsmi_status_t amdsmi_get_node_handle(amdsmi_processor_handle processor_handle, amdsmi_node_handle *node_handle)
Get the node handle associated with processor handle.
amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode)
Returns the virtualization mode for the target device.
amdsmi_status_t amdsmi_get_gpu_enumeration_info(amdsmi_processor_handle processor_handle, amdsmi_enumeration_info_t *info)
Returns the Enumeration information for the device.
amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles)
Get the list of socket handles in the system.
amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle)
Get processor handle with the matching bdf.
amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given GPU device.
amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope)
Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node...
amdsmi_status_t amdsmi_get_processor_count_from_handles(amdsmi_processor_handle *processor_handles, uint32_t *processor_count, uint32_t *nr_cpusockets, uint32_t *nr_cpucores, uint32_t *nr_gpus)
Get respective processor counts from the processor handles.
amdsmi_status_t amdsmi_get_gpu_process_list(amdsmi_processor_handle processor_handle, uint32_t *max_processes, amdsmi_proc_info_t *list)
Returns the list of process information running on a given GPU. If pdh.dll is not present on the syst...
amdsmi_status_t amdsmi_get_gpu_process_list_by_pid(amdsmi_processor_handle *processor_handles, uint32_t num_processors, amdsmi_proc_info_by_pid_t *procs, uint32_t *max_processes)
Get the list of processes running on one or more GPUs, grouped by PID.
amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids)
Get the AFIDs from CPER buffer.
amdsmi_status_t amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)
Retrieve CPER entries cached in the driver.
amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature)
Returns RAS features info.
amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info)
Returns the driver version information.
amdsmi_status_t amdsmi_get_gpu_compute_process_info(amdsmi_process_info_t *procs, uint32_t *num_items)
Get process information about processes currently using GPU.
amdsmi_status_t amdsmi_get_gpu_compute_process_info_by_pid(uint32_t pid, amdsmi_process_info_t *proc)
Get process information about a specific process.
amdsmi_status_t amdsmi_get_gpu_compute_process_gpus(uint32_t pid, uint32_t *dv_indices, uint32_t *num_devices)
Get the device indices currently being used by a process.
amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version)
Get the build version information for the currently running build of AMDSMI.
amdsmi_status_t amdsmi_get_gpu_xgmi_link_status(amdsmi_processor_handle processor_handle, amdsmi_xgmi_link_status_t *link_status)
Get the XGMI link status.
amdsmi_status_t amdsmi_gpu_xgmi_error_status(amdsmi_processor_handle processor_handle, amdsmi_xgmi_status_t *status)
Retrieve the XGMI error status for a device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_reset_gpu_xgmi_error(amdsmi_processor_handle processor_handle)
Reset the XGMI error status for a device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_xgmi_info(amdsmi_processor_handle processor_handle, amdsmi_xgmi_info_t *info)
Returns XGMI information for the GPU.
Structure holds the gpu metrics table header for a device.
Definition amdsmi.h:2114
Accelerator Partition Profile Configurations.
Definition amdsmi.h:1237
Accelerator Partition Resource Profile.
Definition amdsmi.h:1207
Accelerator Partition Resources. This struct is used to identify various partition resource profiles.
Definition amdsmi.h:1224
Definition amdsmi.h:5952
Definition amdsmi.h:5931
DIMM temperature(°C) and update rate(ms) and dimm address.
Definition amdsmi.h:2764
max and min LCLK DPM level on a given NBIO ID. Valid max and min DPM level values are 0 - 1.
Definition amdsmi.h:2802
Engine Usage amdsmi_engine_usage_t: This structure holds common GPU activity values seen in both BM o...
Definition amdsmi.h:1392
Event notification data returned from event notification API.
Definition amdsmi.h:1651
Definition amdsmi.h:5745
Definition amdsmi.h:5554
This structure holds 2 amdsmi_range_t's, one for frequency and one for voltage. These 2 ranges indica...
Definition amdsmi.h:2075
This structure holds information about clock frequencies.
Definition amdsmi.h:1995
Ras policy info structure for storing version and different ras policy version structures.
Definition amdsmi.h:1845
The following structures hold the gpu statistics for a device.
Definition amdsmi.h:2129
This structure holds HSMP Driver version information.
Definition amdsmi.h:318
HSMP Metrics table (supported only with hsmp proto version 6).
Definition amdsmi.h:2812
LINK name and Bandwidth type Information.It contains link names i.e valid link names are "P0",...
Definition amdsmi.h:2791
Memory Partition Configuration. This structure is used to identify various memory partition configura...
Definition amdsmi.h:1190
This structure represents a point on the frequency-voltage plane.
Definition amdsmi.h:2063
OD Vold Curve AMDSMI_NUM_VOLTAGE_CURVE_POINTS number of amdsmi_od_vddc_point_t's.
Definition amdsmi.h:2086
This structure holds the frequency-voltage values for a device.
Definition amdsmi.h:2096
This structure holds information about the possible PCIe bandwidths. Specifically,...
Definition amdsmi.h:2041
This structure contains information about which power profiles are supported by the system for a give...
Definition amdsmi.h:1984
Process info aggregated across all GPUs, keyed by PID.
Definition amdsmi.h:1463
This structure contains information specific to a process. Sum of the process memory is not expected ...
Definition amdsmi.h:2627
This structure represents a range (e.g., frequencies or voltages).
Definition amdsmi.h:809
This structure holds SMU Firmware version information.
Definition amdsmi.h:2720
temperature range and refresh rate metrics of a DIMM
Definition amdsmi.h:2743
Definition amdsmi.h:9479
Definition amdsmi.h:9467
Definition amdsmi.h:9457
This structure hold violation status information. Note: for MI3x asics and higher,...
Definition amdsmi.h:845
Definition amdsmi.h:5942
◆ AMDSMI_LIB_VERSION_STRING
| #define AMDSMI_LIB_VERSION_STRING |
Value:
AMDSMI_LIB_VERSION_EXPAND_PARTS(AMDSMI_LIB_VERSION_MAJOR, AMDSMI_LIB_VERSION_MINOR, \
#define AMDSMI_LIB_VERSION_MINOR
Minor version should be updated for each API change, but without changing headers.
Definition amdsmi.h:246
◆ AMDSMI_PF_INDEX
| #define AMDSMI_PF_INDEX (AMDSMI_MAX_VF_COUNT - 1) |
◆ AMDSMI_MAX_DRIVER_INFO_RSVD
◆ AMDSMI_MAX_SPD_DIMM_ADDRESS
| #define AMDSMI_MAX_SPD_DIMM_ADDRESS 0xFF |
◆ AMDSMI_MAX_SPD_LID
| #define AMDSMI_MAX_SPD_LID 0xF |
◆ AMDSMI_MAX_SPD_REG_OFFSET
| #define AMDSMI_MAX_SPD_REG_OFFSET 0x7FF |
◆ AMDSMI_MAX_SPD_REG_SPACE
| #define AMDSMI_MAX_SPD_REG_SPACE 0x1 |
◆ AMDSMI_MAX_SPD_WRITE_DATA
| #define AMDSMI_MAX_SPD_WRITE_DATA 0xFF |
◆ MAX_SVI3_RAIL_INDEX
◆ MAX_SVI3_RAIL_SELECTION
| #define MAX_SVI3_RAIL_SELECTION 1 |
◆ POWER_EFFICIENCY_MODE_4
| #define POWER_EFFICIENCY_MODE_4 0x4 |
◆ POWER_EFFICIENCY_MODE_5
| #define POWER_EFFICIENCY_MODE_5 0x5 |
◆ AMDSMI_MAX_POWER_EFFICIENCY_UTIL
| #define AMDSMI_MAX_POWER_EFFICIENCY_UTIL 0x7F |
◆ AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT
| #define AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT 0x1FFFFF |
◆ AMDSMI_RAIL_INDEX_NONE
| #define AMDSMI_RAIL_INDEX_NONE 0xFFFFFFFF |
◆ AMDSMI_MAX_NUM_FREQUENCIES
| #define AMDSMI_MAX_NUM_FREQUENCIES 33 |
◆ AMDSMI_MAX_FAN_SPEED
| #define AMDSMI_MAX_FAN_SPEED 255 |
Maximum possible value for fan speed for legacy hwmon GPUs. For GPUs with the gpu_od sysfs interface, use amdsmi_get_gpu_fan_speed_max() to query the actual maximum.
◆ AMDSMI_NUM_VOLTAGE_CURVE_POINTS
| #define AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3 |
◆ AMDSMI_EVENT_MASK_FROM_INDEX
| #define AMDSMI_EVENT_MASK_FROM_INDEX | ( | i | ) | (1ULL << ((i) - 1)) |
◆ AMDSMI_MAX_UTILIZATION_VALUES
| #define AMDSMI_MAX_UTILIZATION_VALUES 4 |
◆ AMDSMI_MAX_NUM_PM_POLICIES
| #define AMDSMI_MAX_NUM_PM_POLICIES 32 |
◆ AMDSMI_MAX_NIC_PORTS
| #define AMDSMI_MAX_NIC_PORTS 32 |
◆ AMDSMI_MAX_NIC_RDMA_DEV
| #define AMDSMI_MAX_NIC_RDMA_DEV 32 |
◆ AMDSMI_MAX_NIC_FW
| #define AMDSMI_MAX_NIC_FW 16 |
Typedef Documentation
◆ amdsmi_processor_handle
| typedef void* amdsmi_processor_handle |
◆ amdsmi_socket_handle
◆ amdsmi_node_handle
| typedef void* amdsmi_node_handle |
◆ amdsmi_cpusocket_handle
| typedef void* amdsmi_cpusocket_handle |
◆ processor_type_t
Backward-compatibility alias for amdsmi_processor_type_t.
The unprefixed processor_type_t name is preserved for source-compatibility with callers written before the type was renamed. New code should use amdsmi_processor_type_t, which follows the amdsmi_ typedef prefix convention used throughout this header and is less likely to collide with identifiers defined by other system-management libraries.
◆ amdsmi_process_handle_t
| typedef uint32_t amdsmi_process_handle_t |
◆ amdsmi_event_handle_t
| typedef uintptr_t amdsmi_event_handle_t |
◆ amdsmi_bit_field_t
| typedef uint64_t amdsmi_bit_field_t |
Enumeration Type Documentation
◆ amdsmi_init_flags_t
| enum amdsmi_init_flags_t |
Initialization flags.
Initialization flags may be OR'd together and passed to amdsmi_init().
Definition at line 48 of file amdsmi.h.
48 {
49 AMDSMI_INIT_ALL_PROCESSORS = 0xFFFFFFFF,
50 AMDSMI_INIT_AMD_CPUS = (1 << 0),
51 AMDSMI_INIT_AMD_GPUS = (1 << 1),
52 AMDSMI_INIT_NON_AMD_CPUS = (1 << 2),
53 AMDSMI_INIT_NON_AMD_GPUS = (1 << 3),
56 AMDSMI_INIT_AMD_NICS = (1 << 4)
57} amdsmi_init_flags_t;
◆ amdsmi_mm_ip_t
| enum amdsmi_mm_ip_t |
GPU Capability info.
| Enumerator | |
|---|---|
| AMDSMI_MM_UVD | Multi-Media Unified Video Decoder. |
| AMDSMI_MM_VCE | Multi-Media Video Coding Engine. |
| AMDSMI_MM_VCN | Multi-Media Video Core Next. |
Definition at line 272 of file amdsmi.h.
272 {
273 AMDSMI_MM_UVD,
274 AMDSMI_MM_VCE,
275 AMDSMI_MM_VCN,
276 AMDSMI_MM__MAX
277} amdsmi_mm_ip_t;
◆ amdsmi_container_types_t
◆ amdsmi_processor_type_t
Processor types detectable by AMD SMI.
◆ amdsmi_status_t
| enum amdsmi_status_t |
Error codes returned by amdsmi functions.
Please avoid status codes that are multiples of 256 (256, 512, etc..) Return values in the shell get modulo 256 applied, meaning any multiple of 256 ends up as 0
Definition at line 381 of file amdsmi.h.
381 {
382 AMDSMI_STATUS_SUCCESS = 0,
383 // Library usage errors
384 AMDSMI_STATUS_INVAL = 1,
385 AMDSMI_STATUS_NOT_SUPPORTED = 2,
386 AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,
387 AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,
388 AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,
389 AMDSMI_STATUS_DRM_ERROR = 6,
390 AMDSMI_STATUS_API_FAILED = 7,
391 AMDSMI_STATUS_TIMEOUT = 8,
392 AMDSMI_STATUS_RETRY = 9,
393 AMDSMI_STATUS_NO_PERM = 10,
394 AMDSMI_STATUS_INTERRUPT = 11,
395 AMDSMI_STATUS_IO = 12,
396 AMDSMI_STATUS_ADDRESS_FAULT = 13,
397 AMDSMI_STATUS_FILE_ERROR = 14,
398 AMDSMI_STATUS_OUT_OF_RESOURCES = 15,
399 AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,
400 AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,
401 AMDSMI_STATUS_INIT_ERROR = 18,
402 AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,
403 AMDSMI_STATUS_DIRECTORY_NOT_FOUND = 20,
404 AMDSMI_STATUS_IPC_ERROR = 21,
405 // Processor related errors
406 AMDSMI_STATUS_BUSY = 30,
407 AMDSMI_STATUS_NOT_FOUND = 31,
408 AMDSMI_STATUS_NOT_INIT = 32,
409 AMDSMI_STATUS_NO_SLOT = 33,
410 AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,
411 // Data and size errors
412 AMDSMI_STATUS_MORE_DATA = 39,
413 AMDSMI_STATUS_NO_DATA = 40,
414 AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,
415 AMDSMI_STATUS_UNEXPECTED_SIZE = 42,
416 AMDSMI_STATUS_UNEXPECTED_DATA = 43,
417 // esmi errors
418 AMDSMI_STATUS_NON_AMD_CPU = 44,
419 AMDSMI_STATUS_NO_ENERGY_DRV = 45,
420 AMDSMI_STATUS_NO_MSR_DRV = 46,
421 AMDSMI_STATUS_NO_HSMP_DRV = 47,
422 AMDSMI_STATUS_NO_HSMP_SUP = 48,
423 AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,
424 AMDSMI_STATUS_HSMP_TIMEOUT = 50,
425 AMDSMI_STATUS_NO_DRV = 51,
426 AMDSMI_STATUS_FILE_NOT_FOUND = 52,
427 AMDSMI_STATUS_ARG_PTR_NULL = 53,
428 AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,
429 AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,
430 AMDSMI_STATUS_CORRUPTED_EEPROM = 56,
431 // General errors
432 AMDSMI_STATUS_MAP_ERROR = 0xFFFFFFFE,
433 AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF
434} amdsmi_status_t;
◆ amdsmi_clk_type_t
| enum amdsmi_clk_type_t |
Clock types.
Definition at line 441 of file amdsmi.h.
441 {
442 AMDSMI_CLK_TYPE_SYS = 0x0,
443 AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,
445 AMDSMI_CLK_TYPE_DF,
447 AMDSMI_CLK_TYPE_DCEF,
449 AMDSMI_CLK_TYPE_SOC,
450 AMDSMI_CLK_TYPE_MEM,
451 AMDSMI_CLK_TYPE_PCIE,
456 AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1
457} amdsmi_clk_type_t;
◆ amdsmi_accelerator_partition_type_t
Accelerator Partition.
◆ amdsmi_accelerator_partition_resource_type_t
Accelerator Partition Resource Types.
Definition at line 484 of file amdsmi.h.
484 {
490 AMDSMI_ACCELERATOR_MAX
◆ amdsmi_compute_partition_type_t
Compute Partition. This enum is used to identify various compute partitioning settings.
Definition at line 499 of file amdsmi.h.
499 {
500 AMDSMI_COMPUTE_PARTITION_INVALID = 0,
◆ amdsmi_compute_partition_mem_alloc_mode_t
Compute Partition Memory Allocation Mode. Controls how GPU memory is allocated across XCPs within a memory partition.
◆ amdsmi_memory_partition_type_t
Memory Partitions.
Definition at line 531 of file amdsmi.h.
531 {
532 AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
533 AMDSMI_MEMORY_PARTITION_NPS1 = 1,
535 AMDSMI_MEMORY_PARTITION_NPS2 = 2,
538 AMDSMI_MEMORY_PARTITION_NPS4 = 4,
541 AMDSMI_MEMORY_PARTITION_NPS8 = 8,
◆ amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the processor a temperature reading should be obtained.
Definition at line 554 of file amdsmi.h.
554 {
556 AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
565
566 // GPU Board Node temperature
567 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST = 100,
569 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST,
578 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_LAST = 149,
579
580 // GPU Board VR (Voltage Regulator) temperature
581 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST = 150,
583 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST,
623 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_LAST = 199,
626
627 // Baseboard System temperature
628 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST = 200,
630 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST,
663 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST = 249,
665 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST
◆ amdsmi_fw_block_t
| enum amdsmi_fw_block_t |
The values of this enum are used to identify the various firmware blocks.
Definition at line 674 of file amdsmi.h.
674 {
675 AMDSMI_FW_ID_SMU = 1,
677 AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
678 AMDSMI_FW_ID_CP_CE,
679 AMDSMI_FW_ID_CP_PFP,
680 AMDSMI_FW_ID_CP_ME,
685 AMDSMI_FW_ID_CP_MEC1,
687 AMDSMI_FW_ID_CP_MEC2,
689 AMDSMI_FW_ID_RLC,
690 AMDSMI_FW_ID_SDMA0,
691 AMDSMI_FW_ID_SDMA1,
692 AMDSMI_FW_ID_SDMA2,
693 AMDSMI_FW_ID_SDMA3,
694 AMDSMI_FW_ID_SDMA4,
695 AMDSMI_FW_ID_SDMA5,
696 AMDSMI_FW_ID_SDMA6,
697 AMDSMI_FW_ID_SDMA7,
698 AMDSMI_FW_ID_VCN,
699 AMDSMI_FW_ID_UVD,
700 AMDSMI_FW_ID_VCE,
701 AMDSMI_FW_ID_ISP,
710 AMDSMI_FW_ID_RLC_V,
711 AMDSMI_FW_ID_MMSCH,
714 AMDSMI_FW_ID_PSP_TOC,
716 AMDSMI_FW_ID_DFC,
717 AMDSMI_FW_ID_PSP_SPL,
718 AMDSMI_FW_ID_DRV_CAP,
719 AMDSMI_FW_ID_MC,
720 AMDSMI_FW_ID_PSP_BL,
721 AMDSMI_FW_ID_CP_PM4,
722 AMDSMI_FW_ID_RLC_P,
729 AMDSMI_FW_ID_CP_MES,
730 AMDSMI_FW_ID_MES_KIQ,
734 AMDSMI_FW_ID_RLX6,
736 AMDSMI_FW_ID_RS64_ME,
753 AMDSMI_FW_ID_PPTABLE,
754 AMDSMI_FW_ID_PSP_SOC,
755 AMDSMI_FW_ID_PSP_DBG,
761 AMDSMI_FW_ID_ASD,
762 AMDSMI_FW_ID_TA_RAS,
763 AMDSMI_FW_ID_TA_XGMI,
766 AMDSMI_FW_ID_PM,
767 AMDSMI_FW_ID_DMCU,
769 AMDSMI_FW_ID__MAX
770} amdsmi_fw_block_t;
◆ amdsmi_vram_type_t
| enum amdsmi_vram_type_t |
vRam Types. This enum is used to identify various VRam types.
Definition at line 777 of file amdsmi.h.
777 {
778 AMDSMI_VRAM_TYPE_UNKNOWN = 0,
779 // HBM
780 AMDSMI_VRAM_TYPE_HBM = 1,
781 AMDSMI_VRAM_TYPE_HBM2 = 2,
782 AMDSMI_VRAM_TYPE_HBM2E = 3,
783 AMDSMI_VRAM_TYPE_HBM3 = 4,
784 AMDSMI_VRAM_TYPE_HBM3E = 5,
785 // DDR
786 AMDSMI_VRAM_TYPE_DDR2 = 10,
787 AMDSMI_VRAM_TYPE_DDR3 = 11,
788 AMDSMI_VRAM_TYPE_DDR4 = 12,
789 AMDSMI_VRAM_TYPE_DDR5 = 13,
790 // GDDR
791 AMDSMI_VRAM_TYPE_GDDR1 = 17,
792 AMDSMI_VRAM_TYPE_GDDR2 = 18,
793 AMDSMI_VRAM_TYPE_GDDR3 = 19,
794 AMDSMI_VRAM_TYPE_GDDR4 = 20,
795 AMDSMI_VRAM_TYPE_GDDR5 = 21,
796 AMDSMI_VRAM_TYPE_GDDR6 = 22,
797 AMDSMI_VRAM_TYPE_GDDR7 = 23,
798 // LPDDR
799 AMDSMI_VRAM_TYPE_LPDDR4 = 30,
800 AMDSMI_VRAM_TYPE_LPDDR5 = 31,
801 AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_LPDDR5
802} amdsmi_vram_type_t;
◆ amdsmi_card_form_factor_t
Card Form Factor.
Definition at line 1011 of file amdsmi.h.
1011 {
1016} amdsmi_card_form_factor_t;
◆ amdsmi_power_cap_type_t
Power Cap Package Power Tracking (PPT) type.
| Enumerator | |
|---|---|
| AMDSMI_POWER_CAP_TYPE_PPT0 | PPT0 power cap; lower limit, filtered input. |
| AMDSMI_POWER_CAP_TYPE_PPT1 | PPT1 power cap; higher limit, raw input. |
Definition at line 1069 of file amdsmi.h.
1069 {
1072} amdsmi_power_cap_type_t;
◆ amdsmi_cache_property_type_t
cache properties
Definition at line 1093 of file amdsmi.h.
1093 {
1094 AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,
1095 AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,
1096 AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,
1097 AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,
1098 AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010
1099} amdsmi_cache_property_type_t;
◆ amdsmi_link_type_t
| enum amdsmi_link_type_t |
Link type.
Definition at line 1252 of file amdsmi.h.
1252 {
1253 AMDSMI_LINK_TYPE_INTERNAL = 0,
1254 AMDSMI_LINK_TYPE_PCIE = 1,
1255 AMDSMI_LINK_TYPE_XGMI = 2,
1256 AMDSMI_LINK_TYPE_NOT_APPLICABLE = 3,
1257 AMDSMI_LINK_TYPE_UNKNOWN = 4,
1258 AMDSMI_LINK_TYPE_NUMA = 5,
1260 AMDSMI_LINK_TYPE_XNUMA =
1261 6
1262} amdsmi_link_type_t;
◆ amdsmi_link_status_t
| enum amdsmi_link_status_t |
Link Status.
Definition at line 1282 of file amdsmi.h.
1282 {
1283 AMDSMI_LINK_STATUS_ENABLED = 0,
1284 AMDSMI_LINK_STATUS_DISABLED = 1,
1285 AMDSMI_LINK_STATUS_INACTIVE = 2,
1286 AMDSMI_LINK_STATUS_ERROR = 3
1287} amdsmi_link_status_t;
◆ amdsmi_dev_perf_level_t
PowerPlay performance levels.
Definition at line 1503 of file amdsmi.h.
1503 {
1504 AMDSMI_DEV_PERF_LEVEL_AUTO = 0,
1505 AMDSMI_DEV_PERF_LEVEL_FIRST = AMDSMI_DEV_PERF_LEVEL_AUTO,
1515 AMDSMI_DEV_PERF_LEVEL_LAST = AMDSMI_DEV_PERF_LEVEL_DETERMINISM,
1516 AMDSMI_DEV_PERF_LEVEL_UNKNOWN = 0x100
1517} amdsmi_dev_perf_level_t;
◆ amdsmi_event_group_t
| enum amdsmi_event_group_t |
Event Groups Enum denoting an event group. The value of the enum is the base value for all the event enums in the group.
| Enumerator | |
|---|---|
| AMDSMI_EVNT_GRP_XGMI | Data Fabric (XGMI) related events. |
| AMDSMI_EVNT_GRP_XGMI_DATA_OUT | XGMI Outbound data. |
| AMDSMI_EVNT_GRP_INVALID | Unknown Event Group. |
Definition at line 1533 of file amdsmi.h.
1533 {
1534 AMDSMI_EVNT_GRP_XGMI = 0,
1535 AMDSMI_EVNT_GRP_XGMI_DATA_OUT = 10,
1536 AMDSMI_EVNT_GRP_INVALID = 0xFFFFFFFF
1537} amdsmi_event_group_t;
◆ amdsmi_event_type_t
| enum amdsmi_event_type_t |
Event types Event type enum. Events belonging to a particular event group amdsmi_event_group_t should begin enumerating at the amdsmi_event_group_t value for that group.
Data beats sent to neighbor 0; Each beat represents 32 bytes.
XGMI throughput can be calculated by multiplying a BEATs event such as AMDSMI_EVNT_XGMI_0_BEATS_TX by 32 and dividing by the time for which event collection occurred, amdsmi_counter_value_t.time_running (which is in nanoseconds). To get bytes per second, multiply this value by 109.
Throughput = BEATS/time_running * 109 (bytes/second)
Events in the AMDSMI_EVNT_GRP_XGMI_DATA_OUT group measure the number of beats sent on an XGMI link. Each beat represents 32 bytes. AMDSMI_EVNT_XGMI_DATA_OUT_n represents the number of outbound beats (each representing 32 bytes) on link n.
XGMI throughput can be calculated by multiplying a event such as ::AMDSMI_EVNT_XGMI_DATA_OUT_n by 32 and dividing by the time for which event collection occurred, amdsmi_counter_value_t.time_running (which is in nanoseconds). To get bytes per second, multiply this value by 109.
Definition at line 1569 of file amdsmi.h.
1569 {
1570 AMDSMI_EVNT_FIRST = AMDSMI_EVNT_GRP_XGMI,
1571
1572 AMDSMI_EVNT_XGMI_FIRST = AMDSMI_EVNT_GRP_XGMI,
1573 AMDSMI_EVNT_XGMI_0_NOP_TX = AMDSMI_EVNT_XGMI_FIRST,
1581 AMDSMI_EVNT_XGMI_LAST = AMDSMI_EVNT_XGMI_1_BEATS_TX,
1582 AMDSMI_EVNT_XGMI_DATA_OUT_FIRST = AMDSMI_EVNT_GRP_XGMI_DATA_OUT,
1583 AMDSMI_EVNT_XGMI_DATA_OUT_0 = AMDSMI_EVNT_XGMI_DATA_OUT_FIRST,
1589 AMDSMI_EVNT_XGMI_DATA_OUT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_5,
1590 AMDSMI_EVNT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_LAST
1591} amdsmi_event_type_t;
◆ amdsmi_counter_command_t
◆ amdsmi_evt_notification_type_t
Event notification event types.
Definition at line 1620 of file amdsmi.h.
1620 {
1621 AMDSMI_EVT_NOTIF_NONE = 0,
1622 AMDSMI_EVT_NOTIF_VMFAULT = 1,
1623 AMDSMI_EVT_NOTIF_FIRST = AMDSMI_EVT_NOTIF_VMFAULT,
1624 AMDSMI_EVT_NOTIF_THERMAL_THROTTLE = 2,
1625 AMDSMI_EVT_NOTIF_GPU_PRE_RESET = 3,
1626 AMDSMI_EVT_NOTIF_GPU_POST_RESET = 4,
1627 AMDSMI_EVT_NOTIF_MIGRATE_START = 5,
1628 AMDSMI_EVT_NOTIF_MIGRATE_END = 6,
1629 AMDSMI_EVT_NOTIF_PAGE_FAULT_START = 7,
1630 AMDSMI_EVT_NOTIF_PAGE_FAULT_END = 8,
1631 AMDSMI_EVT_NOTIF_QUEUE_EVICTION = 9,
1632 AMDSMI_EVT_NOTIF_QUEUE_RESTORE = 10,
1633 AMDSMI_EVT_NOTIF_UNMAP_FROM_GPU = 11,
1634 AMDSMI_EVT_NOTIF_PROCESS_START = 12,
1635 AMDSMI_EVT_NOTIF_PROCESS_END = 13,
1636 AMDSMI_EVT_NOTIF_LAST = AMDSMI_EVT_NOTIF_PROCESS_END
◆ amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values will be in Celsius.
Definition at line 1663 of file amdsmi.h.
1663 {
1664 AMDSMI_TEMP_CURRENT = 0x0,
1665 AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,
1666 AMDSMI_TEMP_MAX,
1667 AMDSMI_TEMP_MIN,
1668 AMDSMI_TEMP_MAX_HYST,
1670 AMDSMI_TEMP_MIN_HYST,
1672 AMDSMI_TEMP_CRITICAL,
1676 AMDSMI_TEMP_EMERGENCY,
1682 AMDSMI_TEMP_CRIT_MIN,
1686 AMDSMI_TEMP_OFFSET,
1688 AMDSMI_TEMP_LOWEST,
1689 AMDSMI_TEMP_HIGHEST,
1690 AMDSMI_TEMP_SHUTDOWN,
1691 AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN
1692} amdsmi_temperature_metric_t;
◆ amdsmi_voltage_metric_t
Voltage Metrics. This enum is used to identify various Voltage metrics. Corresponding values will be in millivolt.
Definition at line 1700 of file amdsmi.h.
1700 {
1701 AMDSMI_VOLT_CURRENT = 0x0,
1702
1703 AMDSMI_VOLT_FIRST = AMDSMI_VOLT_CURRENT,
1704 AMDSMI_VOLT_MAX,
1705 AMDSMI_VOLT_MIN_CRIT,
1706 AMDSMI_VOLT_MIN,
1707 AMDSMI_VOLT_MAX_CRIT,
1708 AMDSMI_VOLT_AVERAGE,
1709 AMDSMI_VOLT_LOWEST,
1710 AMDSMI_VOLT_HIGHEST,
1711
1712 AMDSMI_VOLT_LAST = AMDSMI_VOLT_HIGHEST
1713} amdsmi_voltage_metric_t;
◆ amdsmi_voltage_type_t
This ennumeration is used to indicate which type of voltage reading should be obtained.
| Enumerator | |
|---|---|
| AMDSMI_VOLT_TYPE_VDDGFX | Vddgfx GPU voltage. |
| AMDSMI_VOLT_TYPE_VDDBOARD | Voltage for VDDBOARD. |
| AMDSMI_VOLT_TYPE_INVALID | Invalid type. |
Definition at line 1721 of file amdsmi.h.
1721 {
1722 AMDSMI_VOLT_TYPE_FIRST = 0,
1723
1724 AMDSMI_VOLT_TYPE_VDDGFX = AMDSMI_VOLT_TYPE_FIRST,
1726 AMDSMI_VOLT_TYPE_LAST = AMDSMI_VOLT_TYPE_VDDBOARD,
1727 AMDSMI_VOLT_TYPE_INVALID = 0xFFFFFFFF
1728} amdsmi_voltage_type_t;
◆ amdsmi_power_profile_preset_masks_t
Pre-set Profile Selections. These bitmasks can be AND'd with the amdsmi_power_profile_status_t.available_profiles returned from :: amdsmi_get_gpu_power_profile_presets to determine which power profiles are supported by the system.
Definition at line 1738 of file amdsmi.h.
1738 {
1739 AMDSMI_PWR_PROF_PRST_CUSTOM_MASK = 0x1,
1740 AMDSMI_PWR_PROF_PRST_VIDEO_MASK = 0x2,
1741 AMDSMI_PWR_PROF_PRST_POWER_SAVING_MASK = 0x4,
1742 AMDSMI_PWR_PROF_PRST_COMPUTE_MASK = 0x8,
1743 AMDSMI_PWR_PROF_PRST_VR_MASK = 0x10,
1744
1745 // 3D Full Screen Power Profile
1746 AMDSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK = 0x20,
1747 AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT = 0x40,
1748 AMDSMI_PWR_PROF_PRST_LAST = AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT,
1749
1750 // Invalid power profile
1751 AMDSMI_PWR_PROF_PRST_INVALID = 0xFFFFFFFFFFFFFFFF
◆ amdsmi_gpu_block_t
| enum amdsmi_gpu_block_t |
This enum is used to identify different GPU blocks.
Definition at line 1759 of file amdsmi.h.
1759 {
1760 AMDSMI_GPU_BLOCK_INVALID = 0,
1761 AMDSMI_GPU_BLOCK_FIRST = (1ULL << 0),
1762 AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
1763 AMDSMI_GPU_BLOCK_SDMA = (1ULL << 1),
1764 AMDSMI_GPU_BLOCK_GFX = (1ULL << 2),
1765 AMDSMI_GPU_BLOCK_MMHUB = (1ULL << 3),
1766 AMDSMI_GPU_BLOCK_ATHUB = (1ULL << 4),
1767 AMDSMI_GPU_BLOCK_PCIE_BIF = (1ULL << 5),
1768 AMDSMI_GPU_BLOCK_HDP = (1ULL << 6),
1769 AMDSMI_GPU_BLOCK_XGMI_WAFL = (1ULL << 7),
1770 AMDSMI_GPU_BLOCK_DF = (1ULL << 8),
1771 AMDSMI_GPU_BLOCK_SMN = (1ULL << 9),
1772 AMDSMI_GPU_BLOCK_SEM = (1ULL << 10),
1773 AMDSMI_GPU_BLOCK_MP0 = (1ULL << 11),
1774 AMDSMI_GPU_BLOCK_MP1 = (1ULL << 12),
1775 AMDSMI_GPU_BLOCK_FUSE = (1ULL << 13),
1776 AMDSMI_GPU_BLOCK_MCA = (1ULL << 14),
1777 AMDSMI_GPU_BLOCK_VCN = (1ULL << 15),
1778 AMDSMI_GPU_BLOCK_JPEG = (1ULL << 16),
1779 AMDSMI_GPU_BLOCK_IH = (1ULL << 17),
1780 AMDSMI_GPU_BLOCK_MPIO = (1ULL << 18),
1781 AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,
1782 AMDSMI_GPU_BLOCK_RESERVED = (1ULL << 63)
1783} amdsmi_gpu_block_t;
◆ amdsmi_clk_limit_type_t
◆ amdsmi_cper_sev_t
| enum amdsmi_cper_sev_t |
Cper sev.
Definition at line 1800 of file amdsmi.h.
1800 {
1801 AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,
1802 AMDSMI_CPER_SEV_FATAL = 1,
1803 AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,
1804 AMDSMI_CPER_SEV_NUM = 3,
1805 AMDSMI_CPER_SEV_UNUSED = 10
1806} amdsmi_cper_sev_t;
◆ amdsmi_cper_notify_type_t
Cper notify.
Definition at line 1813 of file amdsmi.h.
1813 {
1814 AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,
1815 AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,
1816 AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,
1817 AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,
1818 AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,
1819 AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,
1820 AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,
1821 AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,
1822 AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,
1823 AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,
1824 AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,
1825 AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT = 0x49A341DF69293BC9
1827} amdsmi_cper_notify_type_t;
◆ amdsmi_ras_err_state_t
The current ECC state.
Definition at line 1859 of file amdsmi.h.
1859 {
1860 AMDSMI_RAS_ERR_STATE_NONE = 0,
1868
1869 AMDSMI_RAS_ERR_STATE_LAST = AMDSMI_RAS_ERR_STATE_ENABLED,
1870 AMDSMI_RAS_ERR_STATE_INVALID = 0xFFFFFFFF
1871} amdsmi_ras_err_state_t;
◆ amdsmi_memory_type_t
| enum amdsmi_memory_type_t |
Types of memory.
- Note
- Sum of the process memory is not expected to be the total memory usage.
| Enumerator | |
|---|---|
| AMDSMI_MEM_TYPE_VRAM | VRAM memory. |
| AMDSMI_MEM_TYPE_VIS_VRAM | VRAM memory that is visible. |
| AMDSMI_MEM_TYPE_GTT | GTT memory. |
Definition at line 1880 of file amdsmi.h.
1880 {
1881 AMDSMI_MEM_TYPE_FIRST = 0,
1882
1883 AMDSMI_MEM_TYPE_VRAM = AMDSMI_MEM_TYPE_FIRST,
1884 AMDSMI_MEM_TYPE_VIS_VRAM,
1885 AMDSMI_MEM_TYPE_GTT,
1886
1887 AMDSMI_MEM_TYPE_LAST = AMDSMI_MEM_TYPE_GTT
1888} amdsmi_memory_type_t;
◆ amdsmi_freq_ind_t
| enum amdsmi_freq_ind_t |
The values of this enum are used as frequency identifiers.
| Enumerator | |
|---|---|
| AMDSMI_FREQ_IND_MIN | Index used for the minimum frequency value. |
| AMDSMI_FREQ_IND_MAX | Index used for the maximum frequency value. |
| AMDSMI_FREQ_IND_INVALID | An invalid frequency index. |
Definition at line 1895 of file amdsmi.h.
1895 {
1896 AMDSMI_FREQ_IND_MIN = 0,
1897 AMDSMI_FREQ_IND_MAX = 1,
1898 AMDSMI_FREQ_IND_INVALID = 0xFFFFFFFF
1899} amdsmi_freq_ind_t;
◆ amdsmi_xgmi_status_t
| enum amdsmi_xgmi_status_t |
XGMI Status.
| Enumerator | |
|---|---|
| AMDSMI_XGMI_STATUS_NO_ERRORS | XGMI No Errors. |
| AMDSMI_XGMI_STATUS_ERROR | XGMI Errors. |
| AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS | XGMI Multiple Errors. |
Definition at line 1906 of file amdsmi.h.
1906 {
1907 AMDSMI_XGMI_STATUS_NO_ERRORS = 0,
1908 AMDSMI_XGMI_STATUS_ERROR,
1910} amdsmi_xgmi_status_t;
◆ amdsmi_memory_page_status_t
Reserved Memory Page States.
◆ amdsmi_utilization_counter_type_t
The utilization counter type.
Definition at line 1937 of file amdsmi.h.
1937 {
1938 AMDSMI_UTILIZATION_COUNTER_FIRST = 0,
1943 // Fine grain activity counters
1944 AMDSMI_FINE_GRAIN_GFX_ACTIVITY = 100,
1945 AMDSMI_FINE_GRAIN_MEM_ACTIVITY = 101,
1946 AMDSMI_FINE_DECODER_ACTIVITY = 102,
1947 AMDSMI_UTILIZATION_COUNTER_LAST = AMDSMI_FINE_DECODER_ACTIVITY
◆ amdsmi_xgmi_link_status_type_t
XGMI Link Status Type.
| Enumerator | |
|---|---|
| AMDSMI_XGMI_LINK_DOWN | XGMI link status is down. |
| AMDSMI_XGMI_LINK_UP | XGMI link status is up. |
| AMDSMI_XGMI_LINK_DISABLE | XGMI link status is disabled. |
◆ amdsmi_reg_type_t
| enum amdsmi_reg_type_t |
This register type for register table.
| Enumerator | |
|---|---|
| AMDSMI_REG_XGMI | XGMI registers. |
| AMDSMI_REG_WAFL | WAFL registers. |
| AMDSMI_REG_PCIE | PCIe registers. |
| AMDSMI_REG_USR | Usr registers. |
| AMDSMI_REG_USR1 | Usr1 registers. |
Definition at line 2581 of file amdsmi.h.
2581 {
2582 AMDSMI_REG_XGMI,
2583 AMDSMI_REG_WAFL,
2584 AMDSMI_REG_PCIE,
2585 AMDSMI_REG_USR,
2586 AMDSMI_REG_USR1
2587} amdsmi_reg_type_t;
◆ amdsmi_virtualization_mode_t
Variant placeholder.
Place-holder "variant" for functions that have don't have any variants, but do have monitors or sensors.
◆ amdsmi_affinity_scope_t
Scope for Numa affinity or Socket affinity.
| Enumerator | |
|---|---|
| AMDSMI_AFFINITY_SCOPE_NODE | Memory affinity as numa node. |
| AMDSMI_AFFINITY_SCOPE_SOCKET | socket affinity |
Definition at line 2667 of file amdsmi.h.
2667 {
2670} amdsmi_affinity_scope_t;
◆ amdsmi_npm_status_t
| enum amdsmi_npm_status_t |
◆ amdsmi_ptl_data_format_t
PTL (Peak Tops Limiter) data format types These correspond to the hardware data types used in matrix operations. Only F8 and XF32 are always supported at full performance. From the remaining five types, only two can be supported at peak performance simultaneously.
Definition at line 2702 of file amdsmi.h.
2702 {
2703 AMDSMI_PTL_DATA_FORMAT_I8 = 0x0,
2704 AMDSMI_PTL_DATA_FORMAT_F16 = 0x1,
2705 AMDSMI_PTL_DATA_FORMAT_BF16 = 0x2,
2706 AMDSMI_PTL_DATA_FORMAT_F32 = 0x3,
2707 AMDSMI_PTL_DATA_FORMAT_F64 = 0x4,
2708 AMDSMI_PTL_DATA_FORMAT_F8 = 0x5,
2709 AMDSMI_PTL_DATA_FORMAT_VECTOR = 0x6,
2710 AMDSMI_PTL_DATA_FORMAT_INVALID = 0xFFFFFFFF
2711} amdsmi_ptl_data_format_t;