amdsmi.h File Reference#
amdsmi.h File Reference
AMD System Management Interface API. More...
#include <stdbool.h>#include <stdlib.h>#include <stdint.h>Go to the source code of this file.
Data Structures | |
| struct | amdsmi_hsmp_driver_version_t |
| This structure holds HSMP Driver version information. More... | |
| struct | amdsmi_range_t |
| This structure represents a range (e.g., frequencies or voltages). More... | |
| struct | amdsmi_xgmi_info_t |
| XGMI Information. More... | |
| struct | amdsmi_vram_usage_t |
| VRam Usage. More... | |
| struct | amdsmi_violation_status_t |
| This structure hold violation status information. Note: for MI3x asics and higher, older ASICs will show unsupported. More... | |
| struct | amdsmi_frequency_range_t |
| Frequency Range. More... | |
| union | amdsmi_bdf_t |
| bdf types More... | |
| struct | amdsmi_bdf_t::bdf_ |
| struct | amdsmi_enumeration_info_t |
| Structure holds enumeration information. More... | |
| struct | amdsmi_pcie_info_t |
| pcie information More... | |
| struct | amdsmi_pcie_info_t::pcie_static_ |
| struct | amdsmi_pcie_info_t::pcie_metric_ |
| struct | amdsmi_power_cap_info_t |
| Power Cap Information. More... | |
| struct | amdsmi_vbios_info_t |
| VBios Information. More... | |
| struct | amdsmi_gpu_cache_info_t |
| GPU Cache Information. More... | |
| struct | amdsmi_gpu_cache_info_t::cache_ |
| struct | amdsmi_fw_info_t |
| Firmware Information. More... | |
| struct | amdsmi_fw_info_t::fw_info_list_ |
| struct | amdsmi_asic_info_t |
| ASIC Information. More... | |
| struct | amdsmi_kfd_info_t |
| Structure holds kfd information. More... | |
| union | amdsmi_nps_caps_t |
| This union holds memory partition bitmask. More... | |
| struct | amdsmi_nps_caps_t::nps_flags_ |
| struct | amdsmi_memory_partition_config_t |
| Memory Partition Configuration. This structure is used to identify various memory partition configurations. More... | |
| struct | amdsmi_memory_partition_config_t::numa_range_ |
| struct | amdsmi_accelerator_partition_profile_t |
| Accelerator Partition Resource Profile. More... | |
| struct | amdsmi_accelerator_partition_resource_profile_t |
| Accelerator Partition Resources. This struct is used to identify various partition resource profiles. More... | |
| struct | amdsmi_accelerator_partition_profile_config_t |
| Accelerator Partition Profile Configurations. More... | |
| struct | amdsmi_cpu_util_t |
| This structure holds CPU utilization information. More... | |
| struct | amdsmi_link_metrics_t |
| Link Metrics. More... | |
| struct | amdsmi_link_metrics_t::_links |
| struct | amdsmi_vram_info_t |
| VRam Information. More... | |
| struct | amdsmi_driver_info_t |
| Driver Information. More... | |
| struct | amdsmi_board_info_t |
| Board Information. More... | |
| struct | amdsmi_power_info_t |
| Power Information. More... | |
| struct | amdsmi_clk_info_t |
| Clock Information. More... | |
| struct | amdsmi_engine_usage_t |
| Engine Usage amdsmi_engine_usage_t: This structure holds common GPU activity values seen in both BM or SRIOV. More... | |
| struct | amdsmi_proc_info_t |
| Process Information. More... | |
| struct | amdsmi_proc_info_t::engine_usage_ |
| struct | amdsmi_proc_info_t::memory_usage_ |
| struct | amdsmi_p2p_capability_t |
| IO Link P2P Capability. More... | |
| struct | amdsmi_counter_value_t |
| Counter value. More... | |
| struct | amdsmi_evt_notification_data_t |
| Event notification data returned from event notification API. More... | |
| struct | amdsmi_gpu_ras_policy_v4_0_t |
| Ras policy v4.0. More... | |
| struct | amdsmi_gpu_ras_policy_info_t |
| Ras policy info structure for storing version and different ras policy version structures. More... | |
| union | amdsmi_gpu_ras_policy_info_t::policy_data_ |
| struct | amdsmi_utilization_counter_t |
| The utilization counter data. More... | |
| struct | amdsmi_retired_page_record_t |
| Reserved Memory Page Record. More... | |
| struct | amdsmi_power_profile_status_t |
| This structure contains information about which power profiles are supported by the system for a given device, and which power profile is currently active. More... | |
| struct | amdsmi_frequencies_t |
| This structure holds information about clock frequencies. More... | |
| struct | amdsmi_dpm_policy_entry_t |
| The dpm policy. More... | |
| struct | amdsmi_dpm_policy_t |
| DPM Policy. More... | |
| struct | amdsmi_pcie_bandwidth_t |
| This structure holds information about the possible PCIe bandwidths. Specifically, the possible transfer rates and their associated numbers of lanes are stored here. More... | |
| struct | amdsmi_version_t |
| This structure holds version information. More... | |
| struct | amdsmi_od_vddc_point_t |
| This structure represents a point on the frequency-voltage plane. More... | |
| struct | amdsmi_freq_volt_region_t |
| This structure holds 2 amdsmi_range_t's, one for frequency and one for voltage. These 2 ranges indicate the range of possible values for the corresponding amdsmi_od_vddc_point_t. More... | |
| struct | amdsmi_od_volt_curve_t |
| OD Vold Curve AMDSMI_NUM_VOLTAGE_CURVE_POINTS number of amdsmi_od_vddc_point_t's. More... | |
| struct | amdsmi_od_volt_freq_data_t |
| This structure holds the frequency-voltage values for a device. More... | |
| struct | amd_metrics_table_header_t |
| Structure holds the gpu metrics table header for a device. More... | |
| struct | amdsmi_gpu_xcp_metrics_t |
| The following structures hold the gpu statistics for a device. More... | |
| struct | amdsmi_gpu_metrics_t |
| Structure holds the gpu metrics values for a device. More... | |
| struct | amdsmi_xgmi_link_status_t |
| XGMI Link Status. More... | |
| struct | amdsmi_name_value_t |
| This structure holds the name value pairs. More... | |
| struct | amdsmi_ras_feature_t |
| This structure holds ras feature information. More... | |
| struct | amdsmi_ras_feature_t::ras_info_ |
| struct | amdsmi_error_count_t |
| This structure holds error counts. More... | |
| struct | amdsmi_process_info_t |
| This structure contains information specific to a process. Sum of the process memory is not expected to be the total memory usage. More... | |
| struct | amdsmi_topology_nearest_t |
| Topology Nearest. More... | |
| struct | amdsmi_npm_info_t |
| NPM info. More... | |
| struct | amdsmi_smu_fw_version_t |
| This structure holds SMU Firmware version information. More... | |
| struct | amdsmi_ddr_bw_metrics_t |
| DDR bandwidth metrics. More... | |
| struct | amdsmi_temp_range_refresh_rate_t |
| temperature range and refresh rate metrics of a DIMM More... | |
| struct | amdsmi_dimm_power_t |
| DIMM Power(mW), power update rate(ms) and dimm address. More... | |
| struct | amdsmi_dimm_thermal_t |
| DIMM temperature(°C) and update rate(ms) and dimm address. More... | |
| struct | amdsmi_link_id_bw_type_t |
| LINK name and Bandwidth type Information.It contains link names i.e valid link names are "P0", "P1", "P2", "P3", "P4", "G0", "G1", "G2", "G3", "G4" "G5", "G6", "G7" Valid bandwidth types 1(Aggregate_BW), 2 (Read BW), 4 (Write BW). More... | |
| struct | amdsmi_dpm_level_t |
| max and min LCLK DPM level on a given NBIO ID. Valid max and min DPM level values are 0 - 1. More... | |
| struct | amdsmi_hsmp_metrics_table_t |
| HSMP Metrics table (supported only with hsmp proto version 6). More... | |
| struct | amdsmi_cpu_info_t |
| cpu info data More... | |
| struct | amdsmi_sock_info_t |
| cpu socket info data More... | |
| struct | amdsmi_nic_stat_t |
| Structure for NIC statistic name-value pairs. More... | |
| struct | amdsmi_nic_asic_info_t |
| NIC asic information. More... | |
| struct | amdsmi_nic_bus_info_t |
| NIC bus information. More... | |
| struct | amdsmi_nic_numa_info_t |
| NIC NUMA information. More... | |
| struct | amdsmi_nic_fw_t |
| NIC firmware information. More... | |
| struct | amdsmi_nic_fw_info_t |
| NIC firmware information collection. More... | |
| struct | amdsmi_nic_port_t |
| NIC port information. More... | |
| struct | amdsmi_nic_port_info_t |
| NIC port information collection. More... | |
| struct | amdsmi_nic_driver_info_t |
| NIC driver information. More... | |
| struct | amdsmi_nic_rdma_port_info_t |
| NIC RDMA port information. More... | |
| struct | amdsmi_nic_rdma_dev_info_t |
| NIC RDMA device information. More... | |
| struct | amdsmi_nic_rdma_devices_info_t |
| NIC RDMA devices information collection. More... | |
| struct | amdsmi_cper_guid_t |
| Cper. More... | |
| struct | amdsmi_cper_timestamp_t |
| union | amdsmi_cper_valid_bits_t |
| struct | amdsmi_cper_valid_bits_t::valid_bits_ |
| struct | amdsmi_cper_hdr_t |
| struct | amdsmi_uma_carveout_option_t |
| struct | amdsmi_uma_carveout_info_t |
| struct | amdsmi_ttm_info_t |
Macros | |
| #define | AMDSMI_MAX_MM_IP_COUNT 8 |
| Maximum size definitions. | |
| #define | AMDSMI_MAX_STRING_LENGTH 256 |
| Maximum length for string buffers. | |
| #define | AMDSMI_MAX_DEVICES 32 |
| Maximum number of devices supported. | |
| #define | AMDSMI_MAX_CACHE_TYPES 10 |
| Maximum number of cache types. | |
| #define | AMDSMI_MAX_ACCELERATOR_PROFILE 32 |
| Maximum number of accelerator profiles. | |
| #define | AMDSMI_MAX_CP_PROFILE_RESOURCES 32 |
| Maximum number of compute profile resources. | |
| #define | AMDSMI_MAX_ACCELERATOR_PARTITIONS 8 |
| Maximum number of accelerator partitions. | |
| #define | AMDSMI_MAX_NUM_NUMA_NODES 32 |
| Maximum number of NUMA nodes. | |
| #define | AMDSMI_GPU_UUID_SIZE 38 |
| Size of GPU UUID string. | |
| #define | AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64 |
| Common defines. | |
| #define | AMDSMI_MAX_CONTAINER_TYPE 2 |
| Maximum number of container types. | |
| #define | CENTRIGRADE_TO_MILLI_CENTIGRADE 1000 |
| The following structure holds the gpu metrics values for a device. | |
| #define | AMDSMI_NUM_HBM_INSTANCES 4 |
| This should match NUM_HBM_INSTANCES. | |
| #define | AMDSMI_MAX_NUM_VCN 4 |
| This should match MAX_NUM_VCN. | |
| #define | AMDSMI_MAX_NUM_CLKS 4 |
| This should match MAX_NUM_CLKS. | |
| #define | AMDSMI_MAX_NUM_XGMI_LINKS 8 |
| This should match MAX_NUM_XGMI_LINKS. | |
| #define | AMDSMI_MAX_NUM_GFX_CLKS 8 |
| This should match MAX_NUM_GFX_CLKS. | |
| #define | AMDSMI_MAX_AID 4 |
| This should match AMDSMI_MAX_AID. | |
| #define | AMDSMI_MAX_ENGINES 8 |
| This should match AMDSMI_MAX_ENGINES. | |
| #define | AMDSMI_MAX_NUM_JPEG 32 |
| This should match AMDSMI_MAX_NUM_JPEG (8*4=32) | |
| #define | AMDSMI_MAX_NUM_JPEG_ENG_V1 40 |
| Introduced in gpu metrics v1.8, document presents NUM_JPEG_ENG_V1 but will change to AMDSMI_MAX_NUM_JPEG_ENG_V1 for continuity. | |
| #define | AMDSMI_MAX_NUM_XCC 8 |
| This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units, ACE (Asynchronous Compute Engines), caches, and global resources organized as one unit. | |
| #define | AMDSMI_MAX_NUM_XCP 8 |
| This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Graphics Compute Partitions. Each physical gpu could have a maximum of 8 separate partitions associated with each (depending on ASIC support). | |
| #define | MAX_NUMBER_OF_AFIDS_PER_RECORD 12 |
| Max Number of AFIDs that will be inside one cper entry. | |
| #define | AMDSMI_MAX_VF_COUNT 32 |
| Maximum size definitions AMDSMI. | |
| #define | AMDSMI_MAX_DRIVER_NUM 2 |
| Maximum number of drivers supported. | |
| #define | AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9 |
| Number of DFC firmware entries supported. | |
| #define | AMDSMI_MAX_WHITE_LIST_ELEMENTS 16 |
| Maximum number of white list elements for device access control/*#end#*/. | |
| #define | AMDSMI_MAX_BLACK_LIST_ELEMENTS 64 |
| Maximum number of black list elements for device access control/*#end#*/. | |
| #define | AMDSMI_MAX_UUID_ELEMENTS 16 |
| Maximum number of UUID elements supported. | |
| #define | AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS 8 |
| Maximum number of TA (Trusted Application) white list elements/*#end#*/. | |
| #define | AMDSMI_MAX_ERR_RECORDS 10 |
| Maximum number of error records that can be stored. | |
| #define | AMDSMI_MAX_PROFILE_COUNT 16 |
| Maximum number of profiles supported. | |
| #define | AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d" |
| String format. | |
| #define | AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d" |
| Date format string. | |
| #define | AMDSMI_LIB_VERSION_MAJOR 26 |
| library versioning | |
| #define | AMDSMI_LIB_VERSION_MINOR 4 |
| Minor version should be updated for each API change, but without changing headers. | |
| #define | AMDSMI_LIB_VERSION_RELEASE 0 |
| #define | AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR, MINOR, RELEASE) (#MAJOR "." #MINOR "." #RELEASE) |
| #define | AMDSMI_LIB_VERSION_EXPAND_PARTS(MAJOR_STR, MINOR_STR, RELEASE_STR) AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR_STR, MINOR_STR, RELEASE_STR) |
| #define | AMDSMI_LIB_VERSION_STRING |
| #define | AMDSMI_PF_INDEX (AMDSMI_MAX_VF_COUNT - 1) |
| Maximum size definitions AMDSMI. | |
| #define | AMDSMI_MAX_DRIVER_INFO_RSVD 64 |
| #define | AMDSMI_MAX_SPD_DIMM_ADDRESS 0xFF |
| SPD DIMM register validation limits. | |
| #define | AMDSMI_MAX_SPD_LID 0xF |
| Maximum SPD logical ID [11:8]. | |
| #define | AMDSMI_MAX_SPD_REG_OFFSET 0x7FF |
| Maximum SPD register offset [22:12]. | |
| #define | AMDSMI_MAX_SPD_REG_SPACE 0x1 |
| Maximum SPD register space [23]. | |
| #define | AMDSMI_MAX_SPD_WRITE_DATA 0xFF |
| Maximum SPD write data [31:24]. | |
| #define | MAX_SVI3_RAIL_INDEX 4 |
| #define | MAX_SVI3_RAIL_SELECTION 1 |
| #define | POWER_EFFICIENCY_MODE_4 0x4 |
| #define | POWER_EFFICIENCY_MODE_5 0x5 |
| #define | AMDSMI_MAX_POWER_EFFICIENCY_UTIL 0x7F |
| #define | AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT 0x1FFFFF |
| #define | AMDSMI_RAIL_INDEX_NONE 0xFFFFFFFF |
| #define | AMDSMI_MAX_NUM_FREQUENCIES 33 |
| #define | AMDSMI_MAX_FAN_SPEED 255 |
| #define | AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3 |
| #define | AMDSMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1)) |
| Macro to generate event bitmask from event id. | |
| #define | AMDSMI_MAX_UTILIZATION_VALUES 4 |
| The max number of values per counter type. | |
| #define | AMDSMI_MAX_NUM_PM_POLICIES 32 |
| Maximum number of power management policies. | |
| #define | AMDSMI_MAX_NIC_PORTS 32 |
| Maximum size definitions AMDSMI NIC. | |
| #define | AMDSMI_MAX_NIC_RDMA_DEV 32 |
| Maximum number of NIC RDMA devices. | |
| #define | AMDSMI_MAX_NIC_FW 16 |
| Maximum number of NIC firmwares. | |
| #define | AMDSMI_MAX_CARVEOUT_OPTIONS 16 |
Typedefs | |
| typedef void * | amdsmi_processor_handle |
| opaque handler point to underlying implementation | |
| typedef void * | amdsmi_socket_handle |
| typedef void * | amdsmi_node_handle |
| opaque handler point to underlying implementation | |
| typedef void * | amdsmi_cpusocket_handle |
| opaque handler point to underlying implementation | |
| typedef uint32_t | amdsmi_process_handle_t |
| Process Handle. | |
| typedef uintptr_t | amdsmi_event_handle_t |
| Handle to performance event counter. | |
| typedef uint64_t | amdsmi_bit_field_t |
| Bitfield used in various AMDSMI calls. | |
Functions | |
| amdsmi_status_t | amdsmi_init (uint64_t init_flags) |
| Initialize the AMD SMI library. | |
| amdsmi_status_t | amdsmi_shut_down (void) |
| Shutdown the AMD SMI library. | |
| amdsmi_status_t | amdsmi_get_socket_handles (uint32_t *socket_count, amdsmi_socket_handle *socket_handles) |
| Get the list of socket handles in the system. | |
| amdsmi_status_t | amdsmi_get_cpu_handles (uint32_t *cpu_count, amdsmi_processor_handle *processor_handles) |
| Get the list of cpu handles in the system. | |
| amdsmi_status_t | amdsmi_get_socket_info (amdsmi_socket_handle socket_handle, size_t len, char *name) |
| Get information about the given socket. | |
| amdsmi_status_t | amdsmi_get_processor_info (amdsmi_processor_handle processor_handle, size_t len, char *name) |
| Get information about the given processor. | |
| amdsmi_status_t | amdsmi_get_processor_count_from_handles (amdsmi_processor_handle *processor_handles, uint32_t *processor_count, uint32_t *nr_cpusockets, uint32_t *nr_cpucores, uint32_t *nr_gpus) |
| Get respective processor counts from the processor handles. | |
| amdsmi_status_t | amdsmi_get_processor_handles_by_type (amdsmi_socket_handle socket_handle, processor_type_t processor_type, amdsmi_processor_handle *processor_handles, uint32_t *processor_count) |
| Returns a list of processor handles of the specified type in the system. | |
| amdsmi_status_t | amdsmi_get_processor_handles (amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles) |
| Get the list of the processor handles associated to a socket. | |
| amdsmi_status_t | amdsmi_get_node_handle (amdsmi_processor_handle processor_handle, amdsmi_node_handle *node_handle) |
| Get the node handle associated with processor handle. | |
| amdsmi_status_t | amdsmi_get_cpucore_handles (uint32_t *cores_count, amdsmi_processor_handle *processor_handles) |
| Get the list of the cpu core handles in a system. | |
| amdsmi_status_t | amdsmi_get_processor_type (amdsmi_processor_handle processor_handle, processor_type_t *processor_type) |
| Get the processor type of the processor_handle. | |
| amdsmi_status_t | amdsmi_get_processor_handle_from_bdf (amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle) |
| Get processor handle with the matching bdf. | |
| amdsmi_status_t | amdsmi_get_gpu_device_bdf (amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf) |
| Returns BDF of the given GPU device. | |
| amdsmi_status_t | amdsmi_get_gpu_device_uuid (amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid) |
| Returns the UUID of the device. | |
| amdsmi_status_t | amdsmi_get_gpu_enumeration_info (amdsmi_processor_handle processor_handle, amdsmi_enumeration_info_t *info) |
| Returns the Enumeration information for the device. | |
| amdsmi_status_t | amdsmi_get_cpu_affinity_with_scope (amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope) |
| Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node or socket for the device. | |
| amdsmi_status_t | amdsmi_get_gpu_virtualization_mode (amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode) |
| Returns the virtualization mode for the target device. | |
| amdsmi_status_t | amdsmi_get_gpu_id (amdsmi_processor_handle processor_handle, uint16_t *id) |
| Get the device id associated with the device with provided device handler. | |
| amdsmi_status_t | amdsmi_get_gpu_revision (amdsmi_processor_handle processor_handle, uint16_t *revision) |
| Get the device revision associated with the device. | |
| amdsmi_status_t | amdsmi_get_gpu_vendor_name (amdsmi_processor_handle processor_handle, char *name, size_t len) |
| Get the name string for a give vendor ID. | |
| amdsmi_status_t | amdsmi_get_gpu_vram_vendor (amdsmi_processor_handle processor_handle, char *brand, uint32_t len) |
| Get the vram vendor string of a device. | |
| amdsmi_status_t | amdsmi_get_gpu_subsystem_id (amdsmi_processor_handle processor_handle, uint16_t *id) |
| Get the subsystem device id associated with the device with provided processor handle. | |
| amdsmi_status_t | amdsmi_get_gpu_subsystem_name (amdsmi_processor_handle processor_handle, char *name, size_t len) |
| Get the name string for the device subsystem. | |
| amdsmi_status_t | amdsmi_get_gpu_pci_bandwidth (amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth) |
| Get the list of possible PCIe bandwidths that are available. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_bdf_id (amdsmi_processor_handle processor_handle, uint64_t *bdfid) |
| Get the unique PCI device identifier associated for a device. | |
| amdsmi_status_t | amdsmi_get_gpu_topo_numa_affinity (amdsmi_processor_handle processor_handle, int32_t *numa_node) |
| Get the NUMA node associated with a device. | |
| amdsmi_status_t | amdsmi_get_gpu_pci_throughput (amdsmi_processor_handle processor_handle, uint64_t *sent, uint64_t *received, uint64_t *max_pkt_sz) |
| Get PCIe traffic information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_pci_replay_counter (amdsmi_processor_handle processor_handle, uint64_t *counter) |
| Get PCIe replay counter. | |
| amdsmi_status_t | amdsmi_set_gpu_pci_bandwidth (amdsmi_processor_handle processor_handle, uint64_t bw_bitmask) |
| Control the set of allowed PCIe bandwidths that can be used. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_energy_count (amdsmi_processor_handle processor_handle, uint64_t *energy_accumulator, float *counter_resolution, uint64_t *timestamp) |
| Get the energy accumulator counter of the processor with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_power_cap (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap) |
| Set the maximum gpu power cap value. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_power_profile (amdsmi_processor_handle processor_handle, uint32_t reserved, amdsmi_power_profile_preset_masks_t profile) |
| Set the power performance profile. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_supported_power_cap (amdsmi_processor_handle processor_handle, uint32_t *sensor_count, uint32_t *sensor_inds, amdsmi_power_cap_type_t *sensor_types) |
| Query the supported power cap sensors and their types for a device. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_power (amdsmi_processor_handle processor_handle, double *ppower) |
| Get the socket power. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_power_cap (amdsmi_processor_handle processor_handle, double *pcap) |
| Get the socket power cap. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_power_cap_max (amdsmi_processor_handle processor_handle, double *pmax) |
| Get the maximum power cap value for a given socket. | |
| amdsmi_status_t | amdsmi_get_cpu_pwr_svi_telemetry_all_rails (amdsmi_processor_handle processor_handle, uint32_t *power) |
| Get the SVI based power telemetry for all rails. | |
| amdsmi_status_t | amdsmi_set_cpu_socket_power_cap (amdsmi_processor_handle processor_handle, uint32_t pcap) |
| Set the power cap value for a given socket. | |
| amdsmi_status_t | amdsmi_set_cpu_pwr_efficiency_mode (amdsmi_processor_handle processor_handle, uint8_t power_efficiency_mode, uint32_t *utilization, uint32_t *ppt_limit) |
| Set the power efficiency profile policy. | |
| amdsmi_status_t | amdsmi_get_cpu_pwr_efficiency_mode (amdsmi_processor_handle processor_handle, uint32_t *power_efficiency_mode, uint32_t *utilization, double *ppt_limit) |
| Get the power efficiency profile policy. | |
| amdsmi_status_t | amdsmi_get_cpu_core_ccd_power (amdsmi_processor_handle processor_handle, double *power) |
| Read CCD (Core Complex Die) power consumption. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_total (amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *total) |
| Get the total amount of memory that exists. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_usage (amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *used) |
| Get the current memory usage. | |
| amdsmi_status_t | amdsmi_get_gpu_bad_page_info (amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *info) |
| Get the bad pages of a processor. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_bad_page_threshold (amdsmi_processor_handle processor_handle, uint32_t *threshold) |
| Get the bad pages threshold of a processor. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_gpu_validate_ras_eeprom (amdsmi_processor_handle processor_handle) |
| Verify the checksum of RAS EEPROM. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_ras_block_features_enabled (amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state) |
| Returns if RAS features are enabled or disabled for given block. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_reserved_pages (amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *records) |
| Get information about reserved ("retired") memory pages. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_fan_rpms (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed) |
| Get the fan speed in RPMs of the device with the specified processor handle and 0-based sensor index. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_fan_speed (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed) |
| Get the fan speed for the specified device as a value relative to AMDSMI_MAX_FAN_SPEED. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_fan_speed_max (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t *max_speed) |
| Get the max. fan speed of the device with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_cache_info (amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info) |
| Returns gpu cache info. | |
| amdsmi_status_t | amdsmi_get_gpu_volt_metric (amdsmi_processor_handle processor_handle, amdsmi_voltage_type_t sensor_type, amdsmi_voltage_metric_t metric, int64_t *voltage) |
| Get the voltage metric value for the specified metric, from the specified voltage sensor on the specified device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_reset_gpu_fan (amdsmi_processor_handle processor_handle, uint32_t sensor_ind) |
| Reset the fan to automatic driver control. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_fan_speed (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t speed) |
| Set the fan speed for the specified device with the provided speed, in RPMs. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_busy_percent (amdsmi_processor_handle processor_handle, uint32_t *gpu_busy_percent) |
| Get GPU busy percent from gpu_busy_percent sysfs file. | |
| amdsmi_status_t | amdsmi_get_utilization_count (amdsmi_processor_handle processor_handle, amdsmi_utilization_counter_t utilization_counters[], uint32_t count, uint64_t *timestamp) |
| Get coarse grain utilization counter of the specified device. | |
| amdsmi_status_t | amdsmi_get_gpu_perf_level (amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t *perf) |
| Get the performance level of the device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_perf_determinism_mode (amdsmi_processor_handle processor_handle, uint64_t clkvalue) |
| Enter performance determinism mode with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_overdrive_level (amdsmi_processor_handle processor_handle, uint32_t *od) |
| Get the overdrive percent associated with the device with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_mem_overdrive_level (amdsmi_processor_handle processor_handle, uint32_t *od) |
| Get the GPU memory clock overdrive percent associated with the device with provided processor handle. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_clk_freq (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_frequencies_t *f) |
| Get the list of possible system clock speeds of device for a specified clock type. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_reset_gpu (amdsmi_processor_handle processor_handle) |
| Triggers a chain that resets all GPUs. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_od_volt_info (amdsmi_processor_handle processor_handle, amdsmi_od_volt_freq_data_t *odv) |
| This function retrieves the overdrive GFX & MCLK information. If valid for the GPU it will also populate the voltage curve data. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_metrics_header_info (amdsmi_processor_handle processor_handle, amd_metrics_table_header_t *header_value) |
| Get the 'metrics_header_info' from the GPU metrics associated with the device. | |
| amdsmi_status_t | amdsmi_get_gpu_metrics_info (amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics) |
| This function retrieves the gpu metrics information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_partition_metrics_info (amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics) |
| This function retrieves the partition metrics information. | |
| amdsmi_status_t | amdsmi_get_gpu_pm_metrics_info (amdsmi_processor_handle processor_handle, amdsmi_name_value_t **pm_metrics, uint32_t *num_of_metrics) |
| Get the pm metrics table with provided device index. | |
| amdsmi_status_t | amdsmi_get_gpu_reg_table_info (amdsmi_processor_handle processor_handle, amdsmi_reg_type_t reg_type, amdsmi_name_value_t **reg_metrics, uint32_t *num_of_metrics) |
| Get the register metrics table with provided device index and register type. | |
| amdsmi_status_t | amdsmi_set_gpu_clk_range (amdsmi_processor_handle processor_handle, uint64_t minclkvalue, uint64_t maxclkvalue, amdsmi_clk_type_t clkType) |
| This function sets the clock range information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_clk_limit (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_limit_type_t limit_type, uint64_t clk_value) |
| This function sets the clock sets the clock min/max level. | |
| amdsmi_status_t | amdsmi_set_gpu_od_clk_info (amdsmi_processor_handle processor_handle, amdsmi_freq_ind_t level, uint64_t clkvalue, amdsmi_clk_type_t clkType) |
| This function sets the clock frequency information. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_od_volt_info (amdsmi_processor_handle processor_handle, uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue) |
| This function sets 1 of the 3 voltage curve points. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_od_volt_curve_regions (amdsmi_processor_handle processor_handle, uint32_t *num_regions, amdsmi_freq_volt_region_t *buffer) |
| This function will retrieve the current valid regions in the frequency/voltage space. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_power_profile_presets (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_profile_status_t *status) |
| Get the list of available preset power profiles and an indication of which profile is currently active. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_perf_level (amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t perf_lvl) |
| Set the PowerPlay performance level associated with the device with provided processor handle with the provided value. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_gpu_overdrive_level (amdsmi_processor_handle processor_handle, uint32_t od) |
| Set the overdrive percent associated with the device with provided processor handle with the provided value. See details for WARNING. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_set_clk_freq (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, uint64_t freq_bitmask) |
| Control the set of allowed frequencies that can be used for the specified clock. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_soc_pstate (amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy) |
| Get the soc pstate policy for the processor. | |
| amdsmi_status_t | amdsmi_set_soc_pstate (amdsmi_processor_handle processor_handle, uint32_t policy_id) |
| Set the soc pstate policy for the processor. | |
| amdsmi_status_t | amdsmi_get_xgmi_plpd (amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd) |
| Get the xgmi per-link power down policy parameter for the processor. | |
| amdsmi_status_t | amdsmi_set_xgmi_plpd (amdsmi_processor_handle processor_handle, uint32_t policy_id) |
| Set the xgmi per-link power down policy parameter for the processor. | |
| amdsmi_status_t | amdsmi_get_gpu_process_isolation (amdsmi_processor_handle processor_handle, uint32_t *pisolate) |
| Get the status of the Process Isolation. | |
| amdsmi_status_t | amdsmi_set_gpu_process_isolation (amdsmi_processor_handle processor_handle, uint32_t pisolate) |
| Enable/disable the system Process Isolation. | |
| amdsmi_status_t | amdsmi_clean_gpu_local_data (amdsmi_processor_handle processor_handle) |
| Run the cleaner shader to clean up data in LDS/GPRs. | |
| amdsmi_status_t | amdsmi_get_lib_version (amdsmi_version_t *version) |
| Get the build version information for the currently running build of AMDSMI. | |
| amdsmi_status_t | amdsmi_get_gpu_ecc_count (amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec) |
| Retrieve the error counts for a GPU block. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_ecc_enabled (amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks) |
| Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_total_ecc_count (amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec) |
| Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_afids_from_cper (char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids) |
| Get the AFIDs from CPER buffer. | |
| amdsmi_status_t | amdsmi_get_gpu_ras_feature_info (amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature) |
| Returns RAS features info. | |
| amdsmi_status_t | amdsmi_get_gpu_cper_entries (amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor) |
| Retrieve CPER entries cached in the driver. | |
| amdsmi_status_t | amdsmi_get_gpu_ecc_status (amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state) |
| Retrieve the ECC status for a GPU block. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_status_code_to_string (amdsmi_status_t status, const char **status_string) |
| Get a description of a provided AMDSMI error status. | |
| amdsmi_status_t | amdsmi_gpu_counter_group_supported (amdsmi_processor_handle processor_handle, amdsmi_event_group_t group) |
| Tell if an event group is supported by a given device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_gpu_create_counter (amdsmi_processor_handle processor_handle, amdsmi_event_type_t type, amdsmi_event_handle_t *evnt_handle) |
| Create a performance counter object. | |
| amdsmi_status_t | amdsmi_gpu_destroy_counter (amdsmi_event_handle_t evnt_handle) |
| Deallocate a performance counter object. | |
| amdsmi_status_t | amdsmi_gpu_control_counter (amdsmi_event_handle_t evt_handle, amdsmi_counter_command_t cmd, void *cmd_args) |
| Issue performance counter control commands. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_gpu_read_counter (amdsmi_event_handle_t evt_handle, amdsmi_counter_value_t *value) |
| Read the current value of a performance counter. | |
| amdsmi_status_t | amdsmi_get_gpu_available_counters (amdsmi_processor_handle processor_handle, amdsmi_event_group_t grp, uint32_t *available) |
| Get the number of currently available counters. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_process_info (amdsmi_process_info_t *procs, uint32_t *num_items) |
| Get process information about processes currently using GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_process_info_by_pid (uint32_t pid, amdsmi_process_info_t *proc) |
| Get process information about a specific process. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_process_gpus (uint32_t pid, uint32_t *dv_indices, uint32_t *num_devices) |
| Get the device indices currently being used by a process. | |
| amdsmi_status_t | amdsmi_gpu_xgmi_error_status (amdsmi_processor_handle processor_handle, amdsmi_xgmi_status_t *status) |
| Retrieve the XGMI error status for a device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_reset_gpu_xgmi_error (amdsmi_processor_handle processor_handle) |
| Reset the XGMI error status for a device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_xgmi_info (amdsmi_processor_handle processor_handle, amdsmi_xgmi_info_t *info) |
| Returns XGMI information for the GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_xgmi_link_status (amdsmi_processor_handle processor_handle, amdsmi_xgmi_link_status_t *link_status) |
| Get the XGMI link status. | |
| amdsmi_status_t | amdsmi_get_link_metrics (amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics) |
| Return link metric information. | |
| amdsmi_status_t | amdsmi_topo_get_numa_node_number (amdsmi_processor_handle processor_handle, uint32_t *numa_node) |
| Retrieve the NUMA CPU node number for a device. | |
| amdsmi_status_t | amdsmi_topo_get_link_weight (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *weight) |
| Retrieve the weight for a connection between 2 GPUs. | |
| amdsmi_status_t | amdsmi_get_minmax_bandwidth_between_processors (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *min_bandwidth, uint64_t *max_bandwidth) |
| Retrieve minimal and maximal io link bandwidth between 2 GPUs. | |
| amdsmi_status_t | amdsmi_topo_get_link_type (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *hops, amdsmi_link_type_t *type) |
| Retrieve the hops and the connection type between 2 GPUs. | |
| amdsmi_status_t | amdsmi_get_link_topology_nearest (amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info) |
| Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level. | |
| amdsmi_status_t | amdsmi_is_P2P_accessible (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, bool *accessible) |
| Return P2P availability status between 2 GPUs. | |
| amdsmi_status_t | amdsmi_topo_get_p2p_status (amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap) |
| Retrieve connection type and P2P capabilities between 2 GPUs. | |
| amdsmi_status_t | amdsmi_get_gpu_compute_partition (amdsmi_processor_handle processor_handle, char *compute_partition, uint32_t len) |
| Retrieves the current compute partitioning for a desired device. | |
| amdsmi_status_t | amdsmi_set_gpu_compute_partition (amdsmi_processor_handle processor_handle, amdsmi_compute_partition_type_t compute_partition) |
| Modifies a selected device's compute partition setting. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_partition (amdsmi_processor_handle processor_handle, char *memory_partition, uint32_t len) |
| Retrieves the current memory partition for a desired device. | |
| amdsmi_status_t | amdsmi_set_gpu_memory_partition (amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t memory_partition) |
| Modifies a selected device's current memory partition setting. | |
| amdsmi_status_t | amdsmi_get_gpu_memory_partition_config (amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config) |
| Returns current gpu memory partition capabilities. | |
| amdsmi_status_t | amdsmi_set_gpu_memory_partition_mode (amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode) |
| Sets memory partition mode Set memory partition setting based on memory_partition mode from amdsmi_get_gpu_memory_partition_config. | |
| amdsmi_status_t | amdsmi_get_gpu_accelerator_partition_profile_config (amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config) |
| Returns gpu accelerator partition caps as currently configured in the system. | |
| amdsmi_status_t | amdsmi_get_gpu_accelerator_partition_profile (amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id) |
| Returns current gpu accelerator partition cap. | |
| amdsmi_status_t | amdsmi_set_gpu_accelerator_partition_profile (amdsmi_processor_handle processor_handle, uint32_t profile_index) |
| Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_profile_config. | |
| amdsmi_status_t | amdsmi_init_gpu_event_notification (amdsmi_processor_handle processor_handle) |
| Prepare to collect event notifications for a GPU. | |
| amdsmi_status_t | amdsmi_set_gpu_event_notification_mask (amdsmi_processor_handle processor_handle, uint64_t mask) |
| Specify which events to collect for a device. | |
| amdsmi_status_t | amdsmi_get_gpu_event_notification (int timeout_ms, uint32_t *num_elem, amdsmi_evt_notification_data_t *data) |
| Collect event notifications, waiting a specified amount of time. | |
| amdsmi_status_t | amdsmi_stop_gpu_event_notification (amdsmi_processor_handle processor_handle) |
| Close any file handles and free any resources used by event notification for a GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_driver_info (amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info) |
| Returns the driver version information. | |
| amdsmi_status_t | amdsmi_get_gpu_asic_info (amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info) |
| Returns the ASIC information for the device. | |
| amdsmi_status_t | amdsmi_get_gpu_kfd_info (amdsmi_processor_handle processor_handle, amdsmi_kfd_info_t *info) |
| Returns the KFD (Kernel Fusion Driver) information for the device. | |
| amdsmi_status_t | amdsmi_get_gpu_vram_info (amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info) |
| Returns vram info. | |
| amdsmi_status_t | amdsmi_get_gpu_board_info (amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info) |
| Returns the board part number and board information for the requested device. | |
| amdsmi_status_t | amdsmi_get_power_cap_info (amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info) |
| Returns the power caps as currently configured in the system. | |
| amdsmi_status_t | amdsmi_get_pcie_info (amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info) |
| Returns the PCIe info for the GPU. | |
| amdsmi_status_t | amdsmi_get_gpu_xcd_counter (amdsmi_processor_handle processor_handle, uint16_t *xcd_count) |
| Returns the 'xcd_counter' from the GPU metrics associated with the device. | |
| amdsmi_status_t | amdsmi_get_npm_info (amdsmi_node_handle node_handle, amdsmi_npm_info_t *info) |
| Retrieves node power management (NPM) status and power limit for the specified node. | |
| amdsmi_status_t | amdsmi_get_fw_info (amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info) |
| Returns the firmware versions running on the device. | |
| amdsmi_status_t | amdsmi_get_gpu_vbios_info (amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info) |
| Returns the static information for the vBIOS on the device. | |
| amdsmi_status_t | amdsmi_get_temp_metric (amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature) |
| Get the temperature metric value for the specified metric, from the specified temperature sensor on the specified device. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_activity (amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info) |
| Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentage from 0-100%. | |
| amdsmi_status_t | amdsmi_get_power_info (amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info) |
| Returns the current power and voltage of the GPU. | |
| amdsmi_status_t | amdsmi_is_gpu_power_management_enabled (amdsmi_processor_handle processor_handle, bool *enabled) |
| Returns is power management enabled. | |
| amdsmi_status_t | amdsmi_get_clock_info (amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info) |
| Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory. This call reports the averages over 1s in MHz. It is not supported on virtual machine guest. | |
| amdsmi_status_t | amdsmi_get_gpu_vram_usage (amdsmi_processor_handle processor_handle, amdsmi_vram_usage_t *info) |
| Returns the VRAM usage (both total and used memory) in MegaBytes. | |
| amdsmi_status_t | amdsmi_get_violation_status (amdsmi_processor_handle processor_handle, amdsmi_violation_status_t *info) |
| Returns the violations for a processor. | |
| amdsmi_status_t | amdsmi_get_gpu_process_list (amdsmi_processor_handle processor_handle, uint32_t *max_processes, amdsmi_proc_info_t *list) |
| Returns the list of process information running on a given GPU. If pdh.dll is not present on the system, this API returns AMDSMI_STATUS_NOT_SUPPORTED. Sum of the process memory is not expected to be the total memory usage. | |
| amdsmi_status_t | amdsmi_gpu_driver_reload (void) |
| Restart the device driver (kmod module) for all AMD GPUs on the system. | |
| amdsmi_status_t | amdsmi_get_gpu_ptl_state (amdsmi_processor_handle processor_handle, bool *enabled) |
| Get PTL enable/disable state. | |
| amdsmi_status_t | amdsmi_set_gpu_ptl_state (amdsmi_processor_handle processor_handle, bool enable) |
| Set PTL enable/disable state. | |
| amdsmi_status_t | amdsmi_get_gpu_ptl_formats (amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t *data_format1, amdsmi_ptl_data_format_t *data_format2) |
| Get PTL (Peak Tops Limiter) formats for the processor. | |
| amdsmi_status_t | amdsmi_set_gpu_ptl_formats (amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t data_format1, amdsmi_ptl_data_format_t data_format2) |
| Set PTL with specified preferred data formats. | |
| amdsmi_status_t | amdsmi_get_cpu_core_energy (amdsmi_processor_handle processor_handle, uint64_t *penergy) |
| Get the core energy for a given core. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_energy (amdsmi_processor_handle processor_handle, uint64_t *penergy) |
| Get the socket energy for a given socket. | |
| amdsmi_status_t | amdsmi_get_threads_per_core (uint32_t *threads_per_core) |
| Get Number of threads Per Core. | |
| amdsmi_status_t | amdsmi_get_cpu_hsmp_driver_version (amdsmi_processor_handle processor_handle, amdsmi_hsmp_driver_version_t *amdsmi_hsmp_driver_ver) |
| Get HSMP Driver Version. | |
| amdsmi_status_t | amdsmi_get_cpu_smu_fw_version (amdsmi_processor_handle processor_handle, amdsmi_smu_fw_version_t *amdsmi_smu_fw) |
| Get SMU Firmware Version. | |
| amdsmi_status_t | amdsmi_get_cpu_hsmp_proto_ver (amdsmi_processor_handle processor_handle, uint32_t *proto_ver) |
| Get HSMP protocol Version. | |
| amdsmi_status_t | amdsmi_get_cpu_prochot_status (amdsmi_processor_handle processor_handle, uint32_t *prochot) |
| Get normalized status of the processor's PROCHOT status. | |
| amdsmi_status_t | amdsmi_get_cpu_fclk_mclk (amdsmi_processor_handle processor_handle, uint32_t *fclk, uint32_t *mclk) |
| Get Data fabric clock and Memory clock in MHz. | |
| amdsmi_status_t | amdsmi_get_cpu_cclk_limit (amdsmi_processor_handle processor_handle, uint32_t *cclk) |
| Get core clock in MHz. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_current_active_freq_limit (amdsmi_processor_handle processor_handle, uint16_t *freq, char **src_type) |
| Get current active frequency limit of the socket. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_freq_range (amdsmi_processor_handle processor_handle, uint16_t *fmax, uint16_t *fmin) |
| Get socket frequency range. | |
| amdsmi_status_t | amdsmi_get_cpu_core_current_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *freq) |
| Get socket frequency limit of the core. | |
| amdsmi_status_t | amdsmi_set_cpu_rail_isofreq_policy (amdsmi_processor_handle processor_handle, bool *rail_isofreq_policy) |
| Set CPU rail isolated frequency policy for independent core clock control per power rail. | |
| amdsmi_status_t | amdsmi_get_cpu_rail_isofreq_policy (amdsmi_processor_handle processor_handle, uint8_t *rail_isofreq_policy) |
| Get CPU rail isolated frequency policy status for independent core clock control per power rail. | |
| amdsmi_status_t | amdsmi_set_cpu_dfc_ctrl (amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl) |
| Set the DFCState enabling control. | |
| amdsmi_status_t | amdsmi_get_cpu_dfc_ctrl (amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl) |
| Get the current DFCState enabling control status. | |
| amdsmi_status_t | amdsmi_get_cpu_core_boostlimit (amdsmi_processor_handle processor_handle, uint32_t *pboostlimit) |
| Get the core boost limit. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_c0_residency (amdsmi_processor_handle processor_handle, uint32_t *pc0_residency) |
| Get the socket c0 residency. | |
| amdsmi_status_t | amdsmi_set_cpu_core_boostlimit (amdsmi_processor_handle processor_handle, uint32_t boostlimit) |
| Set the core boostlimit value. | |
| amdsmi_status_t | amdsmi_set_cpu_socket_boostlimit (amdsmi_processor_handle processor_handle, uint32_t boostlimit) |
| Set the socket boostlimit value. | |
| amdsmi_status_t | amdsmi_get_cpu_core_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *floor_freq) |
| Get the CPU core floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *floor_freq) |
| Get the CPU floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_core_eff_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq) |
| Get the CPU core effective floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_eff_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq) |
| Get the CPU effective floor limit frequency. | |
| amdsmi_status_t | amdsmi_set_cpu_core_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t floor_freq) |
| Set the CPU core floor limit frequency. | |
| amdsmi_status_t | amdsmi_set_cpu_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t floor_freq) |
| Set the CPU socket floor limit frequency. | |
| amdsmi_status_t | amdsmi_set_cpu_msr_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq) |
| Set CPU floor limit frequency via MSR(Model Specific Register). | |
| amdsmi_status_t | amdsmi_set_cpu_core_msr_floor_freq_limit (amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq) |
| Set CPU core MSR floor limit frequency. | |
| amdsmi_status_t | amdsmi_get_cpu_freq_range (uint32_t *fmax, uint32_t *fmin) |
| Get the CPU socket frequency range. | |
| amdsmi_status_t | amdsmi_set_cpu_sdps_limit (amdsmi_processor_handle processor_handle, uint32_t sdps_limit) |
| Set the SDPS(Socket DIMM Power Sloshing) limit for a given processor socket. | |
| amdsmi_status_t | amdsmi_get_cpu_sdps_limit (amdsmi_processor_handle processor_handle, double *sdps_limit) |
| Get the current SDPS limit for a given processor socket. | |
| amdsmi_status_t | amdsmi_get_cpu_ddr_bw (amdsmi_processor_handle processor_handle, amdsmi_ddr_bw_metrics_t *ddr_bw) |
| Get the DDR bandwidth data. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_temperature (amdsmi_processor_handle processor_handle, uint32_t *ptmon) |
| Get socket temperature. | |
| amdsmi_status_t | amdsmi_get_cpu_tdelta (amdsmi_processor_handle processor_handle, uint8_t *tdelta) |
| Read Thermal Delta (TDELTA) Behavior. | |
| amdsmi_status_t | amdsmi_get_cpu_svi3_vr_controller_temp (amdsmi_processor_handle processor_handle, uint32_t *rail_selection, uint32_t *rail_index, uint32_t *temp) |
| Get Temperature of SVI3 VR(Voltage Rail) | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_temp_range_and_refresh_rate (amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_temp_range_refresh_rate_t *rate) |
| Get DIMM temperature range and refresh rate. | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_power_consumption (amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_power_t *dimm_pow) |
| Get DIMM power consumption. | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_thermal_sensor (amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_thermal_t *dimm_temp) |
| Get DIMM thermal sensor value. | |
| amdsmi_status_t | amdsmi_get_cpu_dimm_sb_reg (amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t *data) |
| Read DIMM sideband register data. | |
| amdsmi_status_t | amdsmi_set_cpu_dimm_sb_reg (amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t write_data) |
| Write Data to DIMM Sideband Register. | |
| amdsmi_status_t | amdsmi_set_cpu_xgmi_width (amdsmi_processor_handle processor_handle, uint8_t min, uint8_t max) |
| Set xgmi width. | |
| amdsmi_status_t | amdsmi_set_cpu_gmi3_link_width_range (amdsmi_processor_handle processor_handle, uint8_t min_link_width, uint8_t max_link_width) |
| Set gmi3 link width range. | |
| amdsmi_status_t | amdsmi_cpu_apb_enable (amdsmi_processor_handle processor_handle) |
| Enable APB. | |
| amdsmi_status_t | amdsmi_cpu_apb_disable (amdsmi_processor_handle processor_handle, uint8_t pstate) |
| Disable APB. | |
| amdsmi_status_t | amdsmi_set_cpu_socket_lclk_dpm_level (amdsmi_processor_handle processor_handle, uint8_t nbio_id, uint8_t min, uint8_t max) |
| Set NBIO lclk dpm level value. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_lclk_dpm_level (amdsmi_processor_handle processor_handle, uint8_t nbio_id, amdsmi_dpm_level_t *nbio) |
| Get NBIO LCLK dpm level. | |
| amdsmi_status_t | amdsmi_set_cpu_pcie_link_rate (amdsmi_processor_handle processor_handle, uint8_t rate_ctrl, uint8_t *prev_mode) |
| Set pcie link rate. | |
| amdsmi_status_t | amdsmi_set_cpu_df_pstate_range (amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate) |
| Set df pstate range. | |
| amdsmi_status_t | amdsmi_set_cpu_xgmi_pstate_range (amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate) |
| Set the Min and Max XGMI PState Range. | |
| amdsmi_status_t | amdsmi_get_cpu_xgmi_pstate_range (amdsmi_processor_handle processor_handle, uint8_t *min_pstate, uint8_t *max_pstate) |
| Get the Max and Min XGMI PState Range. | |
| amdsmi_status_t | amdsmi_get_cpu_pc6_enable (amdsmi_processor_handle processor_handle, uint8_t *enabled) |
| Get the PC6 Enable State. | |
| amdsmi_status_t | amdsmi_set_cpu_pc6_enable (amdsmi_processor_handle processor_handle, uint8_t enable) |
| Set the PC6 Enable State. | |
| amdsmi_status_t | amdsmi_get_cpu_cc6_enable (amdsmi_processor_handle processor_handle, uint8_t *enabled) |
| Get the Core C6 Enable State. | |
| amdsmi_status_t | amdsmi_set_cpu_cc6_enable (amdsmi_processor_handle processor_handle, uint8_t enable) |
| Set the Core C6 Enable State. | |
| amdsmi_status_t | amdsmi_get_cpu_current_io_bandwidth (amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *io_bw) |
| Get current input output bandwidth. | |
| amdsmi_status_t | amdsmi_get_cpu_current_xgmi_bw (amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *xgmi_bw) |
| Get current input output bandwidth. | |
| amdsmi_status_t | amdsmi_get_hsmp_metrics_table_version (amdsmi_processor_handle processor_handle, uint32_t *metrics_version) |
| Get HSMP metrics table version. | |
| amdsmi_status_t | amdsmi_get_hsmp_metrics_table (amdsmi_processor_handle processor_handle, amdsmi_hsmp_metrics_table_t *metrics_table) |
| Get HSMP metrics table. | |
| amdsmi_status_t | amdsmi_first_online_core_on_cpu_socket (amdsmi_processor_handle processor_handle, uint32_t *pcore_ind) |
| Get first online core on socket. | |
| amdsmi_status_t | amdsmi_get_cpu_family (uint32_t *cpu_family) |
| Get CPU family. | |
| amdsmi_status_t | amdsmi_get_cpu_model (uint32_t *cpu_model) |
| Get CPU model. | |
| amdsmi_status_t | amdsmi_get_cpu_model_name (amdsmi_processor_handle processor_handle, amdsmi_cpu_info_t *cpu_info) |
| Retrieve the CPU processor model name based on the processor index. | |
| amdsmi_status_t | amdsmi_get_esmi_err_msg (amdsmi_status_t status, const char **status_string) |
| Get a description of provided AMDSMI error status for esmi errors. | |
| amdsmi_status_t | amdsmi_get_cpu_cores_per_socket (uint32_t sock_count, amdsmi_sock_info_t *soc_info) |
| Get cpu cores per socket from sys filesystem. | |
| amdsmi_status_t | amdsmi_get_cpu_socket_count (uint32_t *sock_count) |
| Get CPU socket count from sys filesystem. | |
| amdsmi_status_t | amdsmi_get_cpu_enabled_commands (amdsmi_processor_handle processor_handle, bool *r_mask, uint32_t *mask0, uint32_t *mask1, uint32_t *mask2) |
| Get HSMP Enabled Commands information for a given CPU socket. | |
| amdsmi_status_t | amdsmi_get_nic_driver_info (amdsmi_processor_handle processor_handle, amdsmi_nic_driver_info_t *info) |
| Retrieves information about the NIC driver. | |
| amdsmi_status_t | amdsmi_get_nic_asic_info (amdsmi_processor_handle processor_handle, amdsmi_nic_asic_info_t *info) |
| Retrieves ASIC information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_bus_info (amdsmi_processor_handle processor_handle, amdsmi_nic_bus_info_t *info) |
| Retrieves BUS information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_numa_info (amdsmi_processor_handle processor_handle, amdsmi_nic_numa_info_t *info) |
| Retrieves NUMA information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_port_info (amdsmi_processor_handle processor_handle, amdsmi_nic_port_info_t *info) |
| Retrieves PORT information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_rdma_dev_info (amdsmi_processor_handle processor_handle, amdsmi_nic_rdma_devices_info_t *info) |
| Retrieves RDMA devices information for the NIC. | |
| amdsmi_status_t | amdsmi_get_nic_rdma_port_statistics (amdsmi_processor_handle processor_handle, uint32_t rdma_port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats) |
| Retrieve RDMA port statistics for the NIC. | |
| amdsmi_status_t | amdsmi_get_gpu_uma_carveout_info (amdsmi_processor_handle processor_handle, amdsmi_uma_carveout_info_t *info) |
| Get UMA carveout configuration information. | |
| amdsmi_status_t | amdsmi_set_gpu_uma_carveout (amdsmi_processor_handle processor_handle, uint32_t option_index) |
| Set UMA carveout configuration. | |
| amdsmi_status_t | amdsmi_get_ttm_info (amdsmi_ttm_info_t *info) |
| Get TTM configuration information. | |
| amdsmi_status_t | amdsmi_set_ttm_pages_limit (uint64_t pages) |
| Set TTM pages limit. | |
| amdsmi_status_t | amdsmi_reset_ttm_pages_limit (void) |
| Reset TTM pages limit to system default. | |
Detailed Description
AMD System Management Interface API.
Definition in file amdsmi.h.
Macro Definition Documentation
◆ AMDSMI_MAX_MM_IP_COUNT
| #define AMDSMI_MAX_MM_IP_COUNT 8 |
◆ AMDSMI_MAX_STRING_LENGTH
| #define AMDSMI_MAX_STRING_LENGTH 256 |
◆ AMDSMI_MAX_DEVICES
| #define AMDSMI_MAX_DEVICES 32 |
◆ AMDSMI_MAX_CACHE_TYPES
| #define AMDSMI_MAX_CACHE_TYPES 10 |
◆ AMDSMI_MAX_ACCELERATOR_PROFILE
| #define AMDSMI_MAX_ACCELERATOR_PROFILE 32 |
◆ AMDSMI_MAX_CP_PROFILE_RESOURCES
| #define AMDSMI_MAX_CP_PROFILE_RESOURCES 32 |
◆ AMDSMI_MAX_ACCELERATOR_PARTITIONS
| #define AMDSMI_MAX_ACCELERATOR_PARTITIONS 8 |
◆ AMDSMI_MAX_NUM_NUMA_NODES
| #define AMDSMI_MAX_NUM_NUMA_NODES 32 |
◆ AMDSMI_GPU_UUID_SIZE
◆ AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK
| #define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64 |
◆ AMDSMI_MAX_CONTAINER_TYPE
| #define AMDSMI_MAX_CONTAINER_TYPE 2 |
◆ CENTRIGRADE_TO_MILLI_CENTIGRADE
| #define CENTRIGRADE_TO_MILLI_CENTIGRADE 1000 |
◆ AMDSMI_NUM_HBM_INSTANCES
| #define AMDSMI_NUM_HBM_INSTANCES 4 |
◆ AMDSMI_MAX_NUM_VCN
| #define AMDSMI_MAX_NUM_VCN 4 |
◆ AMDSMI_MAX_NUM_CLKS
| #define AMDSMI_MAX_NUM_CLKS 4 |
◆ AMDSMI_MAX_NUM_XGMI_LINKS
| #define AMDSMI_MAX_NUM_XGMI_LINKS 8 |
◆ AMDSMI_MAX_NUM_GFX_CLKS
| #define AMDSMI_MAX_NUM_GFX_CLKS 8 |
◆ AMDSMI_MAX_AID
◆ AMDSMI_MAX_ENGINES
| #define AMDSMI_MAX_ENGINES 8 |
◆ AMDSMI_MAX_NUM_JPEG
| #define AMDSMI_MAX_NUM_JPEG 32 |
◆ AMDSMI_MAX_NUM_JPEG_ENG_V1
| #define AMDSMI_MAX_NUM_JPEG_ENG_V1 40 |
◆ AMDSMI_MAX_NUM_XCC
| #define AMDSMI_MAX_NUM_XCC 8 |
This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units, ACE (Asynchronous Compute Engines), caches, and global resources organized as one unit.
Refer to amd.com documentation for more detail: https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/white-papers/amd-cdna-3-white-paper.pdf
◆ AMDSMI_MAX_NUM_XCP
| #define AMDSMI_MAX_NUM_XCP 8 |
This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Graphics Compute Partitions. Each physical gpu could have a maximum of 8 separate partitions associated with each (depending on ASIC support).
Refer to amd.com documentation for more detail: https://www.amd.com/content/dam/amd/en/documents/instinct-tech-docs/white-papers/amd-cdna-3-white-paper.pdf
◆ MAX_NUMBER_OF_AFIDS_PER_RECORD
| #define MAX_NUMBER_OF_AFIDS_PER_RECORD 12 |
◆ AMDSMI_MAX_VF_COUNT
| #define AMDSMI_MAX_VF_COUNT 32 |
◆ AMDSMI_MAX_DRIVER_NUM
| #define AMDSMI_MAX_DRIVER_NUM 2 |
◆ AMDSMI_DFC_FW_NUMBER_OF_ENTRIES
| #define AMDSMI_DFC_FW_NUMBER_OF_ENTRIES 9 |
◆ AMDSMI_MAX_WHITE_LIST_ELEMENTS
| #define AMDSMI_MAX_WHITE_LIST_ELEMENTS 16 |
◆ AMDSMI_MAX_BLACK_LIST_ELEMENTS
| #define AMDSMI_MAX_BLACK_LIST_ELEMENTS 64 |
◆ AMDSMI_MAX_UUID_ELEMENTS
| #define AMDSMI_MAX_UUID_ELEMENTS 16 |
◆ AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS
| #define AMDSMI_MAX_TA_WHITE_LIST_ELEMENTS 8 |
◆ AMDSMI_MAX_ERR_RECORDS
| #define AMDSMI_MAX_ERR_RECORDS 10 |
◆ AMDSMI_MAX_PROFILE_COUNT
| #define AMDSMI_MAX_PROFILE_COUNT 16 |
◆ AMDSMI_TIME_FORMAT
| #define AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d" |
◆ AMDSMI_DATE_FORMAT
| #define AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d" |
◆ AMDSMI_LIB_VERSION_MAJOR
| #define AMDSMI_LIB_VERSION_MAJOR 26 |
◆ AMDSMI_LIB_VERSION_MINOR
| #define AMDSMI_LIB_VERSION_MINOR 4 |
◆ AMDSMI_LIB_VERSION_RELEASE
| #define AMDSMI_LIB_VERSION_RELEASE 0 |
◆ AMDSMI_LIB_VERSION_CREATE_STRING
| #define AMDSMI_LIB_VERSION_CREATE_STRING | ( | MAJOR, | |
| MINOR, | |||
| RELEASE | |||
| ) | (#MAJOR "." #MINOR "." #RELEASE) |
◆ AMDSMI_LIB_VERSION_EXPAND_PARTS
| #define AMDSMI_LIB_VERSION_EXPAND_PARTS | ( | MAJOR_STR, | |
| MINOR_STR, | |||
| RELEASE_STR | |||
| ) | AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR_STR, MINOR_STR, RELEASE_STR) |
Definition at line 235 of file amdsmi.h.
254 {
255 AMDSMI_MM_UVD,
256 AMDSMI_MM_VCE,
257 AMDSMI_MM_VCN,
258 AMDSMI_MM__MAX
259} amdsmi_mm_ip_t;
260
266typedef enum {
267 AMDSMI_CONTAINER_LXC,
269} amdsmi_container_types_t;
270
277typedef void* amdsmi_socket_handle;
278
285
286#ifdef ENABLE_ESMI_LIB
287
294
300typedef struct {
301 uint32_t major;
302 uint32_t minor;
304
310#define AMDSMI_MAX_SPD_DIMM_ADDRESS 0xFF
311#define AMDSMI_MAX_SPD_LID 0xF
312#define AMDSMI_MAX_SPD_REG_OFFSET 0x7FF
313#define AMDSMI_MAX_SPD_REG_SPACE 0x1
314#define AMDSMI_MAX_SPD_WRITE_DATA 0xFF
315#define MAX_SVI3_RAIL_INDEX 4
316#define MAX_SVI3_RAIL_SELECTION 1
317#define POWER_EFFICIENCY_MODE_4 0x4
318#define POWER_EFFICIENCY_MODE_5 0x5
319#define AMDSMI_MAX_POWER_EFFICIENCY_UTIL \
320 0x7F //[9:3]=Utilization point for balanced core modes (%).
321#define AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT \
322 0x1FFFFF //[30:10]=PPT limit for balanced core modes(mW).
323#define AMDSMI_RAIL_INDEX_NONE 0xFFFFFFFF // Rail Index value defined as maximum when not passed
324#endif
325
331typedef enum {
332 AMDSMI_PROCESSOR_TYPE_UNKNOWN = 0,
344} processor_type_t;
345
354typedef enum {
355 AMDSMI_STATUS_SUCCESS = 0,
356 // Library usage errors
357 AMDSMI_STATUS_INVAL = 1,
358 AMDSMI_STATUS_NOT_SUPPORTED = 2,
359 AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,
360 AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,
361 AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,
362 AMDSMI_STATUS_DRM_ERROR = 6,
363 AMDSMI_STATUS_API_FAILED = 7,
364 AMDSMI_STATUS_TIMEOUT = 8,
365 AMDSMI_STATUS_RETRY = 9,
366 AMDSMI_STATUS_NO_PERM = 10,
367 AMDSMI_STATUS_INTERRUPT = 11,
368 AMDSMI_STATUS_IO = 12,
369 AMDSMI_STATUS_ADDRESS_FAULT = 13,
370 AMDSMI_STATUS_FILE_ERROR = 14,
371 AMDSMI_STATUS_OUT_OF_RESOURCES = 15,
372 AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,
373 AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,
374 AMDSMI_STATUS_INIT_ERROR = 18,
375 AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,
376 AMDSMI_STATUS_DIRECTORY_NOT_FOUND = 20,
377 AMDSMI_STATUS_IPC_ERROR = 21,
378 // Processor related errors
379 AMDSMI_STATUS_BUSY = 30,
380 AMDSMI_STATUS_NOT_FOUND = 31,
381 AMDSMI_STATUS_NOT_INIT = 32,
382 AMDSMI_STATUS_NO_SLOT = 33,
383 AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,
384 // Data and size errors
385 AMDSMI_STATUS_MORE_DATA = 39,
386 AMDSMI_STATUS_NO_DATA = 40,
387 AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,
388 AMDSMI_STATUS_UNEXPECTED_SIZE = 42,
390 43,
391 // esmi errors
392 AMDSMI_STATUS_NON_AMD_CPU = 44,
393 AMDSMI_STATUS_NO_ENERGY_DRV = 45,
394 AMDSMI_STATUS_NO_MSR_DRV = 46,
395 AMDSMI_STATUS_NO_HSMP_DRV = 47,
396 AMDSMI_STATUS_NO_HSMP_SUP = 48,
397 AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,
398 AMDSMI_STATUS_HSMP_TIMEOUT = 50,
399 AMDSMI_STATUS_NO_DRV = 51,
400 AMDSMI_STATUS_FILE_NOT_FOUND = 52,
401 AMDSMI_STATUS_ARG_PTR_NULL = 53,
402 AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,
403 AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,
404 AMDSMI_STATUS_CORRUPTED_EEPROM = 56,
405 // General errors
406 AMDSMI_STATUS_MAP_ERROR =
407 0xFFFFFFFE,
408 AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF
409} amdsmi_status_t;
410
416typedef enum {
417 AMDSMI_CLK_TYPE_SYS = 0x0,
418 AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,
420 AMDSMI_CLK_TYPE_DF,
422 AMDSMI_CLK_TYPE_DCEF,
424 AMDSMI_CLK_TYPE_SOC,
425 AMDSMI_CLK_TYPE_MEM,
426 AMDSMI_CLK_TYPE_PCIE,
431 AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1
432} amdsmi_clk_type_t;
433
439typedef enum {
440 AMDSMI_ACCELERATOR_PARTITION_INVALID = 0,
451 AMDSMI_ACCELERATOR_PARTITION_MAX
453
459typedef enum {
465 AMDSMI_ACCELERATOR_MAX
467
474typedef enum {
475 AMDSMI_COMPUTE_PARTITION_INVALID = 0,
487
493typedef enum {
494 AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
495 AMDSMI_MEMORY_PARTITION_NPS1 = 1,
497 AMDSMI_MEMORY_PARTITION_NPS2 = 2,
500 AMDSMI_MEMORY_PARTITION_NPS4 = 4,
503 AMDSMI_MEMORY_PARTITION_NPS8 = 8,
509
516typedef enum {
518 AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
527
528 // GPU Board Node temperature
529 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST = 100,
531 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST,
540 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_LAST = 149,
541
542 // GPU Board VR (Voltage Regulator) temperature
543 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST = 150,
545 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST,
560 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_LAST = 199,
561
562 // Baseboard System temperature
563 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST = 200,
565 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST,
598 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST = 249,
600 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST
602
609typedef enum {
610 AMDSMI_FW_ID_SMU = 1,
612 AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
613 AMDSMI_FW_ID_CP_CE,
614 AMDSMI_FW_ID_CP_PFP,
615 AMDSMI_FW_ID_CP_ME,
620 AMDSMI_FW_ID_CP_MEC1,
622 AMDSMI_FW_ID_CP_MEC2,
624 AMDSMI_FW_ID_RLC,
625 AMDSMI_FW_ID_SDMA0,
626 AMDSMI_FW_ID_SDMA1,
627 AMDSMI_FW_ID_SDMA2,
628 AMDSMI_FW_ID_SDMA3,
629 AMDSMI_FW_ID_SDMA4,
630 AMDSMI_FW_ID_SDMA5,
631 AMDSMI_FW_ID_SDMA6,
632 AMDSMI_FW_ID_SDMA7,
633 AMDSMI_FW_ID_VCN,
634 AMDSMI_FW_ID_UVD,
635 AMDSMI_FW_ID_VCE,
636 AMDSMI_FW_ID_ISP,
645 AMDSMI_FW_ID_RLC_V,
646 AMDSMI_FW_ID_MMSCH,
649 AMDSMI_FW_ID_PSP_TOC,
651 AMDSMI_FW_ID_DFC,
652 AMDSMI_FW_ID_PSP_SPL,
653 AMDSMI_FW_ID_DRV_CAP,
654 AMDSMI_FW_ID_MC,
655 AMDSMI_FW_ID_PSP_BL,
656 AMDSMI_FW_ID_CP_PM4,
657 AMDSMI_FW_ID_RLC_P,
664 AMDSMI_FW_ID_CP_MES,
665 AMDSMI_FW_ID_MES_KIQ,
669 AMDSMI_FW_ID_RLX6,
671 AMDSMI_FW_ID_RS64_ME,
688 AMDSMI_FW_ID_PPTABLE,
689 AMDSMI_FW_ID_PSP_SOC,
690 AMDSMI_FW_ID_PSP_DBG,
696 AMDSMI_FW_ID_ASD,
697 AMDSMI_FW_ID_TA_RAS,
698 AMDSMI_FW_ID_TA_XGMI,
701 AMDSMI_FW_ID_PM,
702 AMDSMI_FW_ID_DMCU,
704 AMDSMI_FW_ID__MAX
705} amdsmi_fw_block_t;
706
712typedef enum {
713 AMDSMI_VRAM_TYPE_UNKNOWN = 0,
714 // HBM
715 AMDSMI_VRAM_TYPE_HBM = 1,
716 AMDSMI_VRAM_TYPE_HBM2 = 2,
717 AMDSMI_VRAM_TYPE_HBM2E = 3,
718 AMDSMI_VRAM_TYPE_HBM3 = 4,
719 AMDSMI_VRAM_TYPE_HBM3E = 5,
720 // DDR
721 AMDSMI_VRAM_TYPE_DDR2 = 10,
722 AMDSMI_VRAM_TYPE_DDR3 = 11,
723 AMDSMI_VRAM_TYPE_DDR4 = 12,
724 AMDSMI_VRAM_TYPE_DDR5 = 13,
725 // GDDR
726 AMDSMI_VRAM_TYPE_GDDR1 = 17,
727 AMDSMI_VRAM_TYPE_GDDR2 = 18,
728 AMDSMI_VRAM_TYPE_GDDR3 = 19,
729 AMDSMI_VRAM_TYPE_GDDR4 = 20,
730 AMDSMI_VRAM_TYPE_GDDR5 = 21,
731 AMDSMI_VRAM_TYPE_GDDR6 = 22,
732 AMDSMI_VRAM_TYPE_GDDR7 = 23,
733 // LPDDR
734 AMDSMI_VRAM_TYPE_LPDDR4 = 30,
735 AMDSMI_VRAM_TYPE_LPDDR5 = 31,
736 AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_LPDDR5
737} amdsmi_vram_type_t;
738
744typedef struct {
745 uint64_t lower_bound;
746 uint64_t upper_bound;
747 uint64_t reserved[2];
748} amdsmi_range_t;
749
755typedef struct {
756 uint8_t xgmi_lanes;
757 uint64_t xgmi_hive_id;
758 uint64_t xgmi_node_id;
759 uint32_t index;
760 uint32_t reserved[9];
761} amdsmi_xgmi_info_t;
762
768typedef struct {
769 uint32_t vram_total;
770 uint32_t vram_used;
771 uint32_t reserved[2];
772} amdsmi_vram_usage_t;
773
780typedef struct {
781 uint64_t reference_timestamp;
782 uint64_t violation_timestamp;
784 uint64_t acc_counter;
785 uint64_t acc_prochot_thrm;
787 uint64_t acc_ppt_pwr;
789 uint64_t acc_socket_thrm;
791 uint64_t
792 acc_vr_thrm;
793 uint64_t acc_hbm_thrm;
795 uint64_t
796 acc_gfx_clk_below_host_limit;
802 uint64_t per_prochot_thrm;
804 uint64_t per_ppt_pwr;
806 uint64_t per_socket_thrm;
808 uint64_t per_vr_thrm;
810 uint64_t per_hbm_thrm;
812 uint64_t per_gfx_clk_below_host_limit;
819 uint8_t active_prochot_thrm;
821 uint8_t active_ppt_pwr;
823 uint8_t active_socket_thrm;
825 uint8_t active_vr_thrm;
827 uint8_t active_hbm_thrm;
829 uint8_t active_gfx_clk_below_host_limit;
833 // GPU metrics 1.8 violations
834 uint64_t acc_gfx_clk_below_host_limit_pwr
835 [AMDSMI_MAX_NUM_XCP]
836 [AMDSMI_MAX_NUM_XCC];
838 uint64_t acc_gfx_clk_below_host_limit_thm
839 [AMDSMI_MAX_NUM_XCP]
840 [AMDSMI_MAX_NUM_XCC];
842 uint64_t
843 acc_low_utilization[AMDSMI_MAX_NUM_XCP]
844 [AMDSMI_MAX_NUM_XCC];
846 uint64_t acc_gfx_clk_below_host_limit_total
847 [AMDSMI_MAX_NUM_XCP]
848 [AMDSMI_MAX_NUM_XCC];
850
851 uint64_t per_gfx_clk_below_host_limit_pwr
852 [AMDSMI_MAX_NUM_XCP]
853 [AMDSMI_MAX_NUM_XCC];
855 uint64_t per_gfx_clk_below_host_limit_thm
856 [AMDSMI_MAX_NUM_XCP]
857 [AMDSMI_MAX_NUM_XCC];
859 uint64_t per_low_utilization[AMDSMI_MAX_NUM_XCP]
860 [AMDSMI_MAX_NUM_XCC];
863 uint64_t per_gfx_clk_below_host_limit_total
864 [AMDSMI_MAX_NUM_XCP]
865 [AMDSMI_MAX_NUM_XCC];
867
868 uint8_t active_gfx_clk_below_host_limit_pwr
869 [AMDSMI_MAX_NUM_XCP]
870 [AMDSMI_MAX_NUM_XCC];
872 uint8_t active_gfx_clk_below_host_limit_thm
873 [AMDSMI_MAX_NUM_XCP]
874 [AMDSMI_MAX_NUM_XCC];
876 uint8_t active_low_utilization[AMDSMI_MAX_NUM_XCP]
877 [AMDSMI_MAX_NUM_XCC];
880 uint8_t active_gfx_clk_below_host_limit_total
881 [AMDSMI_MAX_NUM_XCP]
882 [AMDSMI_MAX_NUM_XCC];
888
894typedef struct {
895 amdsmi_range_t supported_freq_range;
896 amdsmi_range_t current_freq_range;
897 uint32_t reserved[8];
898} amdsmi_frequency_range_t;
899
905typedef union {
906 struct bdf_ {
907 uint64_t function_number : 3;
908 uint64_t device_number : 5;
909 uint64_t bus_number : 8;
910 uint64_t domain_number : 48;
911 } bdf;
912 struct {
913 uint64_t function_number : 3;
914 uint64_t device_number : 5;
915 uint64_t bus_number : 8;
916 uint64_t domain_number : 48;
917 };
918 uint64_t as_uint;
919} amdsmi_bdf_t;
920
926typedef struct {
927 uint32_t drm_render;
928 uint32_t drm_card;
929 uint32_t hsa_id;
930 uint32_t hip_id;
933
939typedef enum {
945
951typedef struct {
952 struct pcie_static_ {
953 uint16_t max_pcie_width;
954 uint32_t max_pcie_speed;
955 uint32_t pcie_interface_version;
956 amdsmi_card_form_factor_t slot_type;
957 uint32_t max_pcie_interface_version;
958 uint64_t reserved[9];
959 } pcie_static;
960 struct pcie_metric_ {
961 uint16_t pcie_width;
962 uint32_t pcie_speed;
963 uint32_t pcie_bandwidth;
964 uint64_t pcie_replay_count;
965 uint64_t pcie_l0_to_recovery_count;
967 uint64_t
968 pcie_replay_roll_over_count;
969 uint64_t pcie_nak_sent_count;
970 uint64_t
971 pcie_nak_received_count;
972 uint32_t pcie_lc_perf_other_end_recovery_count;
973 uint64_t reserved[12];
974 } pcie_metric;
975 uint64_t reserved[32];
976} amdsmi_pcie_info_t;
977
983typedef struct {
984 uint64_t power_cap;
985 uint64_t default_power_cap;
986 uint64_t dpm_cap;
987 uint64_t min_power_cap;
988 uint64_t max_power_cap;
989 uint64_t reserved[3];
990} amdsmi_power_cap_info_t;
991
997typedef enum {
1000} amdsmi_power_cap_type_t;
1001
1007typedef struct {
1013 uint64_t reserved[36];
1014} amdsmi_vbios_info_t;
1015
1021typedef enum {
1022 AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,
1023 AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,
1024 AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,
1025 AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,
1026 AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010
1027} amdsmi_cache_property_type_t;
1028
1034typedef struct {
1035 uint32_t num_cache_types;
1036 struct cache_ {
1037 uint32_t cache_properties;
1038 uint32_t cache_size;
1039 uint32_t cache_level;
1040 uint32_t max_num_cu_shared;
1041 uint32_t num_cache_instance;
1042 uint32_t reserved[3];
1043 } cache[AMDSMI_MAX_CACHE_TYPES];
1044 uint32_t reserved[15];
1045} amdsmi_gpu_cache_info_t;
1046
1052typedef struct {
1053 uint8_t num_fw_info;
1054 struct fw_info_list_ {
1055 amdsmi_fw_block_t fw_id;
1056 uint64_t fw_version;
1057 uint64_t reserved[2];
1058 } fw_info_list[AMDSMI_FW_ID__MAX];
1059 uint32_t reserved[7];
1060} amdsmi_fw_info_t;
1061
1067typedef struct {
1069 uint32_t vendor_id;
1071 uint32_t subvendor_id;
1072 uint64_t device_id;
1073 uint32_t rev_id;
1076 uint32_t oam_id;
1077 uint32_t num_of_compute_units;
1078 uint64_t target_graphics_version;
1079 uint32_t subsystem_id;
1080 uint64_t flags;
1081 uint32_t reserved[19];
1082} amdsmi_asic_info_t;
1083
1089typedef struct {
1090 uint64_t kfd_id;
1091 uint32_t node_id;
1092 uint32_t current_partition_id;
1093 uint32_t reserved[12];
1094} amdsmi_kfd_info_t;
1095
1101typedef union {
1102 struct nps_flags_ {
1103 uint32_t nps1_cap : 1;
1104 uint32_t nps2_cap : 1;
1105 uint32_t nps4_cap : 1;
1106 uint32_t nps8_cap : 1;
1107 uint32_t reserved : 28;
1108 } nps_flags;
1109 uint32_t nps_cap_mask;
1110} amdsmi_nps_caps_t;
1111
1118typedef struct {
1119 amdsmi_nps_caps_t partition_caps;
1120 amdsmi_memory_partition_type_t mp_mode;
1121 uint32_t num_numa_ranges;
1122 struct numa_range_ {
1123 amdsmi_vram_type_t memory_type;
1124 uint64_t start;
1125 uint64_t end;
1126 } numa_range[AMDSMI_MAX_NUM_NUMA_NODES];
1127 uint64_t reserved[11];
1129
1135typedef struct {
1136 amdsmi_accelerator_partition_type_t profile_type;
1137 uint32_t num_partitions;
1138 amdsmi_nps_caps_t memory_caps;
1139 uint32_t
1140 profile_index;
1141 uint32_t num_resources;
1143 uint64_t reserved[13];
1145
1152typedef struct {
1153 uint32_t profile_index;
1154 amdsmi_accelerator_partition_resource_type_t resource_type;
1155 uint32_t partition_resource;
1156 uint32_t num_partitions_share_resource;
1157 uint64_t reserved[6];
1159
1165typedef struct {
1166 uint32_t num_profiles;
1167 uint32_t num_resource_profiles;
1169 resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];
1170 uint32_t default_profile_index;
1172 uint64_t reserved[30];
1174
1180typedef enum {
1181 AMDSMI_LINK_TYPE_INTERNAL = 0,
1182 AMDSMI_LINK_TYPE_PCIE = 1,
1183 AMDSMI_LINK_TYPE_XGMI = 2,
1184 AMDSMI_LINK_TYPE_NOT_APPLICABLE = 3,
1185 AMDSMI_LINK_TYPE_UNKNOWN = 4
1186} amdsmi_link_type_t;
1187
1193typedef struct {
1194 uint32_t cpu_util_total;
1195 uint32_t cpu_util_user;
1196 uint32_t cpu_util_nice;
1197 uint32_t cpu_util_sys;
1198 uint32_t cpu_util_irq;
1199} amdsmi_cpu_util_t;
1200
1206typedef enum {
1207 AMDSMI_LINK_STATUS_ENABLED = 0,
1208 AMDSMI_LINK_STATUS_DISABLED = 1,
1209 AMDSMI_LINK_STATUS_INACTIVE = 2,
1210 AMDSMI_LINK_STATUS_ERROR = 3
1211} amdsmi_link_status_t;
1212
1218typedef struct {
1219 uint32_t num_links;
1220 struct _links {
1221 amdsmi_bdf_t bdf;
1222 uint32_t bit_rate;
1223 uint32_t max_bandwidth;
1224 amdsmi_link_type_t link_type;
1225 uint64_t read;
1226 uint64_t write;
1227 amdsmi_link_status_t link_status;
1228 uint64_t reserved[1];
1229 } links[AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK];
1230 uint64_t reserved[7];
1231} amdsmi_link_metrics_t;
1232
1238typedef struct {
1239 amdsmi_vram_type_t vram_type;
1241 uint64_t vram_size;
1242 uint32_t vram_bit_width;
1243 uint64_t vram_max_bandwidth;
1244 uint64_t reserved[37];
1245} amdsmi_vram_info_t;
1246
1252typedef struct {
1256} amdsmi_driver_info_t;
1257
1263typedef struct {
1269 uint64_t reserved[64];
1270} amdsmi_board_info_t;
1271
1279typedef struct {
1280 uint64_t socket_power;
1281 uint32_t current_socket_power;
1283 uint32_t average_socket_power;
1285 uint64_t gfx_voltage;
1286 uint64_t soc_voltage;
1287 uint64_t mem_voltage;
1288 uint32_t power_limit;
1289 uint32_t ubb_power;
1290 uint64_t reserved[18];
1291} amdsmi_power_info_t;
1292
1298typedef struct {
1299 uint32_t clk;
1300 uint32_t min_clk;
1301 uint32_t max_clk;
1302 uint8_t clk_locked;
1303 uint8_t clk_deep_sleep;
1304 uint32_t reserved[4];
1305} amdsmi_clk_info_t;
1306
1316typedef struct {
1317 uint32_t gfx_activity;
1318 uint32_t umc_activity;
1319 uint32_t mm_activity;
1320 uint32_t reserved[13];
1321} amdsmi_engine_usage_t;
1322
1329
1335typedef struct {
1337 amdsmi_process_handle_t pid;
1338 uint64_t mem;
1339 struct engine_usage_ {
1340 uint64_t gfx;
1341 uint64_t enc;
1342 uint32_t reserved[12];
1343 } engine_usage;
1344 struct memory_usage_ {
1345 uint64_t gtt_mem;
1346 uint64_t cpu_mem;
1347 uint64_t vram_mem;
1348 uint32_t reserved[10];
1349 } memory_usage;
1351 uint32_t cu_occupancy;
1352 uint32_t evicted_time;
1353 uint64_t sdma_usage;
1354 uint32_t reserved[8];
1355} amdsmi_proc_info_t;
1356
1362typedef struct {
1363 uint8_t is_iolink_coherent;
1364 uint8_t is_iolink_atomics_32bit;
1365 uint8_t is_iolink_atomics_64bit;
1366 uint8_t is_iolink_dma;
1367 uint8_t is_iolink_bi_directional;
1368} amdsmi_p2p_capability_t;
1369
1372#define AMDSMI_MAX_NUM_FREQUENCIES 33
1373
1377#define AMDSMI_MAX_FAN_SPEED 255
1378
1381#define AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3
1382
1388typedef enum {
1389 AMDSMI_DEV_PERF_LEVEL_AUTO = 0,
1390 AMDSMI_DEV_PERF_LEVEL_FIRST = AMDSMI_DEV_PERF_LEVEL_AUTO,
1400 AMDSMI_DEV_PERF_LEVEL_LAST = AMDSMI_DEV_PERF_LEVEL_DETERMINISM,
1401 AMDSMI_DEV_PERF_LEVEL_UNKNOWN = 0x100
1402} amdsmi_dev_perf_level_t;
1403
1410
1418typedef enum {
1419 AMDSMI_EVNT_GRP_XGMI = 0,
1420 AMDSMI_EVNT_GRP_XGMI_DATA_OUT = 10,
1421 AMDSMI_EVNT_GRP_INVALID = 0xFFFFFFFF
1422} amdsmi_event_group_t;
1423
1454typedef enum {
1455 AMDSMI_EVNT_FIRST = AMDSMI_EVNT_GRP_XGMI,
1456
1457 AMDSMI_EVNT_XGMI_FIRST = AMDSMI_EVNT_GRP_XGMI,
1458 AMDSMI_EVNT_XGMI_0_NOP_TX = AMDSMI_EVNT_XGMI_FIRST,
1466 AMDSMI_EVNT_XGMI_LAST = AMDSMI_EVNT_XGMI_1_BEATS_TX,
1467 AMDSMI_EVNT_XGMI_DATA_OUT_FIRST = AMDSMI_EVNT_GRP_XGMI_DATA_OUT,
1468 AMDSMI_EVNT_XGMI_DATA_OUT_0 = AMDSMI_EVNT_XGMI_DATA_OUT_FIRST,
1474 AMDSMI_EVNT_XGMI_DATA_OUT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_5,
1475 AMDSMI_EVNT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_LAST
1476} amdsmi_event_type_t;
1477
1483typedef enum {
1484 AMDSMI_CNTR_CMD_START = 0,
1485 AMDSMI_CNTR_CMD_STOP
1487} amdsmi_counter_command_t;
1488
1494typedef struct {
1495 uint64_t value;
1496 uint64_t time_enabled;
1497 uint64_t time_running;
1498} amdsmi_counter_value_t;
1499
1505typedef enum {
1506 AMDSMI_EVT_NOTIF_NONE = 0,
1507 AMDSMI_EVT_NOTIF_VMFAULT = 1,
1508 AMDSMI_EVT_NOTIF_FIRST = AMDSMI_EVT_NOTIF_VMFAULT,
1509 AMDSMI_EVT_NOTIF_THERMAL_THROTTLE = 2,
1510 AMDSMI_EVT_NOTIF_GPU_PRE_RESET = 3,
1511 AMDSMI_EVT_NOTIF_GPU_POST_RESET = 4,
1512 AMDSMI_EVT_NOTIF_MIGRATE_START = 5,
1513 AMDSMI_EVT_NOTIF_MIGRATE_END = 6,
1514 AMDSMI_EVT_NOTIF_PAGE_FAULT_START = 7,
1515 AMDSMI_EVT_NOTIF_PAGE_FAULT_END = 8,
1516 AMDSMI_EVT_NOTIF_QUEUE_EVICTION = 9,
1517 AMDSMI_EVT_NOTIF_QUEUE_RESTORE = 10,
1518 AMDSMI_EVT_NOTIF_UNMAP_FROM_GPU = 11,
1519 AMDSMI_EVT_NOTIF_PROCESS_START = 12,
1520 AMDSMI_EVT_NOTIF_PROCESS_END = 13,
1521 AMDSMI_EVT_NOTIF_LAST = AMDSMI_EVT_NOTIF_PROCESS_END
1523
1529#define AMDSMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))
1530
1536typedef struct {
1537 amdsmi_processor_handle processor_handle;
1538 amdsmi_evt_notification_type_t event;
1541
1548typedef enum {
1549 AMDSMI_TEMP_CURRENT = 0x0,
1550 AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,
1551 AMDSMI_TEMP_MAX,
1552 AMDSMI_TEMP_MIN,
1553 AMDSMI_TEMP_MAX_HYST,
1555 AMDSMI_TEMP_MIN_HYST,
1557 AMDSMI_TEMP_CRITICAL,
1561 AMDSMI_TEMP_EMERGENCY,
1567 AMDSMI_TEMP_CRIT_MIN,
1571 AMDSMI_TEMP_OFFSET,
1573 AMDSMI_TEMP_LOWEST,
1574 AMDSMI_TEMP_HIGHEST,
1575 AMDSMI_TEMP_SHUTDOWN,
1576 AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN
1577} amdsmi_temperature_metric_t;
1578
1585typedef enum {
1586 AMDSMI_VOLT_CURRENT = 0x0,
1587
1588 AMDSMI_VOLT_FIRST = AMDSMI_VOLT_CURRENT,
1589 AMDSMI_VOLT_MAX,
1590 AMDSMI_VOLT_MIN_CRIT,
1591 AMDSMI_VOLT_MIN,
1592 AMDSMI_VOLT_MAX_CRIT,
1593 AMDSMI_VOLT_AVERAGE,
1594 AMDSMI_VOLT_LOWEST,
1595 AMDSMI_VOLT_HIGHEST,
1596
1597 AMDSMI_VOLT_LAST = AMDSMI_VOLT_HIGHEST
1598} amdsmi_voltage_metric_t;
1599
1606typedef enum {
1607 AMDSMI_VOLT_TYPE_FIRST = 0,
1608
1609 AMDSMI_VOLT_TYPE_VDDGFX = AMDSMI_VOLT_TYPE_FIRST,
1611 AMDSMI_VOLT_TYPE_LAST = AMDSMI_VOLT_TYPE_VDDBOARD,
1612 AMDSMI_VOLT_TYPE_INVALID = 0xFFFFFFFF
1613} amdsmi_voltage_type_t;
1614
1623typedef enum {
1624 AMDSMI_PWR_PROF_PRST_CUSTOM_MASK = 0x1,
1625 AMDSMI_PWR_PROF_PRST_VIDEO_MASK = 0x2,
1626 AMDSMI_PWR_PROF_PRST_POWER_SAVING_MASK = 0x4,
1627 AMDSMI_PWR_PROF_PRST_COMPUTE_MASK = 0x8,
1628 AMDSMI_PWR_PROF_PRST_VR_MASK = 0x10,
1629
1630 // 3D Full Screen Power Profile
1631 AMDSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK = 0x20,
1632 AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT = 0x40,
1633 AMDSMI_PWR_PROF_PRST_LAST = AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT,
1634
1635 // Invalid power profile
1636 AMDSMI_PWR_PROF_PRST_INVALID = 0xFFFFFFFFFFFFFFFF
1638
1644typedef enum {
1645 AMDSMI_GPU_BLOCK_INVALID = 0,
1646 AMDSMI_GPU_BLOCK_FIRST = (1ULL << 0),
1647 AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
1648 AMDSMI_GPU_BLOCK_SDMA = (1ULL << 1),
1649 AMDSMI_GPU_BLOCK_GFX = (1ULL << 2),
1650 AMDSMI_GPU_BLOCK_MMHUB = (1ULL << 3),
1651 AMDSMI_GPU_BLOCK_ATHUB = (1ULL << 4),
1652 AMDSMI_GPU_BLOCK_PCIE_BIF = (1ULL << 5),
1653 AMDSMI_GPU_BLOCK_HDP = (1ULL << 6),
1654 AMDSMI_GPU_BLOCK_XGMI_WAFL = (1ULL << 7),
1655 AMDSMI_GPU_BLOCK_DF = (1ULL << 8),
1656 AMDSMI_GPU_BLOCK_SMN = (1ULL << 9),
1657 AMDSMI_GPU_BLOCK_SEM = (1ULL << 10),
1658 AMDSMI_GPU_BLOCK_MP0 = (1ULL << 11),
1659 AMDSMI_GPU_BLOCK_MP1 = (1ULL << 12),
1660 AMDSMI_GPU_BLOCK_FUSE = (1ULL << 13),
1661 AMDSMI_GPU_BLOCK_MCA = (1ULL << 14),
1662 AMDSMI_GPU_BLOCK_VCN = (1ULL << 15),
1663 AMDSMI_GPU_BLOCK_JPEG = (1ULL << 16),
1664 AMDSMI_GPU_BLOCK_IH = (1ULL << 17),
1665 AMDSMI_GPU_BLOCK_MPIO = (1ULL << 18),
1666 AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,
1667 AMDSMI_GPU_BLOCK_RESERVED = (1ULL << 63)
1668} amdsmi_gpu_block_t;
1669
1675typedef enum {
1676 CLK_LIMIT_MIN,
1677 CLK_LIMIT_MAX
1678} amdsmi_clk_limit_type_t;
1679
1685typedef enum {
1686 AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,
1687 AMDSMI_CPER_SEV_FATAL = 1,
1688 AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,
1689 AMDSMI_CPER_SEV_NUM = 3,
1690 AMDSMI_CPER_SEV_UNUSED = 10
1691} amdsmi_cper_sev_t;
1692
1698typedef enum {
1699 AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,
1700 AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,
1701 AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,
1702 AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,
1703 AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,
1704 AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,
1705 AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,
1706 AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,
1707 AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,
1708 AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,
1709 AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,
1711 0x49A341DF69293BC9
1712} amdsmi_cper_notify_type_t;
1713
1719typedef struct {
1720 uint16_t dram_non_critical_region_threshold;
1721 uint16_t dram_critical_region_threshold;
1722} amdsmi_gpu_ras_policy_v4_0_t;
1723
1730typedef struct {
1731 uint8_t major_version;
1732 uint8_t minor_version;
1733 union policy_data_ {
1734 amdsmi_gpu_ras_policy_v4_0_t v4_0;
1735 uint64_t info[5];
1736 } policy_data;
1737} amdsmi_gpu_ras_policy_info_t;
1738
1744typedef enum {
1745 AMDSMI_RAS_ERR_STATE_NONE = 0,
1753
1754 AMDSMI_RAS_ERR_STATE_LAST = AMDSMI_RAS_ERR_STATE_ENABLED,
1755 AMDSMI_RAS_ERR_STATE_INVALID = 0xFFFFFFFF
1756} amdsmi_ras_err_state_t;
1757
1765typedef enum {
1766 AMDSMI_MEM_TYPE_FIRST = 0,
1767
1768 AMDSMI_MEM_TYPE_VRAM = AMDSMI_MEM_TYPE_FIRST,
1769 AMDSMI_MEM_TYPE_VIS_VRAM,
1770 AMDSMI_MEM_TYPE_GTT,
1771
1772 AMDSMI_MEM_TYPE_LAST = AMDSMI_MEM_TYPE_GTT
1773} amdsmi_memory_type_t;
1774
1780typedef enum {
1781 AMDSMI_FREQ_IND_MIN = 0,
1782 AMDSMI_FREQ_IND_MAX = 1,
1783 AMDSMI_FREQ_IND_INVALID = 0xFFFFFFFF
1784} amdsmi_freq_ind_t;
1785
1791typedef enum {
1792 AMDSMI_XGMI_STATUS_NO_ERRORS = 0,
1793 AMDSMI_XGMI_STATUS_ERROR,
1795} amdsmi_xgmi_status_t;
1796
1803
1809typedef enum {
1811 0,
1815} amdsmi_memory_page_status_t;
1816
1822typedef enum {
1823 AMDSMI_UTILIZATION_COUNTER_FIRST = 0,
1824 // Course grain activity counters
1826 AMDSMI_UTILIZATION_COUNTER_FIRST,
1829 // Fine grain activity counters
1830 AMDSMI_FINE_GRAIN_GFX_ACTIVITY = 100,
1831 AMDSMI_FINE_GRAIN_MEM_ACTIVITY = 101,
1832 AMDSMI_FINE_DECODER_ACTIVITY = 102,
1833 AMDSMI_UTILIZATION_COUNTER_LAST = AMDSMI_FINE_DECODER_ACTIVITY
1835
1836#define AMDSMI_MAX_UTILIZATION_VALUES 4
1837
1845typedef struct {
1846 amdsmi_utilization_counter_type_t type;
1847 uint64_t value;
1848 uint64_t fine_value[AMDSMI_MAX_UTILIZATION_VALUES];
1849 uint16_t fine_value_count;
1850} amdsmi_utilization_counter_t;
1851
1857typedef struct {
1858 uint64_t page_address;
1859 uint64_t page_size;
1860 amdsmi_memory_page_status_t status;
1861} amdsmi_retired_page_record_t;
1862
1870typedef struct {
1871 amdsmi_bit_field_t available_profiles;
1872 amdsmi_power_profile_preset_masks_t current;
1873 uint32_t num_profiles;
1875
1881typedef struct {
1882 bool has_deep_sleep;
1883 uint32_t num_supported;
1884 uint32_t current;
1885 uint64_t frequency[AMDSMI_MAX_NUM_FREQUENCIES];
1888} amdsmi_frequencies_t;
1889
1895typedef struct {
1896 uint32_t policy_id;
1898} amdsmi_dpm_policy_entry_t;
1899
1900#define AMDSMI_MAX_NUM_PM_POLICIES 32
1901
1909typedef struct {
1910 uint32_t num_supported;
1911 uint32_t current;
1913} amdsmi_dpm_policy_t;
1914
1924typedef struct {
1925 amdsmi_frequencies_t transfer_rate;
1926 uint32_t lanes[AMDSMI_MAX_NUM_FREQUENCIES];
1927} amdsmi_pcie_bandwidth_t;
1928
1934typedef struct {
1935 uint32_t major;
1936 uint32_t minor;
1937 uint32_t release;
1938 const char* build;
1939} amdsmi_version_t;
1940
1946typedef struct {
1947 uint64_t frequency;
1948 uint64_t voltage;
1949} amdsmi_od_vddc_point_t;
1950
1958typedef struct {
1959 amdsmi_range_t freq_range;
1960 amdsmi_range_t volt_range;
1961} amdsmi_freq_volt_region_t;
1962
1969typedef struct {
1971 vc_points[AMDSMI_NUM_VOLTAGE_CURVE_POINTS];
1972} amdsmi_od_volt_curve_t;
1973
1979typedef struct {
1980 amdsmi_range_t curr_sclk_range;
1981 amdsmi_range_t curr_mclk_range;
1982 amdsmi_range_t sclk_freq_limits;
1983 amdsmi_range_t mclk_freq_limits;
1984 amdsmi_od_volt_curve_t curve;
1985 uint32_t num_regions;
1986} amdsmi_od_volt_freq_data_t;
1987
1995typedef struct {
1996 // TODO(amd) Doxygen documents
1997 // Note: This should match: AMDGpuMetricsHeader_v1_t
1999 uint16_t structure_size;
2000 uint8_t format_revision;
2001 uint8_t content_revision;
2003} amd_metrics_table_header_t;
2004
2010typedef struct {
2015 uint32_t gfx_busy_inst[AMDSMI_MAX_NUM_XCC];
2016 uint16_t jpeg_busy[AMDSMI_MAX_NUM_JPEG_ENG_V1];
2018 uint16_t vcn_busy[AMDSMI_MAX_NUM_VCN];
2019 uint64_t gfx_busy_acc[AMDSMI_MAX_NUM_XCC];
2020
2024 /* Total App Clock Counter Accumulated */
2025 uint64_t gfx_below_host_limit_acc[AMDSMI_MAX_NUM_XCC];
2026
2030 /* Total App Clock Counter Accumulated */
2031 uint64_t gfx_below_host_limit_ppt_acc[AMDSMI_MAX_NUM_XCC];
2032 uint64_t gfx_below_host_limit_thm_acc[AMDSMI_MAX_NUM_XCC];
2033 uint64_t gfx_low_utilization_acc[AMDSMI_MAX_NUM_XCC];
2034 uint64_t gfx_below_host_limit_total_acc[AMDSMI_MAX_NUM_XCC];
2035} amdsmi_gpu_xcp_metrics_t;
2036
2052typedef struct {
2053 amd_metrics_table_header_t common_header;
2054
2060 uint16_t temperature_edge;
2061 uint16_t temperature_hotspot;
2062 uint16_t temperature_mem;
2063 uint16_t temperature_vrgfx;
2064 uint16_t temperature_vrsoc;
2065 uint16_t temperature_vrmem;
2066
2070 uint16_t average_gfx_activity;
2071 uint16_t average_umc_activity;
2072 uint16_t average_mm_activity;
2073
2077 uint16_t average_socket_power;
2078 uint64_t energy_accumulator;
2079
2081 uint64_t system_clock_counter;
2082
2086 uint16_t average_gfxclk_frequency;
2087 uint16_t average_socclk_frequency;
2088 uint16_t average_uclk_frequency;
2089 uint16_t average_vclk0_frequency;
2090 uint16_t average_dclk0_frequency;
2091 uint16_t average_vclk1_frequency;
2092 uint16_t average_dclk1_frequency;
2093
2097 uint16_t current_gfxclk;
2098 uint16_t current_socclk;
2099 uint16_t current_uclk;
2100 uint16_t current_vclk0;
2101 uint16_t current_dclk0;
2102 uint16_t current_vclk1;
2103 uint16_t current_dclk1;
2104
2105 uint32_t throttle_status;
2106
2107 uint16_t current_fan_speed;
2108
2112 uint16_t pcie_link_width;
2113 uint16_t pcie_link_speed;
2114
2115 /*
2116 * v1.1 additions
2117 */
2118 uint32_t gfx_activity_acc;
2119 uint32_t mem_activity_acc;
2120 uint16_t temperature_hbm[AMDSMI_NUM_HBM_INSTANCES];
2121
2122 /*
2123 * v1.2 additions
2124 */
2125 uint64_t firmware_timestamp;
2126
2127 /*
2128 * v1.3 additions
2129 */
2130 uint16_t voltage_soc;
2131 uint16_t voltage_gfx;
2132 uint16_t voltage_mem;
2133
2134 uint64_t indep_throttle_status;
2135
2136 /*
2137 * v1.4 additions
2138 */
2139 uint16_t current_socket_power;
2140
2141 uint16_t vcn_activity[AMDSMI_MAX_NUM_VCN];
2142
2143 uint32_t gfxclk_lock_status;
2144
2145 uint16_t xgmi_link_width;
2146 uint16_t xgmi_link_speed;
2147
2148 uint64_t pcie_bandwidth_acc;
2149 uint64_t pcie_bandwidth_inst;
2150 uint64_t pcie_l0_to_recov_count_acc;
2151 uint64_t pcie_replay_count_acc;
2152 uint64_t pcie_replay_rover_count_acc;
2153
2157 uint64_t xgmi_read_data_acc[AMDSMI_MAX_NUM_XGMI_LINKS];
2158 uint64_t xgmi_write_data_acc[AMDSMI_MAX_NUM_XGMI_LINKS];
2159
2163 uint16_t current_gfxclks[AMDSMI_MAX_NUM_GFX_CLKS];
2164 uint16_t current_socclks[AMDSMI_MAX_NUM_CLKS];
2165 uint16_t current_vclk0s[AMDSMI_MAX_NUM_CLKS];
2166 uint16_t current_dclk0s[AMDSMI_MAX_NUM_CLKS];
2167
2171 uint16_t jpeg_activity[AMDSMI_MAX_NUM_JPEG];
2172 uint32_t pcie_nak_sent_count_acc;
2173 uint32_t pcie_nak_rcvd_count_acc;
2174
2178 uint64_t accumulation_counter;
2179
2183 uint64_t prochot_residency_acc;
2184
2200 uint64_t ppt_residency_acc;
2201
2217 uint64_t socket_thm_residency_acc;
2218 uint64_t vr_thm_residency_acc;
2219 uint64_t hbm_thm_residency_acc;
2220
2221 uint16_t num_partition;
2222
2224 xcp_stats[AMDSMI_MAX_NUM_XCP];
2225
2226 uint32_t pcie_lc_perf_other_end_recovery;
2227
2231 uint64_t vram_max_bandwidth;
2232
2233 uint16_t xgmi_link_status[AMDSMI_MAX_NUM_XGMI_LINKS];
2234} amdsmi_gpu_metrics_t;
2235
2241typedef enum {
2242 AMDSMI_XGMI_LINK_DOWN,
2243 AMDSMI_XGMI_LINK_UP,
2246
2252typedef struct {
2253 uint32_t total_links;
2255 uint64_t reserved[7];
2256} amdsmi_xgmi_link_status_t;
2257
2263typedef struct {
2265 uint64_t value;
2266} amdsmi_name_value_t;
2267
2273typedef enum {
2274 AMDSMI_REG_XGMI,
2275 AMDSMI_REG_WAFL,
2276 AMDSMI_REG_PCIE,
2277 AMDSMI_REG_USR,
2278 AMDSMI_REG_USR1
2279} amdsmi_reg_type_t;
2280
2286typedef struct {
2287 uint32_t ras_eeprom_version;
2289 uint32_t ecc_correction_schema_flag;
2292 struct ras_info_ {
2293 uint32_t dram_ecc : 1;
2294 uint32_t sram_ecc : 1;
2295 uint32_t poisoning : 1;
2296 uint32_t rsvd : 29;
2297 } ras_info;
2298 bool needs_reboot;
2299} amdsmi_ras_feature_t;
2300
2306typedef struct {
2307 uint64_t correctable_count;
2308 uint64_t uncorrectable_count;
2309 uint64_t deferred_count;
2310 uint64_t reserved[5];
2311} amdsmi_error_count_t;
2312
2319typedef struct {
2320 uint32_t process_id;
2321 uint64_t vram_usage;
2322 uint64_t sdma_usage;
2323 uint32_t cu_occupancy;
2324 uint32_t evicted_time;
2325} amdsmi_process_info_t;
2326
2332typedef struct {
2333 uint32_t count;
2335 uint64_t reserved[15];
2336} amdsmi_topology_nearest_t;
2337
2346typedef enum {
2347 AMDSMI_VIRTUALIZATION_MODE_UNKNOWN = 0,
2352} amdsmi_virtualization_mode_t;
2353
2359typedef enum {
2362} amdsmi_affinity_scope_t;
2363
2370
2376typedef struct {
2377 amdsmi_npm_status_t status;
2378 uint64_t limit;
2379 uint32_t ubb_power_threshold;
2380 uint64_t reserved[5];
2381} amdsmi_npm_info_t;
2382
2391typedef enum {
2392 AMDSMI_PTL_DATA_FORMAT_I8 = 0x0,
2393 AMDSMI_PTL_DATA_FORMAT_F16 = 0x1,
2394 AMDSMI_PTL_DATA_FORMAT_BF16 = 0x2,
2395 AMDSMI_PTL_DATA_FORMAT_F32 = 0x3,
2396 AMDSMI_PTL_DATA_FORMAT_F64 = 0x4,
2397 AMDSMI_PTL_DATA_FORMAT_F8 = 0x5,
2398 AMDSMI_PTL_DATA_FORMAT_VECTOR = 0x6,
2399 AMDSMI_PTL_DATA_FORMAT_INVALID = 0xFFFFFFFF
2400} amdsmi_ptl_data_format_t;
2401
2402#ifdef ENABLE_ESMI_LIB
2403
2409typedef struct {
2410 uint8_t debug;
2411 uint8_t minor;
2412 uint8_t major;
2413 uint8_t unused;
2414} amdsmi_smu_fw_version_t;
2415
2421typedef struct {
2422 uint32_t max_bw;
2423 uint32_t utilized_bw;
2424 uint32_t utilized_pct;
2425} amdsmi_ddr_bw_metrics_t;
2426
2432typedef struct {
2433 uint8_t range : 3;
2434 uint8_t ref_rate : 1;
2436
2442typedef struct {
2443 uint16_t power : 15;
2444 uint16_t update_rate : 9;
2445 uint8_t dimm_addr;
2446} amdsmi_dimm_power_t;
2447
2453typedef struct {
2454 uint16_t sensor : 11;
2455 uint16_t update_rate : 9;
2456 uint8_t dimm_addr;
2457 float temp;
2458} amdsmi_dimm_thermal_t;
2459
2465typedef enum {
2466 AGG_BW0 = 1,
2467 RD_BW0 = 2,
2468 WR_BW0 = 4
2469} amdsmi_io_bw_encoding_t;
2470
2480typedef struct {
2481 amdsmi_io_bw_encoding_t bw_type;
2482 char* link_name;
2483} amdsmi_link_id_bw_type_t;
2484
2491typedef struct {
2492 uint8_t max_dpm_level;
2493 uint8_t min_dpm_level;
2494} amdsmi_dpm_level_t;
2495
2501typedef struct __attribute__((__packed__)) {
2502 uint32_t accumulation_counter;
2504
2505 uint32_t max_socket_temperature;
2507 uint32_t max_vr_temperature;
2509 uint32_t max_hbm_temperature;
2510 uint64_t max_socket_temperature_acc;
2511 uint64_t max_vr_temperature_acc;
2512 uint64_t max_hbm_temperature_acc;
2513
2514 uint32_t socket_power_limit;
2516 uint32_t max_socket_power_limit;
2518 uint32_t socket_power;
2519
2520 uint64_t timestamp;
2521 uint64_t socket_energy_acc;
2522 uint64_t ccd_energy_acc;
2523 uint64_t xcd_energy_acc;
2524 uint64_t aid_energy_acc;
2525 uint64_t hbm_energy_acc;
2526
2527 uint32_t cclk_frequency_limit;
2529 uint32_t gfxclk_frequency_limit;
2531 uint32_t fclk_frequency;
2532 uint32_t uclk_frequency;
2533 uint32_t socclk_frequency[4];
2534 uint32_t vclk_frequency[4];
2535 uint32_t dclk_frequency[4];
2536 uint32_t lclk_frequency[4];
2537 uint64_t gfxclk_frequency_acc[8];
2538 uint64_t cclk_frequency_acc[96];
2539
2540 uint32_t max_cclk_frequency;
2541 uint32_t min_cclk_frequency;
2542 uint32_t max_gfxclk_frequency;
2543 uint32_t min_gfxclk_frequency;
2544 uint32_t fclk_frequency_table[4];
2546 uint32_t uclk_frequency_table[4];
2548 uint32_t socclk_frequency_table[4];
2550 uint32_t vclk_frequency_table[4];
2552 uint32_t dclk_frequency_table[4];
2554 uint32_t lclk_frequency_table[4];
2556 uint32_t max_lclk_dpm_range;
2557 uint32_t min_lclk_dpm_range;
2558
2559 uint32_t xgmi_width;
2560 uint32_t xgmi_bitrate;
2561 uint64_t xgmi_read_bandwidth_acc[8];
2563 uint64_t xgmi_write_bandwidth_acc[8];
2565
2566 uint32_t socket_c0_residency;
2567 uint32_t socket_gfx_busy;
2568 uint32_t
2569 dram_bandwidth_utilization;
2570 uint64_t socket_c0_residency_acc;
2571 uint64_t socket_gfx_busy_acc;
2572 uint64_t dram_bandwidth_acc;
2573 uint32_t max_dram_bandwidth;
2575 uint64_t dram_bandwidth_utilization_acc;
2576 uint64_t
2577 pcie_bandwidth_acc[4];
2578
2579 uint32_t prochot_residency_acc;
2580 uint32_t ppt_residency_acc;
2581 uint32_t socket_thm_residency_acc;
2583 uint32_t vr_thm_residency_acc;
2585 uint32_t hbm_thm_residency_acc;
2587 uint32_t spare;
2588
2589 uint32_t gfxclk_frequency[8];
2590} amdsmi_hsmp_metrics_table_t;
2591
2597static char* const amdsmi_hsmp_freqlimit_src_names[] = {
2598 "cHTC-Active", "PROCHOT", "TDC limit", "PPT Limit",
2599 "OPN Max", "Reliability Limit", "APML Agent", "HSMP Agent"};
2600
2606typedef struct {
2608 uint32_t cpu_family_id;
2609 uint32_t model_id;
2610 uint32_t threads_per_core;
2611 uint32_t cores_per_socket;
2612 bool frequency_boost;
2613 uint32_t vendor_id;
2615 uint32_t subvendor_id;
2616 uint64_t device_id;
2617 uint32_t rev_id;
2619 uint32_t socket_id;
2620 uint32_t core_id;
2621 uint32_t num_of_cpu_cores;
2622 uint32_t socket_count;
2623 uint32_t core_count;
2624 uint32_t reserved[17];
2625} amdsmi_cpu_info_t;
2626
2627#endif
2628
2634typedef struct {
2635 uint32_t socket_id;
2636 uint32_t cores_per_socket;
2637} amdsmi_sock_info_t;
2638
2644#define AMDSMI_MAX_NIC_PORTS 32
2645#define AMDSMI_MAX_NIC_RDMA_DEV 32
2646#define AMDSMI_MAX_NIC_FW 16
2647
2654typedef enum {
2661} amdsmi_nic_link_type_t;
2662
2670typedef struct {
2672 uint64_t value;
2673} amdsmi_nic_stat_t;
2674
2680typedef struct {
2681 uint16_t vendor_id;
2682 uint16_t subvendor_id;
2683 uint16_t device_id;
2684 uint16_t subsystem_id;
2685 uint8_t revision;
2691} amdsmi_nic_asic_info_t;
2692
2698typedef struct {
2699 amdsmi_bdf_t bdf;
2700 uint8_t max_pcie_width;
2701 uint32_t max_pcie_speed;
2704} amdsmi_nic_bus_info_t;
2705
2711typedef struct {
2712 uint8_t node;
2714} amdsmi_nic_numa_info_t;
2715
2721typedef struct {
2724} amdsmi_nic_fw_t;
2725
2731typedef struct {
2732 uint32_t num_fw;
2734} amdsmi_nic_fw_info_t;
2735
2758typedef struct {
2759 amdsmi_bdf_t bdf;
2760 uint32_t port_num;
2764 uint8_t ifindex;
2766 uint8_t carrier;
2767 uint16_t mtu;
2769 uint32_t link_speed;
2770 uint32_t active_fec;
2775} amdsmi_nic_port_t;
2776
2782typedef struct {
2783 uint32_t num_ports;
2785} amdsmi_nic_port_info_t;
2786
2792typedef struct {
2795} amdsmi_nic_driver_info_t;
2796
2802typedef struct {
2805 uint8_t rdma_port;
2806 uint16_t max_mtu;
2807 uint16_t active_mtu;
2808} amdsmi_nic_rdma_port_info_t;
2809
2815typedef struct {
2821 uint8_t num_rdma_ports;
2823} amdsmi_nic_rdma_dev_info_t;
2824
2830typedef struct {
2831 uint8_t num_rdma_dev;
2834
2835/*****************************************************************************/
2865
2881
2884/*****************************************************************************/
2922 amdsmi_socket_handle* socket_handles);
2923
2924#ifdef ENABLE_ESMI_LIB
2925
2954 amdsmi_processor_handle* processor_handles);
2955
2956#endif
2957
2977amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char* name);
2978
2979#ifdef ENABLE_ESMI_LIB
2980
3000 char* name);
3001
3025amdsmi_status_t amdsmi_get_processor_count_from_handles(amdsmi_processor_handle* processor_handles,
3026 uint32_t* processor_count,
3027 uint32_t* nr_cpusockets,
3028 uint32_t* nr_cpucores, uint32_t* nr_gpus);
3029
3059 processor_type_t processor_type,
3060 amdsmi_processor_handle* processor_handles,
3061 uint32_t* processor_count);
3062
3063#endif
3064
3107 uint32_t* processor_count,
3108 amdsmi_processor_handle* processor_handles);
3109
3131 amdsmi_node_handle* node_handle);
3132
3133#ifdef ENABLE_ESMI_LIB
3161 amdsmi_processor_handle* processor_handles);
3162#endif
3163
3184 processor_type_t* processor_type);
3185
3204 amdsmi_processor_handle* processor_handle);
3205
3221 amdsmi_bdf_t* bdf);
3222
3243 unsigned int* uuid_length, char* uuid);
3244
3264 amdsmi_enumeration_info_t* info);
3265
3294 uint32_t cpu_set_size, uint64_t* cpu_set,
3295 amdsmi_affinity_scope_t scope);
3296
3315 amdsmi_virtualization_mode_t* mode);
3316
3319/*****************************************************************************/
3352
3371 uint16_t* revision);
3372
3408amdsmi_status_t amdsmi_get_gpu_vendor_name(amdsmi_processor_handle processor_handle, char* name,
3409 size_t len);
3410
3437amdsmi_status_t amdsmi_get_gpu_vram_vendor(amdsmi_processor_handle processor_handle, char* brand,
3438 uint32_t len);
3439
3463amdsmi_status_t amdsmi_get_gpu_subsystem_id(amdsmi_processor_handle processor_handle, uint16_t* id);
3464
3500amdsmi_status_t amdsmi_get_gpu_subsystem_name(amdsmi_processor_handle processor_handle, char* name,
3501 size_t len);
3502
3505/*****************************************************************************/
3533 amdsmi_pcie_bandwidth_t* bandwidth);
3534
3573amdsmi_status_t amdsmi_get_gpu_bdf_id(amdsmi_processor_handle processor_handle, uint64_t* bdfid);
3574
3599 int32_t* numa_node);
3600
3628 uint64_t* sent, uint64_t* received,
3629 uint64_t* max_pkt_sz);
3630
3655 uint64_t* counter);
3656
3659/*****************************************************************************/
3700 uint64_t bw_bitmask);
3701
3704/*****************************************************************************/
3742 uint64_t* energy_accumulator, float* counter_resolution,
3743 uint64_t* timestamp);
3744
3747/*****************************************************************************/
3775amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind,
3776 uint64_t cap);
3777
3800 uint32_t reserved,
3801 amdsmi_power_profile_preset_masks_t profile);
3802
3824 uint32_t* sensor_count, uint32_t* sensor_inds,
3825 amdsmi_power_cap_type_t* sensor_types);
3826
3841 double* ppower);
3842
3857 double* pcap);
3858
3873 double* pmax);
3874
3888amdsmi_status_t amdsmi_get_cpu_pwr_svi_telemetry_all_rails(amdsmi_processor_handle processor_handle,
3889 uint32_t* power);
3890
3905 uint32_t pcap);
3906
3925 uint8_t power_efficiency_mode,
3926 uint32_t* utilization, uint32_t* ppt_limit);
3927
3949 uint32_t* power_efficiency_mode,
3950 uint32_t* utilization, double* ppt_limit);
3967 double* power);
3968
3971/*****************************************************************************/
4005 amdsmi_memory_type_t mem_type, uint64_t* total);
4006
4034 amdsmi_memory_type_t mem_type, uint64_t* used);
4035
4061 uint32_t* num_pages,
4062 amdsmi_retired_page_record_t* info);
4063
4083 uint32_t* threshold);
4084
4105
4131amdsmi_status_t amdsmi_get_gpu_ras_block_features_enabled(amdsmi_processor_handle processor_handle,
4132 amdsmi_gpu_block_t block,
4133 amdsmi_ras_err_state_t* state);
4134
4171 uint32_t* num_pages,
4172 amdsmi_retired_page_record_t* records);
4173
4176/*****************************************************************************/
4210 uint32_t sensor_ind, int64_t* speed);
4211
4240 uint32_t sensor_ind, int64_t* speed);
4241
4269 uint32_t sensor_ind, uint64_t* max_speed);
4270
4286 amdsmi_gpu_cache_info_t* info);
4287
4320 amdsmi_voltage_type_t sensor_type,
4321 amdsmi_voltage_metric_t metric, int64_t* voltage);
4322
4325/*****************************************************************************/
4348amdsmi_status_t amdsmi_reset_gpu_fan(amdsmi_processor_handle processor_handle, uint32_t sensor_ind);
4349
4375 uint32_t sensor_ind, uint64_t speed);
4376
4379/*****************************************************************************/
4403 uint32_t* gpu_busy_percent);
4404
4436 amdsmi_utilization_counter_t utilization_counters[],
4437 uint32_t count, uint64_t* timestamp);
4438
4463 amdsmi_dev_perf_level_t* perf);
4464
4488 uint64_t clkvalue);
4489
4514 uint32_t* od);
4515
4540 uint32_t* od);
4541
4567
4587
4612 amdsmi_od_volt_freq_data_t* odv);
4613
4635 amd_metrics_table_header_t* header_value);
4636
4660 amdsmi_gpu_metrics_t* pgpu_metrics);
4661
4684 amdsmi_gpu_metrics_t* pgpu_metrics);
4685
4721 amdsmi_name_value_t** pm_metrics,
4722 uint32_t* num_of_metrics);
4723
4761 amdsmi_reg_type_t reg_type,
4762 amdsmi_name_value_t** reg_metrics,
4763 uint32_t* num_of_metrics);
4764
4793 uint64_t minclkvalue, uint64_t maxclkvalue,
4794 amdsmi_clk_type_t clkType);
4795
4819 amdsmi_clk_type_t clk_type,
4820 amdsmi_clk_limit_type_t limit_type, uint64_t clk_value);
4821
4847 amdsmi_freq_ind_t level, uint64_t clkvalue,
4848 amdsmi_clk_type_t clkType);
4849
4874 uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue);
4875
4916 uint32_t* num_regions,
4917 amdsmi_freq_volt_region_t* buffer);
4918
4955 uint32_t sensor_ind,
4956 amdsmi_power_profile_status_t* status);
4957
4960/*****************************************************************************/
4989 amdsmi_dev_perf_level_t perf_lvl);
4990
5032 uint32_t od);
5033
5071 amdsmi_clk_type_t clk_type, uint64_t freq_bitmask);
5072
5093 amdsmi_dpm_policy_t* policy);
5094
5116amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id);
5117
5138 amdsmi_dpm_policy_t* xgmi_plpd);
5139
5161amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id);
5162
5183 uint32_t* pisolate);
5184
5205 uint32_t pisolate);
5206
5225
5228/*****************************************************************************/
5251
5254/*****************************************************************************/
5290
5323 uint64_t* enabled_blocks);
5324
5346 amdsmi_error_count_t* ec);
5347
5350#pragma pack(push, 1)
5351
5357typedef struct {
5358 unsigned char b[16];
5359} amdsmi_cper_guid_t;
5360
5361typedef struct {
5362 uint8_t seconds;
5363 uint8_t minutes;
5364 uint8_t hours;
5365 uint8_t flag;
5366 uint8_t day;
5367 uint8_t month;
5368 uint8_t year;
5369 uint8_t century;
5370} amdsmi_cper_timestamp_t;
5371
5372typedef union {
5373 struct valid_bits_ {
5374 uint32_t platform_id : 1;
5375 uint32_t timestamp : 1;
5376 uint32_t partition_id : 1;
5377 uint32_t reserved : 29;
5378 } valid_bits;
5379 uint32_t valid_mask;
5380} amdsmi_cper_valid_bits_t;
5381
5382typedef struct {
5383 char signature[4];
5384 uint16_t revision;
5385 uint32_t signature_end;
5386 uint16_t sec_cnt;
5387 amdsmi_cper_sev_t error_severity;
5388 amdsmi_cper_valid_bits_t cper_valid_bits;
5389 uint32_t record_length;
5390 amdsmi_cper_timestamp_t timestamp;
5391 char platform_id[16];
5392 amdsmi_cper_guid_t partition_id;
5393 char creator_id[16];
5394 amdsmi_cper_guid_t notify_type;
5395 char record_id[8];
5396 uint32_t flags;
5397 uint64_t persistence_info;
5398 uint8_t reserved[12];
5399} amdsmi_cper_hdr_t;
5400
5401#pragma pack(pop)
5402
5403/*****************************************************************************/
5434amdsmi_status_t amdsmi_get_afids_from_cper(char* cper_buffer, uint32_t buf_size, uint64_t* afids,
5435 uint32_t* num_afids);
5436
5452 amdsmi_ras_feature_t* ras_feature);
5453
5493 uint32_t severity_mask, char* cper_data,
5494 uint64_t* buf_size, amdsmi_cper_hdr_t** cper_hdrs,
5495 uint64_t* entry_count, uint64_t* cursor);
5496
5499/*****************************************************************************/
5538
5557amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char** status_string);
5558
5561/*****************************************************************************/
5682 amdsmi_event_group_t group);
5683
5713 amdsmi_event_type_t type,
5714 amdsmi_event_handle_t* evnt_handle);
5715
5733
5757
5779 amdsmi_counter_value_t* value);
5780
5804 amdsmi_event_group_t grp, uint32_t* available);
5805
5808/*****************************************************************************/
5847 uint32_t* num_items);
5848
5870 amdsmi_process_info_t* proc);
5871
5906 uint32_t* num_devices);
5907
5910/*****************************************************************************/
5941 amdsmi_xgmi_status_t* status);
5942
5960
5976 amdsmi_xgmi_info_t* info);
5977
5996 amdsmi_xgmi_link_status_t* link_status);
5997
6000/*****************************************************************************/
6021 amdsmi_link_metrics_t* link_metrics);
6022
6043 uint32_t* numa_node);
6044
6068 amdsmi_processor_handle processor_handle_dst,
6069 uint64_t* weight);
6070
6098 uint64_t* min_bandwidth, uint64_t* max_bandwidth);
6099
6127 amdsmi_processor_handle processor_handle_dst,
6128 uint64_t* hops, amdsmi_link_type_t* type);
6129
6156 amdsmi_link_type_t link_type,
6157 amdsmi_topology_nearest_t* topology_nearest_info);
6158
6182 amdsmi_processor_handle processor_handle_dst,
6183 bool* accessible);
6184
6212 amdsmi_processor_handle processor_handle_dst,
6214
6217/*****************************************************************************/
6257 char* compute_partition, uint32_t len);
6258
6287 amdsmi_compute_partition_type_t compute_partition);
6288
6289/*****************************************************************************/
6329 char* memory_partition, uint32_t len);
6330
6361 amdsmi_memory_partition_type_t memory_partition);
6362
6377amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle,
6378 amdsmi_memory_partition_config_t* config);
6379
6407 amdsmi_memory_partition_type_t mode);
6408
6411/*****************************************************************************/
6436 amdsmi_processor_handle processor_handle,
6437 amdsmi_accelerator_partition_profile_config_t* profile_config);
6438
6461 uint32_t* partition_id);
6462
6481 amdsmi_processor_handle processor_handle, uint32_t profile_index);
6482
6485/*****************************************************************************/
6510
6541amdsmi_status_t amdsmi_set_gpu_event_notification_mask(amdsmi_processor_handle processor_handle,
6542 uint64_t mask);
6543
6584 amdsmi_evt_notification_data_t* data);
6585
6605
6608/*****************************************************************************/
6629 amdsmi_driver_info_t* info);
6630
6633/*****************************************************************************/
6661 amdsmi_asic_info_t* info);
6662
6682 amdsmi_kfd_info_t* info);
6683
6699 amdsmi_vram_info_t* info);
6700
6716 amdsmi_board_info_t* info);
6717
6737 uint32_t sensor_ind, amdsmi_power_cap_info_t* info);
6738
6754 amdsmi_pcie_info_t* info);
6755
6773 uint16_t* xcd_count);
6774
6799
6802/*****************************************************************************/
6822 amdsmi_fw_info_t* info);
6823
6840 amdsmi_vbios_info_t* info);
6841
6844/*****************************************************************************/
6879 amdsmi_temperature_type_t sensor_type,
6880 amdsmi_temperature_metric_t metric, int64_t* temperature);
6881
6897 amdsmi_engine_usage_t* info);
6898
6917 amdsmi_power_info_t* info);
6918
6932amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle,
6933 bool* enabled);
6934
6956
6971 amdsmi_vram_usage_t* info);
6972
6993 amdsmi_violation_status_t* info);
6994
6997/*****************************************************************************/
7057 uint32_t* max_processes, amdsmi_proc_info_t* list);
7058
7061/*****************************************************************************/
7114
7117/*****************************************************************************/
7142amdsmi_status_t amdsmi_get_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool* enabled);
7143
7162amdsmi_status_t amdsmi_set_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool enable);
7163
7187 amdsmi_ptl_data_format_t* data_format1,
7188 amdsmi_ptl_data_format_t* data_format2);
7189
7215 amdsmi_ptl_data_format_t data_format1,
7216 amdsmi_ptl_data_format_t data_format2);
7217
7220#ifdef ENABLE_ESMI_LIB
7221
7222/*****************************************************************************/
7241 uint64_t* penergy);
7242
7257 uint64_t* penergy);
7258
7261/*****************************************************************************/
7278
7292 amdsmi_processor_handle processor_handle, amdsmi_hsmp_driver_version_t* amdsmi_hsmp_driver_ver);
7293
7307 amdsmi_smu_fw_version_t* amdsmi_smu_fw);
7308
7322 uint32_t* proto_ver);
7323
7338 uint32_t* prochot);
7339
7355amdsmi_status_t amdsmi_get_cpu_fclk_mclk(amdsmi_processor_handle processor_handle, uint32_t* fclk,
7356 uint32_t* mclk);
7357
7371amdsmi_status_t amdsmi_get_cpu_cclk_limit(amdsmi_processor_handle processor_handle, uint32_t* cclk);
7372
7390
7407 uint16_t* fmax, uint16_t* fmin);
7408
7422amdsmi_status_t amdsmi_get_cpu_core_current_freq_limit(amdsmi_processor_handle processor_handle,
7423 uint32_t* freq);
7424
7453 bool* rail_isofreq_policy);
7454
7483 uint8_t* rail_isofreq_policy);
7484
7505 uint8_t* dfc_ctrl);
7506
7526 uint8_t* dfc_ctrl);
7527
7530/*****************************************************************************/
7549 uint32_t* pboostlimit);
7550
7565 uint32_t* pc0_residency);
7566
7581 uint32_t boostlimit);
7582
7597 uint32_t boostlimit);
7598
7615 uint32_t* floor_freq);
7616
7633 uint32_t* floor_freq);
7634
7650amdsmi_status_t amdsmi_get_cpu_core_eff_floor_freq_limit(amdsmi_processor_handle processor_handle,
7651 uint32_t* eff_floor_freq);
7652
7669 uint32_t* eff_floor_freq);
7670
7687 uint32_t floor_freq);
7688
7705 uint32_t floor_freq);
7706
7724 uint32_t msr_floor_freq);
7725
7741amdsmi_status_t amdsmi_set_cpu_core_msr_floor_freq_limit(amdsmi_processor_handle processor_handle,
7742 uint32_t msr_floor_freq);
7743
7759
7774 uint32_t sdps_limit);
7775
7789 double* sdps_limit);
7790
7793/*****************************************************************************/
7812 amdsmi_ddr_bw_metrics_t* ddr_bw);
7813
7816/*****************************************************************************/
7835 uint32_t* ptmon);
7836
7857amdsmi_status_t amdsmi_get_cpu_tdelta(amdsmi_processor_handle processor_handle, uint8_t* tdelta);
7858
7881amdsmi_status_t amdsmi_get_cpu_svi3_vr_controller_temp(amdsmi_processor_handle processor_handle,
7882 uint32_t* rail_selection,
7883 uint32_t* rail_index, uint32_t* temp);
7884
7887/*****************************************************************************/
7908 amdsmi_processor_handle processor_handle, uint8_t dimm_addr,
7909 amdsmi_temp_range_refresh_rate_t* rate);
7910
7925 uint8_t dimm_addr,
7926 amdsmi_dimm_power_t* dimm_pow);
7927
7944 uint8_t dimm_addr,
7945 amdsmi_dimm_thermal_t* dimm_temp);
7946
7972 uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset,
7973 uint32_t reg_space, uint32_t* data);
7999 uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset,
8000 uint32_t reg_space, uint32_t write_data);
8001
8004/*****************************************************************************/
8024amdsmi_status_t amdsmi_set_cpu_xgmi_width(amdsmi_processor_handle processor_handle, uint8_t min,
8025 uint8_t max);
8026
8029/*****************************************************************************/
8050 uint8_t min_link_width,
8051 uint8_t max_link_width);
8052
8055/*****************************************************************************/
8072
8086amdsmi_status_t amdsmi_cpu_apb_disable(amdsmi_processor_handle processor_handle, uint8_t pstate);
8087
8106 uint8_t nbio_id, uint8_t min, uint8_t max);
8107
8124 uint8_t nbio_id, amdsmi_dpm_level_t* nbio);
8125
8142 uint8_t rate_ctrl, uint8_t* prev_mode);
8143
8160 uint8_t min_pstate, uint8_t max_pstate);
8161
8185 uint8_t min_pstate, uint8_t max_pstate);
8186
8211 uint8_t* min_pstate, uint8_t* max_pstate);
8212
8234 uint8_t* enabled);
8235
8255amdsmi_status_t amdsmi_set_cpu_pc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable);
8256
8278 uint8_t* enabled);
8279
8301amdsmi_status_t amdsmi_set_cpu_cc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable);
8302
8305/*****************************************************************************/
8326 amdsmi_link_id_bw_type_t link, uint32_t* io_bw);
8327
8344 amdsmi_link_id_bw_type_t link, uint32_t* xgmi_bw);
8345
8348/*****************************************************************************/
8367 uint32_t* metrics_version);
8368
8383 amdsmi_hsmp_metrics_table_t* metrics_table);
8384
8387/*****************************************************************************/
8405amdsmi_status_t amdsmi_first_online_core_on_cpu_socket(amdsmi_processor_handle processor_handle,
8406 uint32_t* pcore_ind);
8407
8420
8433
8459 amdsmi_cpu_info_t* cpu_info);
8460
8479
8492amdsmi_status_t amdsmi_get_cpu_cores_per_socket(uint32_t sock_count, amdsmi_sock_info_t* soc_info);
8493
8506
8527 bool* r_mask, uint32_t* mask0, uint32_t* mask1,
8528 uint32_t* mask2);
8529
8532#endif
8533
8534/*****************************************************************************/
8554 amdsmi_nic_driver_info_t* info);
8555
8571 amdsmi_nic_asic_info_t* info);
8572
8588 amdsmi_nic_bus_info_t* info);
8589
8605 amdsmi_nic_numa_info_t* info);
8606
8622 amdsmi_nic_port_info_t* info);
8623
8639 amdsmi_nic_rdma_devices_info_t* info);
8640
8664 uint32_t rdma_port_index, uint32_t* num_stats,
8665 amdsmi_nic_stat_t* stats);
8666
8679#define AMDSMI_MAX_CARVEOUT_OPTIONS 16
8684typedef struct {
8685 uint32_t index;
8687} amdsmi_uma_carveout_option_t;
8688
8692typedef struct {
8693 uint32_t current_index;
8694 uint32_t num_options;
8696 options[AMDSMI_MAX_CARVEOUT_OPTIONS];
8697} amdsmi_uma_carveout_info_t;
8698
8702typedef struct {
8703 uint64_t current_pages;
8704} amdsmi_ttm_info_t;
8705
8728 amdsmi_uma_carveout_info_t* info);
8729
8750 uint32_t option_index);
8751
8772
8793
8811
8814#ifdef __cplusplus
8815}
8816#endif // __cplusplus
8817
8818#endif // __AMDSMI_H__
amdsmi_accelerator_partition_resource_type_t
Accelerator Partition Resource Types.
Definition amdsmi.h:459
#define AMDSMI_MAX_NUM_XCP
This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Gr...
Definition amdsmi.h:182
#define AMDSMI_MAX_NUM_XCC
This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units...
Definition amdsmi.h:168
amdsmi_vram_type_t
vRam Types. This enum is used to identify various VRam types.
Definition amdsmi.h:712
amdsmi_event_group_t
Event Groups Enum denoting an event group. The value of the enum is the base value for all the event ...
Definition amdsmi.h:1418
#define AMDSMI_MAX_ACCELERATOR_PARTITIONS
Maximum number of accelerator partitions.
Definition amdsmi.h:70
amdsmi_event_type_t
Event types Event type enum. Events belonging to a particular event group amdsmi_event_group_t should...
Definition amdsmi.h:1454
#define AMDSMI_MAX_CP_PROFILE_RESOURCES
Maximum number of compute profile resources.
Definition amdsmi.h:69
#define AMDSMI_MAX_UTILIZATION_VALUES
The max number of values per counter type.
Definition amdsmi.h:1836
amdsmi_fw_block_t
The values of this enum are used to identify the various firmware blocks.
Definition amdsmi.h:609
amdsmi_voltage_metric_t
Voltage Metrics. This enum is used to identify various Voltage metrics. Corresponding values will be ...
Definition amdsmi.h:1585
amdsmi_nic_link_type_t
NIC Link Types. This enum is used to identify the link type between NIC and GPU processors based on t...
Definition amdsmi.h:2654
#define AMDSMI_MAX_NUM_JPEG_ENG_V1
Introduced in gpu metrics v1.8, document presents NUM_JPEG_ENG_V1 but will change to AMDSMI_MAX_NUM_J...
Definition amdsmi.h:155
amdsmi_voltage_type_t
This ennumeration is used to indicate which type of voltage reading should be obtained.
Definition amdsmi.h:1606
void * amdsmi_processor_handle
opaque handler point to underlying implementation
Definition amdsmi.h:276
#define AMDSMI_MAX_NUM_PM_POLICIES
Maximum number of power management policies.
Definition amdsmi.h:1900
amdsmi_ptl_data_format_t
PTL (Peak Tops Limiter) data format types These correspond to the hardware data types used in matrix ...
Definition amdsmi.h:2391
void * amdsmi_cpusocket_handle
opaque handler point to underlying implementation
Definition amdsmi.h:293
amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values ...
Definition amdsmi.h:1548
amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the processor a temperature reading should be...
Definition amdsmi.h:516
amdsmi_power_profile_preset_masks_t
Pre-set Profile Selections. These bitmasks can be AND'd with the amdsmi_power_profile_status_t....
Definition amdsmi.h:1623
amdsmi_compute_partition_type_t
Compute Partition. This enum is used to identify various compute partitioning settings.
Definition amdsmi.h:474
amdsmi_status_t amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index)
Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator_partition_pr...
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config)
Returns gpu accelerator partition caps as currently configured in the system.
amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id)
Returns current gpu accelerator partition cap.
amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info)
Returns the power caps as currently configured in the system.
amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info)
Returns the PCIe info for the GPU.
amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info)
Returns vram info.
amdsmi_status_t amdsmi_get_gpu_xcd_counter(amdsmi_processor_handle processor_handle, uint16_t *xcd_count)
Returns the 'xcd_counter' from the GPU metrics associated with the device.
amdsmi_status_t amdsmi_get_gpu_kfd_info(amdsmi_processor_handle processor_handle, amdsmi_kfd_info_t *info)
Returns the KFD (Kernel Fusion Driver) information for the device.
amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info)
Returns the board part number and board information for the requested device.
amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info)
Returns the ASIC information for the device.
amdsmi_status_t amdsmi_get_cpu_current_io_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *io_bw)
Get current input output bandwidth.
amdsmi_status_t amdsmi_get_cpu_current_xgmi_bw(amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *xgmi_bw)
Get current input output bandwidth.
amdsmi_status_t amdsmi_get_cpu_model_name(amdsmi_processor_handle processor_handle, amdsmi_cpu_info_t *cpu_info)
Retrieve the CPU processor model name based on the processor index.
amdsmi_status_t amdsmi_first_online_core_on_cpu_socket(amdsmi_processor_handle processor_handle, uint32_t *pcore_ind)
Get first online core on socket.
amdsmi_status_t amdsmi_get_cpu_socket_count(uint32_t *sock_count)
Get CPU socket count from sys filesystem.
amdsmi_status_t amdsmi_get_cpu_enabled_commands(amdsmi_processor_handle processor_handle, bool *r_mask, uint32_t *mask0, uint32_t *mask1, uint32_t *mask2)
Get HSMP Enabled Commands information for a given CPU socket.
amdsmi_status_t amdsmi_get_cpu_cores_per_socket(uint32_t sock_count, amdsmi_sock_info_t *soc_info)
Get cpu cores per socket from sys filesystem.
amdsmi_status_t amdsmi_get_esmi_err_msg(amdsmi_status_t status, const char **status_string)
Get a description of provided AMDSMI error status for esmi errors.
amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd)
Get the xgmi per-link power down policy parameter for the processor.
amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the xgmi per-link power down policy parameter for the processor.
amdsmi_status_t amdsmi_clean_gpu_local_data(amdsmi_processor_handle processor_handle)
Run the cleaner shader to clean up data in LDS/GPRs.
amdsmi_status_t amdsmi_set_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t perf_lvl)
Set the PowerPlay performance level associated with the device with provided processor handle with th...
amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy)
Get the soc pstate policy for the processor.
amdsmi_status_t amdsmi_set_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t od)
Set the overdrive percent associated with the device with provided processor handle with the provided...
amdsmi_status_t amdsmi_set_gpu_process_isolation(amdsmi_processor_handle processor_handle, uint32_t pisolate)
Enable/disable the system Process Isolation.
amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the soc pstate policy for the processor.
amdsmi_status_t amdsmi_get_gpu_process_isolation(amdsmi_processor_handle processor_handle, uint32_t *pisolate)
Get the status of the Process Isolation.
amdsmi_status_t amdsmi_set_clk_freq(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, uint64_t freq_bitmask)
Control the set of allowed frequencies that can be used for the specified clock. It is not supported ...
amdsmi_status_t amdsmi_get_gpu_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics)
This function retrieves the gpu metrics information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_power_profile_presets(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_profile_status_t *status)
Get the list of available preset power profiles and an indication of which profile is currently activ...
amdsmi_status_t amdsmi_get_gpu_busy_percent(amdsmi_processor_handle processor_handle, uint32_t *gpu_busy_percent)
Get GPU busy percent from gpu_busy_percent sysfs file.
amdsmi_status_t amdsmi_set_gpu_clk_limit(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_limit_type_t limit_type, uint64_t clk_value)
This function sets the clock sets the clock min/max level.
amdsmi_status_t amdsmi_get_gpu_pm_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_name_value_t **pm_metrics, uint32_t *num_of_metrics)
Get the pm metrics table with provided device index.
amdsmi_status_t amdsmi_get_utilization_count(amdsmi_processor_handle processor_handle, amdsmi_utilization_counter_t utilization_counters[], uint32_t count, uint64_t *timestamp)
Get coarse grain utilization counter of the specified device.
amdsmi_status_t amdsmi_get_gpu_metrics_header_info(amdsmi_processor_handle processor_handle, amd_metrics_table_header_t *header_value)
Get the 'metrics_header_info' from the GPU metrics associated with the device.
amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle)
Triggers a chain that resets all GPUs. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_od_volt_info(amdsmi_processor_handle processor_handle, uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue)
This function sets 1 of the 3 voltage curve points. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_partition_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics)
This function retrieves the partition metrics information.
amdsmi_status_t amdsmi_set_gpu_clk_range(amdsmi_processor_handle processor_handle, uint64_t minclkvalue, uint64_t maxclkvalue, amdsmi_clk_type_t clkType)
This function sets the clock range information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_mem_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od)
Get the GPU memory clock overdrive percent associated with the device with provided processor handle....
amdsmi_status_t amdsmi_get_clk_freq(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_frequencies_t *f)
Get the list of possible system clock speeds of device for a specified clock type....
amdsmi_status_t amdsmi_get_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t *perf)
Get the performance level of the device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_perf_determinism_mode(amdsmi_processor_handle processor_handle, uint64_t clkvalue)
Enter performance determinism mode with provided processor handle. It is not supported on virtual mac...
amdsmi_status_t amdsmi_get_gpu_od_volt_info(amdsmi_processor_handle processor_handle, amdsmi_od_volt_freq_data_t *odv)
This function retrieves the overdrive GFX & MCLK information. If valid for the GPU it will also popul...
amdsmi_status_t amdsmi_get_gpu_od_volt_curve_regions(amdsmi_processor_handle processor_handle, uint32_t *num_regions, amdsmi_freq_volt_region_t *buffer)
This function will retrieve the current valid regions in the frequency/voltage space....
amdsmi_status_t amdsmi_get_gpu_reg_table_info(amdsmi_processor_handle processor_handle, amdsmi_reg_type_t reg_type, amdsmi_name_value_t **reg_metrics, uint32_t *num_of_metrics)
Get the register metrics table with provided device index and register type.
amdsmi_status_t amdsmi_get_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od)
Get the overdrive percent associated with the device with provided processor handle....
amdsmi_status_t amdsmi_set_gpu_od_clk_info(amdsmi_processor_handle processor_handle, amdsmi_freq_ind_t level, uint64_t clkvalue, amdsmi_clk_type_t clkType)
This function sets the clock frequency information. It is not supported on virtual machine guest.
@ AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT
Compute Express Link Component Error.
Definition amdsmi.h:1710
@ AMDSMI_EVNT_XGMI_0_BEATS_TX
Throughput = BEATS/time_running 10^9 bytes/sec.
Definition amdsmi.h:1461
@ AMDSMI_EVNT_XGMI_1_BEATS_TX
Data beats sent to neighbor 1; Each beat represents 32 bytes.
Definition amdsmi.h:1465
amdsmi_status_t amdsmi_set_gpu_compute_partition(amdsmi_processor_handle processor_handle, amdsmi_compute_partition_type_t compute_partition)
Modifies a selected device's compute partition setting.
@ AMDSMI_PROCESSOR_TYPE_AMD_APU
AMD Accelerated processor type, GPU and CPU on a single die.
Definition amdsmi.h:340
@ AMDSMI_FW_ID_RS64_ME_P0_DATA
Hardware Block RS64 - Micro Engine Partition 0 Data.
Definition amdsmi.h:672
@ AMDSMI_FW_ID_SDMA7
System Direct Memory Access 7 (high speed data transfers)
Definition amdsmi.h:632
@ AMDSMI_FW_ID_PSP_BL
Platform Security Processor Bootloader (initial firmware)
Definition amdsmi.h:655
@ AMDSMI_FW_ID_PSP_SOSDRV
Platform Security Processor Secure Operating System Driver.
Definition amdsmi.h:648
@ AMDSMI_FW_ID_TA_RAS
Trusted Applications - Reliability Availability and Serviceability.
Definition amdsmi.h:697
@ AMDSMI_FW_ID_RLC_SRLS
Rasterizier and L2 Cache - Shared Resource Local Segment.
Definition amdsmi.h:700
@ AMDSMI_FW_ID_SDMA6
System Direct Memory Access 6 (high speed data transfers)
Definition amdsmi.h:631
@ AMDSMI_FW_ID_CP_CE
Compute Processor - Command_Engine (fetch, decode, dispatch)
Definition amdsmi.h:613
@ AMDSMI_FW_ID_RS64_ME_P1_DATA
Hardware Block RS64 - Micro Engine Partition 1 Data.
Definition amdsmi.h:673
@ AMDSMI_FW_ID_SDMA0
System Direct Memory Access 0 (high speed data transfers)
Definition amdsmi.h:625
@ AMDSMI_FW_ID_ISP
Image Signal Processor (processing raw image data from sensors)
Definition amdsmi.h:636
@ AMDSMI_FW_ID_CP_PM4
Compute Processor Packet Processor 4 (processing command packets)
Definition amdsmi.h:656
@ AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1
Hardware Block RLX6 Core 1 - Dynamic RAM Boot.
Definition amdsmi.h:693
@ AMDSMI_FW_ID_IMU_IRAM
Input/Output Memory Management Unit - Instruction RAM.
Definition amdsmi.h:661
@ AMDSMI_FW_ID_SDMA3
System Direct Memory Access 3 (high speed data transfers)
Definition amdsmi.h:628
@ AMDSMI_FW_ID_SDMA1
System Direct Memory Access 1 (high speed data transfers)
Definition amdsmi.h:626
@ AMDSMI_FW_ID_SDMA4
System Direct Memory Access 4 (high speed data transfers)
Definition amdsmi.h:629
@ AMDSMI_FW_ID_RLC_SRLG
Rasterizier and L2 Cache - Shared Resource Local Group.
Definition amdsmi.h:699
@ AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL
Rasterizier and L2 Cache Restore List Control.
Definition amdsmi.h:644
@ AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST
Rasterizier and L2 Cache - Save Restore List.
Definition amdsmi.h:695
@ AMDSMI_FW_ID_CP_PFP
Compute Processor - Pixel Front End Processor (pixelating process)
Definition amdsmi.h:614
@ AMDSMI_FW_ID_REG_ACCESS_WHITELIST
Register Access Whitelist (Prevent unathorizied access)
Definition amdsmi.h:659
@ AMDSMI_FW_ID_SDMA5
System Direct Memory Access 5 (high speed data transfers)
Definition amdsmi.h:630
@ AMDSMI_FW_ID_SDMA2
System Direct Memory Access 2 (high speed data transfers)
Definition amdsmi.h:627
@ AMDSMI_FW_ID_DMCU_ERAM
Digital Micro Controller Unit - Embedded RAM (memory used by DMU)
Definition amdsmi.h:637
@ AMDSMI_MEM_PAGE_STATUS_RESERVED
Reserved. This gpu page is reserved and not available for use.
Definition amdsmi.h:1810
@ AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_SCLK
Stable power state with minimum system clock.
Definition amdsmi.h:1398
@ AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_MCLK
Stable power state with minimum memory clock.
Definition amdsmi.h:1397
@ AMDSMI_DEV_PERF_LEVEL_LOW
Keep PowerPlay levels "low", regardless of workload.
Definition amdsmi.h:1391
@ AMDSMI_DEV_PERF_LEVEL_HIGH
Keep PowerPlay levels "high", regardless of workload.
Definition amdsmi.h:1392
amdsmi_status_t amdsmi_get_gpu_compute_partition(amdsmi_processor_handle processor_handle, char *compute_partition, uint32_t len)
Retrieves the current compute partitioning for a desired device.
@ AMDSMI_STATUS_DIRECTORY_NOT_FOUND
Error when a directory is not found, maps to ENOTDIR.
Definition amdsmi.h:376
@ AMDSMI_STATUS_MAP_ERROR
The internal library error did not map to a status code.
Definition amdsmi.h:406
@ AMDSMI_STATUS_INSUFFICIENT_SIZE
Not enough resources were available for the operation.
Definition amdsmi.h:387
@ AMDSMI_STATUS_INIT_ERROR
An error occurred when initializing internal data structures.
Definition amdsmi.h:374
@ AMDSMI_STATUS_MORE_DATA
There is more data than the buffer size the user passed.
Definition amdsmi.h:385
@ AMDSMI_STATUS_UNEXPECTED_DATA
The data read or provided to function is not what was expected.
Definition amdsmi.h:389
@ AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
The provided input is out of allowable or safe range.
Definition amdsmi.h:373
@ AMDSMI_STATUS_REFCOUNT_OVERFLOW
An internal reference counter exceeded INT32_MAX.
Definition amdsmi.h:375
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR
Definition amdsmi.h:538
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD3
VDDCR VDD3 voltage regulator temperature.
Definition amdsmi.h:548
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_A
VDDCR SOC A voltage regulator temperature.
Definition amdsmi.h:549
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR
Definition amdsmi.h:586
@ AMDSMI_TEMPERATURE_TYPE_HOTSPOT
Hottest temperature reported for entire die.
Definition amdsmi.h:519
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_085_HBM
VDD 0.85V HBM voltage regulator temperature.
Definition amdsmi.h:553
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2
VDDCR VDD2 voltage regulator temperature.
Definition amdsmi.h:547
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_D
Definition amdsmi.h:556
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR
Definition amdsmi.h:582
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_USR
VDD USR voltage regulator temperature.
Definition amdsmi.h:558
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR
Definition amdsmi.h:536
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_C
VDDCR SOC C voltage regulator temperature.
Definition amdsmi.h:550
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_A
VDDCR SOCIO A voltage regulator temperature.
Definition amdsmi.h:551
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR
Definition amdsmi.h:588
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1
VDDCR VDD1 voltage regulator temperature.
Definition amdsmi.h:546
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_C
VDDCR SOCIO C voltage regulator temperature.
Definition amdsmi.h:552
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR
Definition amdsmi.h:584
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0
VDDCR VDD0 voltage regulator temperature.
Definition amdsmi.h:544
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_0V72_VR
Definition amdsmi.h:576
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_3V3_VR
Definition amdsmi.h:578
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32
VDDIO 1.1V E32 voltage regulator temperature.
Definition amdsmi.h:559
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR
Definition amdsmi.h:592
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_B
Definition amdsmi.h:554
@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR
Definition amdsmi.h:534
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR
Definition amdsmi.h:580
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR
Definition amdsmi.h:590
@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR
Definition amdsmi.h:594
amdsmi_status_t amdsmi_get_cpu_ddr_bw(amdsmi_processor_handle processor_handle, amdsmi_ddr_bw_metrics_t *ddr_bw)
Get the DDR bandwidth data.
amdsmi_status_t amdsmi_get_cpu_dimm_power_consumption(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_power_t *dimm_pow)
Get DIMM power consumption.
amdsmi_status_t amdsmi_get_cpu_dimm_temp_range_and_refresh_rate(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_temp_range_refresh_rate_t *rate)
Get DIMM temperature range and refresh rate.
amdsmi_status_t amdsmi_get_cpu_dimm_sb_reg(amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t *data)
Read DIMM sideband register data.
amdsmi_status_t amdsmi_get_cpu_dimm_thermal_sensor(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_thermal_t *dimm_temp)
Get DIMM thermal sensor value.
amdsmi_status_t amdsmi_set_cpu_dimm_sb_reg(amdsmi_processor_handle processor_handle, uint32_t dimm_addr, uint32_t lid, uint32_t reg_offset, uint32_t reg_space, uint32_t write_data)
Write Data to DIMM Sideband Register.
amdsmi_status_t amdsmi_gpu_driver_reload(void)
Restart the device driver (kmod module) for all AMD GPUs on the system.
amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec)
Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU....
amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec)
Retrieve the error counts for a GPU block. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks)
Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_cpu_socket_energy(amdsmi_processor_handle processor_handle, uint64_t *penergy)
Get the socket energy for a given socket.
amdsmi_status_t amdsmi_get_cpu_core_energy(amdsmi_processor_handle processor_handle, uint64_t *penergy)
Get the core energy for a given core.
amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string)
Get a description of a provided AMDSMI error status.
amdsmi_status_t amdsmi_get_gpu_ecc_status(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state)
Retrieve the ECC status for a GPU block. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_event_notification_mask(amdsmi_processor_handle processor_handle, uint64_t mask)
Specify which events to collect for a device.
amdsmi_status_t amdsmi_stop_gpu_event_notification(amdsmi_processor_handle processor_handle)
Close any file handles and free any resources used by event notification for a GPU.
amdsmi_status_t amdsmi_init_gpu_event_notification(amdsmi_processor_handle processor_handle)
Prepare to collect event notifications for a GPU.
amdsmi_status_t amdsmi_get_gpu_event_notification(int timeout_ms, uint32_t *num_elem, amdsmi_evt_notification_data_t *data)
Collect event notifications, waiting a specified amount of time.
amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info)
Returns the static information for the vBIOS on the device.
amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on the device.
amdsmi_status_t amdsmi_set_cpu_gmi3_link_width_range(amdsmi_processor_handle processor_handle, uint8_t min_link_width, uint8_t max_link_width)
Set gmi3 link width range.
amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info)
Returns the current power and voltage of the GPU.
amdsmi_status_t amdsmi_get_gpu_vram_usage(amdsmi_processor_handle processor_handle, amdsmi_vram_usage_t *info)
Returns the VRAM usage (both total and used memory) in MegaBytes.
amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature)
Get the temperature metric value for the specified metric, from the specified temperature sensor on t...
amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info)
Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentag...
amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info)
Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory....
amdsmi_status_t amdsmi_get_violation_status(amdsmi_processor_handle processor_handle, amdsmi_violation_status_t *info)
Returns the violations for a processor.
amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled)
Returns is power management enabled.
amdsmi_status_t amdsmi_get_hsmp_metrics_table(amdsmi_processor_handle processor_handle, amdsmi_hsmp_metrics_table_t *metrics_table)
Get HSMP metrics table.
amdsmi_status_t amdsmi_get_hsmp_metrics_table_version(amdsmi_processor_handle processor_handle, uint32_t *metrics_version)
Get HSMP metrics table version.
amdsmi_status_t amdsmi_get_cpu_fclk_mclk(amdsmi_processor_handle processor_handle, uint32_t *fclk, uint32_t *mclk)
Get Data fabric clock and Memory clock in MHz.
amdsmi_status_t amdsmi_get_cpu_rail_isofreq_policy(amdsmi_processor_handle processor_handle, uint8_t *rail_isofreq_policy)
Get CPU rail isolated frequency policy status for independent core clock control per power rail.
amdsmi_status_t amdsmi_get_cpu_prochot_status(amdsmi_processor_handle processor_handle, uint32_t *prochot)
Get normalized status of the processor's PROCHOT status.
amdsmi_status_t amdsmi_get_cpu_hsmp_driver_version(amdsmi_processor_handle processor_handle, amdsmi_hsmp_driver_version_t *amdsmi_hsmp_driver_ver)
Get HSMP Driver Version.
amdsmi_status_t amdsmi_set_cpu_dfc_ctrl(amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl)
Set the DFCState enabling control.
amdsmi_status_t amdsmi_get_cpu_hsmp_proto_ver(amdsmi_processor_handle processor_handle, uint32_t *proto_ver)
Get HSMP protocol Version.
amdsmi_status_t amdsmi_get_cpu_smu_fw_version(amdsmi_processor_handle processor_handle, amdsmi_smu_fw_version_t *amdsmi_smu_fw)
Get SMU Firmware Version.
amdsmi_status_t amdsmi_get_cpu_socket_current_active_freq_limit(amdsmi_processor_handle processor_handle, uint16_t *freq, char **src_type)
Get current active frequency limit of the socket.
amdsmi_status_t amdsmi_get_cpu_core_current_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *freq)
Get socket frequency limit of the core.
amdsmi_status_t amdsmi_get_threads_per_core(uint32_t *threads_per_core)
Get Number of threads Per Core.
amdsmi_status_t amdsmi_get_cpu_socket_freq_range(amdsmi_processor_handle processor_handle, uint16_t *fmax, uint16_t *fmin)
Get socket frequency range.
amdsmi_status_t amdsmi_get_cpu_cclk_limit(amdsmi_processor_handle processor_handle, uint32_t *cclk)
Get core clock in MHz.
amdsmi_status_t amdsmi_set_cpu_rail_isofreq_policy(amdsmi_processor_handle processor_handle, bool *rail_isofreq_policy)
Set CPU rail isolated frequency policy for independent core clock control per power rail.
amdsmi_status_t amdsmi_get_cpu_dfc_ctrl(amdsmi_processor_handle processor_handle, uint8_t *dfc_ctrl)
Get the current DFCState enabling control status.
amdsmi_status_t amdsmi_topo_get_link_type(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *hops, amdsmi_link_type_t *type)
Retrieve the hops and the connection type between 2 GPUs.
amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node)
Retrieve the NUMA CPU node number for a device.
amdsmi_status_t amdsmi_get_minmax_bandwidth_between_processors(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *min_bandwidth, uint64_t *max_bandwidth)
Retrieve minimal and maximal io link bandwidth between 2 GPUs.
amdsmi_status_t amdsmi_is_P2P_accessible(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, bool *accessible)
Return P2P availability status between 2 GPUs.
amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics)
Return link metric information.
amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap)
Retrieve connection type and P2P capabilities between 2 GPUs.
amdsmi_status_t amdsmi_topo_get_link_weight(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *weight)
Retrieve the weight for a connection between 2 GPUs.
amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info)
Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level.
amdsmi_status_t amdsmi_get_gpu_subsystem_name(amdsmi_processor_handle processor_handle, char *name, size_t len)
Get the name string for the device subsystem.
amdsmi_status_t amdsmi_get_gpu_revision(amdsmi_processor_handle processor_handle, uint16_t *revision)
Get the device revision associated with the device.
amdsmi_status_t amdsmi_get_gpu_vendor_name(amdsmi_processor_handle processor_handle, char *name, size_t len)
Get the name string for a give vendor ID.
amdsmi_status_t amdsmi_get_gpu_id(amdsmi_processor_handle processor_handle, uint16_t *id)
Get the device id associated with the device with provided device handler.
amdsmi_status_t amdsmi_get_gpu_vram_vendor(amdsmi_processor_handle processor_handle, char *brand, uint32_t len)
Get the vram vendor string of a device.
amdsmi_status_t amdsmi_get_gpu_subsystem_id(amdsmi_processor_handle processor_handle, uint16_t *id)
Get the subsystem device id associated with the device with provided processor handle.
amdsmi_status_t amdsmi_get_gpu_uma_carveout_info(amdsmi_processor_handle processor_handle, amdsmi_uma_carveout_info_t *info)
Get UMA carveout configuration information.
amdsmi_status_t amdsmi_set_ttm_pages_limit(uint64_t pages)
Set TTM pages limit.
amdsmi_status_t amdsmi_get_ttm_info(amdsmi_ttm_info_t *info)
Get TTM configuration information.
amdsmi_status_t amdsmi_reset_ttm_pages_limit(void)
Reset TTM pages limit to system default.
amdsmi_status_t amdsmi_set_gpu_uma_carveout(amdsmi_processor_handle processor_handle, uint32_t option_index)
Set UMA carveout configuration.
amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config)
Returns current gpu memory partition capabilities.
amdsmi_status_t amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode)
Sets memory partition mode Set memory partition setting based on memory_partition mode from amdsmi_ge...
amdsmi_status_t amdsmi_get_gpu_memory_partition(amdsmi_processor_handle processor_handle, char *memory_partition, uint32_t len)
Retrieves the current memory partition for a desired device.
amdsmi_status_t amdsmi_set_gpu_memory_partition(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t memory_partition)
Modifies a selected device's current memory partition setting.
amdsmi_status_t amdsmi_get_gpu_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold)
Get the bad pages threshold of a processor. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_memory_total(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *total)
Get the total amount of memory that exists.
amdsmi_status_t amdsmi_get_gpu_ras_block_features_enabled(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state)
Returns if RAS features are enabled or disabled for given block. It is not supported on virtual machi...
amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *info)
Get the bad pages of a processor. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_memory_reserved_pages(amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *records)
Get information about reserved ("retired") memory pages. It is not supported on virtual machine guest...
amdsmi_status_t amdsmi_get_gpu_memory_usage(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *used)
Get the current memory usage.
amdsmi_status_t amdsmi_gpu_validate_ras_eeprom(amdsmi_processor_handle processor_handle)
Verify the checksum of RAS EEPROM. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_nic_rdma_dev_info(amdsmi_processor_handle processor_handle, amdsmi_nic_rdma_devices_info_t *info)
Retrieves RDMA devices information for the NIC.
amdsmi_status_t amdsmi_get_nic_rdma_port_statistics(amdsmi_processor_handle processor_handle, uint32_t rdma_port_index, uint32_t *num_stats, amdsmi_nic_stat_t *stats)
Retrieve RDMA port statistics for the NIC.
amdsmi_status_t amdsmi_get_nic_port_info(amdsmi_processor_handle processor_handle, amdsmi_nic_port_info_t *info)
Retrieves PORT information for the NIC.
amdsmi_status_t amdsmi_get_nic_driver_info(amdsmi_processor_handle processor_handle, amdsmi_nic_driver_info_t *info)
Retrieves information about the NIC driver.
amdsmi_status_t amdsmi_get_nic_bus_info(amdsmi_processor_handle processor_handle, amdsmi_nic_bus_info_t *info)
Retrieves BUS information for the NIC.
amdsmi_status_t amdsmi_get_nic_asic_info(amdsmi_processor_handle processor_handle, amdsmi_nic_asic_info_t *info)
Retrieves ASIC information for the NIC.
amdsmi_status_t amdsmi_get_nic_numa_info(amdsmi_processor_handle processor_handle, amdsmi_nic_numa_info_t *info)
Retrieves NUMA information for the NIC.
amdsmi_status_t amdsmi_get_npm_info(amdsmi_node_handle node_handle, amdsmi_npm_info_t *info)
Retrieves node power management (NPM) status and power limit for the specified node.
amdsmi_status_t amdsmi_set_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, uint64_t bw_bitmask)
Control the set of allowed PCIe bandwidths that can be used. It is not supported on virtual machine g...
amdsmi_status_t amdsmi_get_gpu_topo_numa_affinity(amdsmi_processor_handle processor_handle, int32_t *numa_node)
Get the NUMA node associated with a device.
amdsmi_status_t amdsmi_get_gpu_pci_throughput(amdsmi_processor_handle processor_handle, uint64_t *sent, uint64_t *received, uint64_t *max_pkt_sz)
Get PCIe traffic information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth)
Get the list of possible PCIe bandwidths that are available. It is not supported on virtual machine g...
amdsmi_status_t amdsmi_get_gpu_pci_replay_counter(amdsmi_processor_handle processor_handle, uint64_t *counter)
Get PCIe replay counter.
amdsmi_status_t amdsmi_get_gpu_bdf_id(amdsmi_processor_handle processor_handle, uint64_t *bdfid)
Get the unique PCI device identifier associated for a device.
amdsmi_status_t amdsmi_get_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool *enabled)
Get PTL enable/disable state.
amdsmi_status_t amdsmi_set_gpu_ptl_state(amdsmi_processor_handle processor_handle, bool enable)
Set PTL enable/disable state.
amdsmi_status_t amdsmi_set_gpu_ptl_formats(amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t data_format1, amdsmi_ptl_data_format_t data_format2)
Set PTL with specified preferred data formats.
amdsmi_status_t amdsmi_get_gpu_ptl_formats(amdsmi_processor_handle processor_handle, amdsmi_ptl_data_format_t *data_format1, amdsmi_ptl_data_format_t *data_format2)
Get PTL (Peak Tops Limiter) formats for the processor.
amdsmi_status_t amdsmi_get_cpu_freq_range(uint32_t *fmax, uint32_t *fmin)
Get the CPU socket frequency range.
amdsmi_status_t amdsmi_set_cpu_sdps_limit(amdsmi_processor_handle processor_handle, uint32_t sdps_limit)
Set the SDPS(Socket DIMM Power Sloshing) limit for a given processor socket.
amdsmi_status_t amdsmi_get_cpu_sdps_limit(amdsmi_processor_handle processor_handle, double *sdps_limit)
Get the current SDPS limit for a given processor socket.
amdsmi_status_t amdsmi_set_cpu_core_boostlimit(amdsmi_processor_handle processor_handle, uint32_t boostlimit)
Set the core boostlimit value.
amdsmi_status_t amdsmi_get_cpu_socket_c0_residency(amdsmi_processor_handle processor_handle, uint32_t *pc0_residency)
Get the socket c0 residency.
amdsmi_status_t amdsmi_set_cpu_msr_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq)
Set CPU floor limit frequency via MSR(Model Specific Register).
amdsmi_status_t amdsmi_set_cpu_socket_boostlimit(amdsmi_processor_handle processor_handle, uint32_t boostlimit)
Set the socket boostlimit value.
amdsmi_status_t amdsmi_get_cpu_core_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *floor_freq)
Get the CPU core floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *floor_freq)
Get the CPU floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_core_eff_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq)
Get the CPU core effective floor limit frequency.
amdsmi_status_t amdsmi_set_cpu_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t floor_freq)
Set the CPU socket floor limit frequency.
amdsmi_status_t amdsmi_set_cpu_core_msr_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t msr_floor_freq)
Set CPU core MSR floor limit frequency.
amdsmi_status_t amdsmi_get_cpu_core_boostlimit(amdsmi_processor_handle processor_handle, uint32_t *pboostlimit)
Get the core boost limit.
amdsmi_status_t amdsmi_get_cpu_eff_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *eff_floor_freq)
Get the CPU effective floor limit frequency.
amdsmi_status_t amdsmi_set_cpu_core_floor_freq_limit(amdsmi_processor_handle processor_handle, uint32_t floor_freq)
Set the CPU core floor limit frequency.
amdsmi_status_t amdsmi_get_gpu_available_counters(amdsmi_processor_handle processor_handle, amdsmi_event_group_t grp, uint32_t *available)
Get the number of currently available counters. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_read_counter(amdsmi_event_handle_t evt_handle, amdsmi_counter_value_t *value)
Read the current value of a performance counter.
amdsmi_status_t amdsmi_gpu_control_counter(amdsmi_event_handle_t evt_handle, amdsmi_counter_command_t cmd, void *cmd_args)
Issue performance counter control commands. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_counter_group_supported(amdsmi_processor_handle processor_handle, amdsmi_event_group_t group)
Tell if an event group is supported by a given device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_destroy_counter(amdsmi_event_handle_t evnt_handle)
Deallocate a performance counter object.
amdsmi_status_t amdsmi_gpu_create_counter(amdsmi_processor_handle processor_handle, amdsmi_event_type_t type, amdsmi_event_handle_t *evnt_handle)
Create a performance counter object.
amdsmi_status_t amdsmi_set_gpu_fan_speed(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t speed)
Set the fan speed for the specified device with the provided speed, in RPMs. It is not supported on v...
amdsmi_status_t amdsmi_reset_gpu_fan(amdsmi_processor_handle processor_handle, uint32_t sensor_ind)
Reset the fan to automatic driver control. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_fan_speed(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed)
Get the fan speed for the specified device as a value relative to AMDSMI_MAX_FAN_SPEED....
amdsmi_status_t amdsmi_get_gpu_fan_speed_max(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t *max_speed)
Get the max. fan speed of the device with provided processor handle. It is not supported on virtual m...
amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info)
Returns gpu cache info.
amdsmi_status_t amdsmi_get_gpu_fan_rpms(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed)
Get the fan speed in RPMs of the device with the specified processor handle and 0-based sensor index....
amdsmi_status_t amdsmi_get_gpu_volt_metric(amdsmi_processor_handle processor_handle, amdsmi_voltage_type_t sensor_type, amdsmi_voltage_metric_t metric, int64_t *voltage)
Get the voltage metric value for the specified metric, from the specified voltage sensor on the speci...
amdsmi_status_t amdsmi_get_cpu_socket_power_cap_max(amdsmi_processor_handle processor_handle, double *pmax)
Get the maximum power cap value for a given socket.
amdsmi_status_t amdsmi_get_cpu_socket_power_cap(amdsmi_processor_handle processor_handle, double *pcap)
Get the socket power cap.
amdsmi_status_t amdsmi_get_cpu_socket_power(amdsmi_processor_handle processor_handle, double *ppower)
Get the socket power.
amdsmi_status_t amdsmi_set_gpu_power_profile(amdsmi_processor_handle processor_handle, uint32_t reserved, amdsmi_power_profile_preset_masks_t profile)
Set the power performance profile. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_cpu_pwr_efficiency_mode(amdsmi_processor_handle processor_handle, uint32_t *power_efficiency_mode, uint32_t *utilization, double *ppt_limit)
Get the power efficiency profile policy.
amdsmi_status_t amdsmi_set_cpu_socket_power_cap(amdsmi_processor_handle processor_handle, uint32_t pcap)
Set the power cap value for a given socket.
amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap)
Set the maximum gpu power cap value. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_supported_power_cap(amdsmi_processor_handle processor_handle, uint32_t *sensor_count, uint32_t *sensor_inds, amdsmi_power_cap_type_t *sensor_types)
Query the supported power cap sensors and their types for a device.
amdsmi_status_t amdsmi_get_cpu_core_ccd_power(amdsmi_processor_handle processor_handle, double *power)
Read CCD (Core Complex Die) power consumption.
amdsmi_status_t amdsmi_get_cpu_pwr_svi_telemetry_all_rails(amdsmi_processor_handle processor_handle, uint32_t *power)
Get the SVI based power telemetry for all rails.
amdsmi_status_t amdsmi_set_cpu_pwr_efficiency_mode(amdsmi_processor_handle processor_handle, uint8_t power_efficiency_mode, uint32_t *utilization, uint32_t *ppt_limit)
Set the power efficiency profile policy.
amdsmi_status_t amdsmi_get_energy_count(amdsmi_processor_handle processor_handle, uint64_t *energy_accumulator, float *counter_resolution, uint64_t *timestamp)
Get the energy accumulator counter of the processor with provided processor handle....
amdsmi_status_t amdsmi_get_processor_info(amdsmi_processor_handle processor_handle, size_t len, char *name)
Get information about the given processor.
amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)
Get the list of the processor handles associated to a socket.
amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the device.
amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, processor_type_t *processor_type)
Get the processor type of the processor_handle.
amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name)
Get information about the given socket.
amdsmi_status_t amdsmi_get_node_handle(amdsmi_processor_handle processor_handle, amdsmi_node_handle *node_handle)
Get the node handle associated with processor handle.
amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode)
Returns the virtualization mode for the target device.
amdsmi_status_t amdsmi_get_cpu_handles(uint32_t *cpu_count, amdsmi_processor_handle *processor_handles)
Get the list of cpu handles in the system.
amdsmi_status_t amdsmi_get_cpucore_handles(uint32_t *cores_count, amdsmi_processor_handle *processor_handles)
Get the list of the cpu core handles in a system.
amdsmi_status_t amdsmi_get_gpu_enumeration_info(amdsmi_processor_handle processor_handle, amdsmi_enumeration_info_t *info)
Returns the Enumeration information for the device.
amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles)
Get the list of socket handles in the system.
amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle)
Get processor handle with the matching bdf.
amdsmi_status_t amdsmi_get_processor_handles_by_type(amdsmi_socket_handle socket_handle, processor_type_t processor_type, amdsmi_processor_handle *processor_handles, uint32_t *processor_count)
Returns a list of processor handles of the specified type in the system.
amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given GPU device.
amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope)
Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node...
amdsmi_status_t amdsmi_get_processor_count_from_handles(amdsmi_processor_handle *processor_handles, uint32_t *processor_count, uint32_t *nr_cpusockets, uint32_t *nr_cpucores, uint32_t *nr_gpus)
Get respective processor counts from the processor handles.
amdsmi_status_t amdsmi_get_gpu_process_list(amdsmi_processor_handle processor_handle, uint32_t *max_processes, amdsmi_proc_info_t *list)
Returns the list of process information running on a given GPU. If pdh.dll is not present on the syst...
amdsmi_status_t amdsmi_cpu_apb_disable(amdsmi_processor_handle processor_handle, uint8_t pstate)
Disable APB.
amdsmi_status_t amdsmi_set_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle, uint8_t nbio_id, uint8_t min, uint8_t max)
Set NBIO lclk dpm level value.
amdsmi_status_t amdsmi_set_cpu_xgmi_pstate_range(amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate)
Set the Min and Max XGMI PState Range.
amdsmi_status_t amdsmi_get_cpu_pc6_enable(amdsmi_processor_handle processor_handle, uint8_t *enabled)
Get the PC6 Enable State.
amdsmi_status_t amdsmi_get_cpu_xgmi_pstate_range(amdsmi_processor_handle processor_handle, uint8_t *min_pstate, uint8_t *max_pstate)
Get the Max and Min XGMI PState Range.
amdsmi_status_t amdsmi_set_cpu_pcie_link_rate(amdsmi_processor_handle processor_handle, uint8_t rate_ctrl, uint8_t *prev_mode)
Set pcie link rate.
amdsmi_status_t amdsmi_get_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle, uint8_t nbio_id, amdsmi_dpm_level_t *nbio)
Get NBIO LCLK dpm level.
amdsmi_status_t amdsmi_set_cpu_cc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable)
Set the Core C6 Enable State.
amdsmi_status_t amdsmi_set_cpu_pc6_enable(amdsmi_processor_handle processor_handle, uint8_t enable)
Set the PC6 Enable State.
amdsmi_status_t amdsmi_set_cpu_df_pstate_range(amdsmi_processor_handle processor_handle, uint8_t min_pstate, uint8_t max_pstate)
Set df pstate range.
amdsmi_status_t amdsmi_get_cpu_cc6_enable(amdsmi_processor_handle processor_handle, uint8_t *enabled)
Get the Core C6 Enable State.
amdsmi_status_t amdsmi_cpu_apb_enable(amdsmi_processor_handle processor_handle)
Enable APB.
amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids)
Get the AFIDs from CPER buffer.
amdsmi_status_t amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)
Retrieve CPER entries cached in the driver.
amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature)
Returns RAS features info.
amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info)
Returns the driver version information.
amdsmi_status_t amdsmi_get_gpu_compute_process_info(amdsmi_process_info_t *procs, uint32_t *num_items)
Get process information about processes currently using GPU.
amdsmi_status_t amdsmi_get_gpu_compute_process_info_by_pid(uint32_t pid, amdsmi_process_info_t *proc)
Get process information about a specific process.
amdsmi_status_t amdsmi_get_gpu_compute_process_gpus(uint32_t pid, uint32_t *dv_indices, uint32_t *num_devices)
Get the device indices currently being used by a process.
amdsmi_status_t amdsmi_get_cpu_tdelta(amdsmi_processor_handle processor_handle, uint8_t *tdelta)
Read Thermal Delta (TDELTA) Behavior.
amdsmi_status_t amdsmi_get_cpu_svi3_vr_controller_temp(amdsmi_processor_handle processor_handle, uint32_t *rail_selection, uint32_t *rail_index, uint32_t *temp)
Get Temperature of SVI3 VR(Voltage Rail)
amdsmi_status_t amdsmi_get_cpu_socket_temperature(amdsmi_processor_handle processor_handle, uint32_t *ptmon)
Get socket temperature.
amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version)
Get the build version information for the currently running build of AMDSMI.
amdsmi_status_t amdsmi_set_cpu_xgmi_width(amdsmi_processor_handle processor_handle, uint8_t min, uint8_t max)
Set xgmi width.
amdsmi_status_t amdsmi_get_gpu_xgmi_link_status(amdsmi_processor_handle processor_handle, amdsmi_xgmi_link_status_t *link_status)
Get the XGMI link status.
amdsmi_status_t amdsmi_gpu_xgmi_error_status(amdsmi_processor_handle processor_handle, amdsmi_xgmi_status_t *status)
Retrieve the XGMI error status for a device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_reset_gpu_xgmi_error(amdsmi_processor_handle processor_handle)
Reset the XGMI error status for a device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_xgmi_info(amdsmi_processor_handle processor_handle, amdsmi_xgmi_info_t *info)
Returns XGMI information for the GPU.
Structure holds the gpu metrics table header for a device.
Definition amdsmi.h:1995
Accelerator Partition Profile Configurations.
Definition amdsmi.h:1165
Accelerator Partition Resource Profile.
Definition amdsmi.h:1135
Accelerator Partition Resources. This struct is used to identify various partition resource profiles.
Definition amdsmi.h:1152
Definition amdsmi.h:5382
Definition amdsmi.h:5361
DIMM temperature(°C) and update rate(ms) and dimm address.
Definition amdsmi.h:2453
max and min LCLK DPM level on a given NBIO ID. Valid max and min DPM level values are 0 - 1.
Definition amdsmi.h:2491
Engine Usage amdsmi_engine_usage_t: This structure holds common GPU activity values seen in both BM o...
Definition amdsmi.h:1316
Event notification data returned from event notification API.
Definition amdsmi.h:1536
This structure holds 2 amdsmi_range_t's, one for frequency and one for voltage. These 2 ranges indica...
Definition amdsmi.h:1958
This structure holds information about clock frequencies.
Definition amdsmi.h:1881
Ras policy info structure for storing version and different ras policy version structures.
Definition amdsmi.h:1730
The following structures hold the gpu statistics for a device.
Definition amdsmi.h:2010
This structure holds HSMP Driver version information.
Definition amdsmi.h:300
HSMP Metrics table (supported only with hsmp proto version 6).
Definition amdsmi.h:2501
LINK name and Bandwidth type Information.It contains link names i.e valid link names are "P0",...
Definition amdsmi.h:2480
Memory Partition Configuration. This structure is used to identify various memory partition configura...
Definition amdsmi.h:1118
This structure represents a point on the frequency-voltage plane.
Definition amdsmi.h:1946
OD Vold Curve AMDSMI_NUM_VOLTAGE_CURVE_POINTS number of amdsmi_od_vddc_point_t's.
Definition amdsmi.h:1969
This structure holds the frequency-voltage values for a device.
Definition amdsmi.h:1979
This structure holds information about the possible PCIe bandwidths. Specifically,...
Definition amdsmi.h:1924
This structure contains information about which power profiles are supported by the system for a give...
Definition amdsmi.h:1870
This structure contains information specific to a process. Sum of the process memory is not expected ...
Definition amdsmi.h:2319
This structure represents a range (e.g., frequencies or voltages).
Definition amdsmi.h:744
This structure holds SMU Firmware version information.
Definition amdsmi.h:2409
temperature range and refresh rate metrics of a DIMM
Definition amdsmi.h:2432
Definition amdsmi.h:8702
Definition amdsmi.h:8692
Definition amdsmi.h:8684
This structure hold violation status information. Note: for MI3x asics and higher,...
Definition amdsmi.h:780
Definition amdsmi.h:5372
◆ AMDSMI_LIB_VERSION_STRING
| #define AMDSMI_LIB_VERSION_STRING |
Value:
AMDSMI_LIB_VERSION_EXPAND_PARTS(AMDSMI_LIB_VERSION_MAJOR, AMDSMI_LIB_VERSION_MINOR, \
#define AMDSMI_LIB_VERSION_MINOR
Minor version should be updated for each API change, but without changing headers.
Definition amdsmi.h:228
◆ AMDSMI_PF_INDEX
| #define AMDSMI_PF_INDEX (AMDSMI_MAX_VF_COUNT - 1) |
◆ AMDSMI_MAX_DRIVER_INFO_RSVD
◆ AMDSMI_MAX_SPD_DIMM_ADDRESS
| #define AMDSMI_MAX_SPD_DIMM_ADDRESS 0xFF |
◆ AMDSMI_MAX_SPD_LID
| #define AMDSMI_MAX_SPD_LID 0xF |
◆ AMDSMI_MAX_SPD_REG_OFFSET
| #define AMDSMI_MAX_SPD_REG_OFFSET 0x7FF |
◆ AMDSMI_MAX_SPD_REG_SPACE
| #define AMDSMI_MAX_SPD_REG_SPACE 0x1 |
◆ AMDSMI_MAX_SPD_WRITE_DATA
| #define AMDSMI_MAX_SPD_WRITE_DATA 0xFF |
◆ MAX_SVI3_RAIL_INDEX
◆ MAX_SVI3_RAIL_SELECTION
◆ POWER_EFFICIENCY_MODE_4
◆ POWER_EFFICIENCY_MODE_5
◆ AMDSMI_MAX_POWER_EFFICIENCY_UTIL
◆ AMDSMI_MAX_POWER_EFFICIENCY_PPTLIMIT
◆ AMDSMI_RAIL_INDEX_NONE
◆ AMDSMI_MAX_NUM_FREQUENCIES
| #define AMDSMI_MAX_NUM_FREQUENCIES 33 |
◆ AMDSMI_MAX_FAN_SPEED
| #define AMDSMI_MAX_FAN_SPEED 255 |
◆ AMDSMI_NUM_VOLTAGE_CURVE_POINTS
| #define AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3 |
◆ AMDSMI_EVENT_MASK_FROM_INDEX
| #define AMDSMI_EVENT_MASK_FROM_INDEX | ( | i | ) | (1ULL << ((i) - 1)) |
◆ AMDSMI_MAX_UTILIZATION_VALUES
| #define AMDSMI_MAX_UTILIZATION_VALUES 4 |
◆ AMDSMI_MAX_NUM_PM_POLICIES
| #define AMDSMI_MAX_NUM_PM_POLICIES 32 |
◆ AMDSMI_MAX_NIC_PORTS
| #define AMDSMI_MAX_NIC_PORTS 32 |
◆ AMDSMI_MAX_NIC_RDMA_DEV
| #define AMDSMI_MAX_NIC_RDMA_DEV 32 |
◆ AMDSMI_MAX_NIC_FW
| #define AMDSMI_MAX_NIC_FW 16 |
Typedef Documentation
◆ amdsmi_processor_handle
| typedef void* amdsmi_processor_handle |
◆ amdsmi_socket_handle
◆ amdsmi_node_handle
| typedef void* amdsmi_node_handle |
◆ amdsmi_cpusocket_handle
| typedef void* amdsmi_cpusocket_handle |
◆ amdsmi_process_handle_t
| typedef uint32_t amdsmi_process_handle_t |
◆ amdsmi_event_handle_t
| typedef uintptr_t amdsmi_event_handle_t |
◆ amdsmi_bit_field_t
| typedef uint64_t amdsmi_bit_field_t |
Enumeration Type Documentation
◆ amdsmi_init_flags_t
| enum amdsmi_init_flags_t |
Initialization flags.
Initialization flags may be OR'd together and passed to amdsmi_init().
Definition at line 48 of file amdsmi.h.
48 {
49 AMDSMI_INIT_ALL_PROCESSORS = 0xFFFFFFFF,
50 AMDSMI_INIT_AMD_CPUS = (1 << 0),
51 AMDSMI_INIT_AMD_GPUS = (1 << 1),
52 AMDSMI_INIT_NON_AMD_CPUS = (1 << 2),
53 AMDSMI_INIT_NON_AMD_GPUS = (1 << 3),
56 AMDSMI_INIT_AMD_NICS = (1 << 4)
57} amdsmi_init_flags_t;
◆ amdsmi_mm_ip_t
| enum amdsmi_mm_ip_t |
GPU Capability info.
| Enumerator | |
|---|---|
| AMDSMI_MM_UVD | Multi-Media Unified Video Decoder. |
| AMDSMI_MM_VCE | Multi-Media Video Coding Engine. |
| AMDSMI_MM_VCN | Multi-Media Video Core Next. |
Definition at line 254 of file amdsmi.h.
254 {
255 AMDSMI_MM_UVD,
256 AMDSMI_MM_VCE,
257 AMDSMI_MM_VCN,
258 AMDSMI_MM__MAX
259} amdsmi_mm_ip_t;
◆ amdsmi_container_types_t
◆ processor_type_t
| enum processor_type_t |
Processor types detectable by AMD SMI.
◆ amdsmi_status_t
| enum amdsmi_status_t |
Error codes returned by amdsmi functions.
Please avoid status codes that are multiples of 256 (256, 512, etc..) Return values in the shell get modulo 256 applied, meaning any multiple of 256 ends up as 0
Definition at line 354 of file amdsmi.h.
354 {
355 AMDSMI_STATUS_SUCCESS = 0,
356 // Library usage errors
357 AMDSMI_STATUS_INVAL = 1,
358 AMDSMI_STATUS_NOT_SUPPORTED = 2,
359 AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,
360 AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,
361 AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,
362 AMDSMI_STATUS_DRM_ERROR = 6,
363 AMDSMI_STATUS_API_FAILED = 7,
364 AMDSMI_STATUS_TIMEOUT = 8,
365 AMDSMI_STATUS_RETRY = 9,
366 AMDSMI_STATUS_NO_PERM = 10,
367 AMDSMI_STATUS_INTERRUPT = 11,
368 AMDSMI_STATUS_IO = 12,
369 AMDSMI_STATUS_ADDRESS_FAULT = 13,
370 AMDSMI_STATUS_FILE_ERROR = 14,
371 AMDSMI_STATUS_OUT_OF_RESOURCES = 15,
372 AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,
373 AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,
374 AMDSMI_STATUS_INIT_ERROR = 18,
375 AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,
376 AMDSMI_STATUS_DIRECTORY_NOT_FOUND = 20,
377 AMDSMI_STATUS_IPC_ERROR = 21,
378 // Processor related errors
379 AMDSMI_STATUS_BUSY = 30,
380 AMDSMI_STATUS_NOT_FOUND = 31,
381 AMDSMI_STATUS_NOT_INIT = 32,
382 AMDSMI_STATUS_NO_SLOT = 33,
383 AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,
384 // Data and size errors
385 AMDSMI_STATUS_MORE_DATA = 39,
386 AMDSMI_STATUS_NO_DATA = 40,
387 AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,
388 AMDSMI_STATUS_UNEXPECTED_SIZE = 42,
390 43,
391 // esmi errors
392 AMDSMI_STATUS_NON_AMD_CPU = 44,
393 AMDSMI_STATUS_NO_ENERGY_DRV = 45,
394 AMDSMI_STATUS_NO_MSR_DRV = 46,
395 AMDSMI_STATUS_NO_HSMP_DRV = 47,
396 AMDSMI_STATUS_NO_HSMP_SUP = 48,
397 AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,
398 AMDSMI_STATUS_HSMP_TIMEOUT = 50,
399 AMDSMI_STATUS_NO_DRV = 51,
400 AMDSMI_STATUS_FILE_NOT_FOUND = 52,
401 AMDSMI_STATUS_ARG_PTR_NULL = 53,
402 AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,
403 AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,
404 AMDSMI_STATUS_CORRUPTED_EEPROM = 56,
405 // General errors
406 AMDSMI_STATUS_MAP_ERROR =
407 0xFFFFFFFE,
408 AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF
409} amdsmi_status_t;
◆ amdsmi_clk_type_t
| enum amdsmi_clk_type_t |
Clock types.
Definition at line 416 of file amdsmi.h.
416 {
417 AMDSMI_CLK_TYPE_SYS = 0x0,
418 AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,
420 AMDSMI_CLK_TYPE_DF,
422 AMDSMI_CLK_TYPE_DCEF,
424 AMDSMI_CLK_TYPE_SOC,
425 AMDSMI_CLK_TYPE_MEM,
426 AMDSMI_CLK_TYPE_PCIE,
431 AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1
432} amdsmi_clk_type_t;
◆ amdsmi_accelerator_partition_type_t
Accelerator Partition.
◆ amdsmi_accelerator_partition_resource_type_t
Accelerator Partition Resource Types.
Definition at line 459 of file amdsmi.h.
459 {
465 AMDSMI_ACCELERATOR_MAX
◆ amdsmi_compute_partition_type_t
Compute Partition. This enum is used to identify various compute partitioning settings.
Definition at line 474 of file amdsmi.h.
474 {
475 AMDSMI_COMPUTE_PARTITION_INVALID = 0,
◆ amdsmi_memory_partition_type_t
Memory Partitions.
Definition at line 493 of file amdsmi.h.
493 {
494 AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
495 AMDSMI_MEMORY_PARTITION_NPS1 = 1,
497 AMDSMI_MEMORY_PARTITION_NPS2 = 2,
500 AMDSMI_MEMORY_PARTITION_NPS4 = 4,
503 AMDSMI_MEMORY_PARTITION_NPS8 = 8,
◆ amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the processor a temperature reading should be obtained.
Definition at line 516 of file amdsmi.h.
516 {
518 AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
527
528 // GPU Board Node temperature
529 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST = 100,
531 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST,
540 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_LAST = 149,
541
542 // GPU Board VR (Voltage Regulator) temperature
543 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST = 150,
545 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST,
560 AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_LAST = 199,
561
562 // Baseboard System temperature
563 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST = 200,
565 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST,
598 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST = 249,
600 AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST
◆ amdsmi_fw_block_t
| enum amdsmi_fw_block_t |
The values of this enum are used to identify the various firmware blocks.
Definition at line 609 of file amdsmi.h.
609 {
610 AMDSMI_FW_ID_SMU = 1,
612 AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
613 AMDSMI_FW_ID_CP_CE,
614 AMDSMI_FW_ID_CP_PFP,
615 AMDSMI_FW_ID_CP_ME,
620 AMDSMI_FW_ID_CP_MEC1,
622 AMDSMI_FW_ID_CP_MEC2,
624 AMDSMI_FW_ID_RLC,
625 AMDSMI_FW_ID_SDMA0,
626 AMDSMI_FW_ID_SDMA1,
627 AMDSMI_FW_ID_SDMA2,
628 AMDSMI_FW_ID_SDMA3,
629 AMDSMI_FW_ID_SDMA4,
630 AMDSMI_FW_ID_SDMA5,
631 AMDSMI_FW_ID_SDMA6,
632 AMDSMI_FW_ID_SDMA7,
633 AMDSMI_FW_ID_VCN,
634 AMDSMI_FW_ID_UVD,
635 AMDSMI_FW_ID_VCE,
636 AMDSMI_FW_ID_ISP,
645 AMDSMI_FW_ID_RLC_V,
646 AMDSMI_FW_ID_MMSCH,
649 AMDSMI_FW_ID_PSP_TOC,
651 AMDSMI_FW_ID_DFC,
652 AMDSMI_FW_ID_PSP_SPL,
653 AMDSMI_FW_ID_DRV_CAP,
654 AMDSMI_FW_ID_MC,
655 AMDSMI_FW_ID_PSP_BL,
656 AMDSMI_FW_ID_CP_PM4,
657 AMDSMI_FW_ID_RLC_P,
664 AMDSMI_FW_ID_CP_MES,
665 AMDSMI_FW_ID_MES_KIQ,
669 AMDSMI_FW_ID_RLX6,
671 AMDSMI_FW_ID_RS64_ME,
688 AMDSMI_FW_ID_PPTABLE,
689 AMDSMI_FW_ID_PSP_SOC,
690 AMDSMI_FW_ID_PSP_DBG,
696 AMDSMI_FW_ID_ASD,
697 AMDSMI_FW_ID_TA_RAS,
698 AMDSMI_FW_ID_TA_XGMI,
701 AMDSMI_FW_ID_PM,
702 AMDSMI_FW_ID_DMCU,
704 AMDSMI_FW_ID__MAX
705} amdsmi_fw_block_t;
◆ amdsmi_vram_type_t
| enum amdsmi_vram_type_t |
vRam Types. This enum is used to identify various VRam types.
Definition at line 712 of file amdsmi.h.
712 {
713 AMDSMI_VRAM_TYPE_UNKNOWN = 0,
714 // HBM
715 AMDSMI_VRAM_TYPE_HBM = 1,
716 AMDSMI_VRAM_TYPE_HBM2 = 2,
717 AMDSMI_VRAM_TYPE_HBM2E = 3,
718 AMDSMI_VRAM_TYPE_HBM3 = 4,
719 AMDSMI_VRAM_TYPE_HBM3E = 5,
720 // DDR
721 AMDSMI_VRAM_TYPE_DDR2 = 10,
722 AMDSMI_VRAM_TYPE_DDR3 = 11,
723 AMDSMI_VRAM_TYPE_DDR4 = 12,
724 AMDSMI_VRAM_TYPE_DDR5 = 13,
725 // GDDR
726 AMDSMI_VRAM_TYPE_GDDR1 = 17,
727 AMDSMI_VRAM_TYPE_GDDR2 = 18,
728 AMDSMI_VRAM_TYPE_GDDR3 = 19,
729 AMDSMI_VRAM_TYPE_GDDR4 = 20,
730 AMDSMI_VRAM_TYPE_GDDR5 = 21,
731 AMDSMI_VRAM_TYPE_GDDR6 = 22,
732 AMDSMI_VRAM_TYPE_GDDR7 = 23,
733 // LPDDR
734 AMDSMI_VRAM_TYPE_LPDDR4 = 30,
735 AMDSMI_VRAM_TYPE_LPDDR5 = 31,
736 AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_LPDDR5
737} amdsmi_vram_type_t;
◆ amdsmi_card_form_factor_t
◆ amdsmi_power_cap_type_t
Power Cap Package Power Tracking (PPT) type.
| Enumerator | |
|---|---|
| AMDSMI_POWER_CAP_TYPE_PPT0 | PPT0 power cap; lower limit, filtered input. |
| AMDSMI_POWER_CAP_TYPE_PPT1 | PPT1 power cap; higher limit, raw input. |
Definition at line 997 of file amdsmi.h.
997 {
1000} amdsmi_power_cap_type_t;
◆ amdsmi_cache_property_type_t
cache properties
Definition at line 1021 of file amdsmi.h.
1021 {
1022 AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,
1023 AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,
1024 AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,
1025 AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,
1026 AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010
1027} amdsmi_cache_property_type_t;
◆ amdsmi_link_type_t
| enum amdsmi_link_type_t |
Link type.
Definition at line 1180 of file amdsmi.h.
1180 {
1181 AMDSMI_LINK_TYPE_INTERNAL = 0,
1182 AMDSMI_LINK_TYPE_PCIE = 1,
1183 AMDSMI_LINK_TYPE_XGMI = 2,
1184 AMDSMI_LINK_TYPE_NOT_APPLICABLE = 3,
1185 AMDSMI_LINK_TYPE_UNKNOWN = 4
1186} amdsmi_link_type_t;
◆ amdsmi_link_status_t
| enum amdsmi_link_status_t |
Link Status.
Definition at line 1206 of file amdsmi.h.
1206 {
1207 AMDSMI_LINK_STATUS_ENABLED = 0,
1208 AMDSMI_LINK_STATUS_DISABLED = 1,
1209 AMDSMI_LINK_STATUS_INACTIVE = 2,
1210 AMDSMI_LINK_STATUS_ERROR = 3
1211} amdsmi_link_status_t;
◆ amdsmi_dev_perf_level_t
PowerPlay performance levels.
Definition at line 1388 of file amdsmi.h.
1388 {
1389 AMDSMI_DEV_PERF_LEVEL_AUTO = 0,
1390 AMDSMI_DEV_PERF_LEVEL_FIRST = AMDSMI_DEV_PERF_LEVEL_AUTO,
1400 AMDSMI_DEV_PERF_LEVEL_LAST = AMDSMI_DEV_PERF_LEVEL_DETERMINISM,
1401 AMDSMI_DEV_PERF_LEVEL_UNKNOWN = 0x100
1402} amdsmi_dev_perf_level_t;
◆ amdsmi_event_group_t
| enum amdsmi_event_group_t |
Event Groups Enum denoting an event group. The value of the enum is the base value for all the event enums in the group.
| Enumerator | |
|---|---|
| AMDSMI_EVNT_GRP_XGMI | Data Fabric (XGMI) related events. |
| AMDSMI_EVNT_GRP_XGMI_DATA_OUT | XGMI Outbound data. |
| AMDSMI_EVNT_GRP_INVALID | Unknown Event Group. |
Definition at line 1418 of file amdsmi.h.
1418 {
1419 AMDSMI_EVNT_GRP_XGMI = 0,
1420 AMDSMI_EVNT_GRP_XGMI_DATA_OUT = 10,
1421 AMDSMI_EVNT_GRP_INVALID = 0xFFFFFFFF
1422} amdsmi_event_group_t;
◆ amdsmi_event_type_t
| enum amdsmi_event_type_t |
Event types Event type enum. Events belonging to a particular event group amdsmi_event_group_t should begin enumerating at the amdsmi_event_group_t value for that group.
Data beats sent to neighbor 0; Each beat represents 32 bytes.
XGMI throughput can be calculated by multiplying a BEATs event such as AMDSMI_EVNT_XGMI_0_BEATS_TX by 32 and dividing by the time for which event collection occurred, amdsmi_counter_value_t.time_running (which is in nanoseconds). To get bytes per second, multiply this value by 109.
Throughput = BEATS/time_running * 109 (bytes/second)
Events in the AMDSMI_EVNT_GRP_XGMI_DATA_OUT group measure the number of beats sent on an XGMI link. Each beat represents 32 bytes. AMDSMI_EVNT_XGMI_DATA_OUT_n represents the number of outbound beats (each representing 32 bytes) on link n.
XGMI throughput can be calculated by multiplying a event such as ::AMDSMI_EVNT_XGMI_DATA_OUT_n by 32 and dividing by the time for which event collection occurred, amdsmi_counter_value_t.time_running (which is in nanoseconds). To get bytes per second, multiply this value by 109.
Definition at line 1454 of file amdsmi.h.
1454 {
1455 AMDSMI_EVNT_FIRST = AMDSMI_EVNT_GRP_XGMI,
1456
1457 AMDSMI_EVNT_XGMI_FIRST = AMDSMI_EVNT_GRP_XGMI,
1458 AMDSMI_EVNT_XGMI_0_NOP_TX = AMDSMI_EVNT_XGMI_FIRST,
1466 AMDSMI_EVNT_XGMI_LAST = AMDSMI_EVNT_XGMI_1_BEATS_TX,
1467 AMDSMI_EVNT_XGMI_DATA_OUT_FIRST = AMDSMI_EVNT_GRP_XGMI_DATA_OUT,
1468 AMDSMI_EVNT_XGMI_DATA_OUT_0 = AMDSMI_EVNT_XGMI_DATA_OUT_FIRST,
1474 AMDSMI_EVNT_XGMI_DATA_OUT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_5,
1475 AMDSMI_EVNT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_LAST
1476} amdsmi_event_type_t;
◆ amdsmi_counter_command_t
◆ amdsmi_evt_notification_type_t
Event notification event types.
Definition at line 1505 of file amdsmi.h.
1505 {
1506 AMDSMI_EVT_NOTIF_NONE = 0,
1507 AMDSMI_EVT_NOTIF_VMFAULT = 1,
1508 AMDSMI_EVT_NOTIF_FIRST = AMDSMI_EVT_NOTIF_VMFAULT,
1509 AMDSMI_EVT_NOTIF_THERMAL_THROTTLE = 2,
1510 AMDSMI_EVT_NOTIF_GPU_PRE_RESET = 3,
1511 AMDSMI_EVT_NOTIF_GPU_POST_RESET = 4,
1512 AMDSMI_EVT_NOTIF_MIGRATE_START = 5,
1513 AMDSMI_EVT_NOTIF_MIGRATE_END = 6,
1514 AMDSMI_EVT_NOTIF_PAGE_FAULT_START = 7,
1515 AMDSMI_EVT_NOTIF_PAGE_FAULT_END = 8,
1516 AMDSMI_EVT_NOTIF_QUEUE_EVICTION = 9,
1517 AMDSMI_EVT_NOTIF_QUEUE_RESTORE = 10,
1518 AMDSMI_EVT_NOTIF_UNMAP_FROM_GPU = 11,
1519 AMDSMI_EVT_NOTIF_PROCESS_START = 12,
1520 AMDSMI_EVT_NOTIF_PROCESS_END = 13,
1521 AMDSMI_EVT_NOTIF_LAST = AMDSMI_EVT_NOTIF_PROCESS_END
◆ amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values will be in Celsius.
Definition at line 1548 of file amdsmi.h.
1548 {
1549 AMDSMI_TEMP_CURRENT = 0x0,
1550 AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,
1551 AMDSMI_TEMP_MAX,
1552 AMDSMI_TEMP_MIN,
1553 AMDSMI_TEMP_MAX_HYST,
1555 AMDSMI_TEMP_MIN_HYST,
1557 AMDSMI_TEMP_CRITICAL,
1561 AMDSMI_TEMP_EMERGENCY,
1567 AMDSMI_TEMP_CRIT_MIN,
1571 AMDSMI_TEMP_OFFSET,
1573 AMDSMI_TEMP_LOWEST,
1574 AMDSMI_TEMP_HIGHEST,
1575 AMDSMI_TEMP_SHUTDOWN,
1576 AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN
1577} amdsmi_temperature_metric_t;
◆ amdsmi_voltage_metric_t
Voltage Metrics. This enum is used to identify various Voltage metrics. Corresponding values will be in millivolt.
Definition at line 1585 of file amdsmi.h.
1585 {
1586 AMDSMI_VOLT_CURRENT = 0x0,
1587
1588 AMDSMI_VOLT_FIRST = AMDSMI_VOLT_CURRENT,
1589 AMDSMI_VOLT_MAX,
1590 AMDSMI_VOLT_MIN_CRIT,
1591 AMDSMI_VOLT_MIN,
1592 AMDSMI_VOLT_MAX_CRIT,
1593 AMDSMI_VOLT_AVERAGE,
1594 AMDSMI_VOLT_LOWEST,
1595 AMDSMI_VOLT_HIGHEST,
1596
1597 AMDSMI_VOLT_LAST = AMDSMI_VOLT_HIGHEST
1598} amdsmi_voltage_metric_t;
◆ amdsmi_voltage_type_t
This ennumeration is used to indicate which type of voltage reading should be obtained.
| Enumerator | |
|---|---|
| AMDSMI_VOLT_TYPE_VDDGFX | Vddgfx GPU voltage. |
| AMDSMI_VOLT_TYPE_VDDBOARD | Voltage for VDDBOARD. |
| AMDSMI_VOLT_TYPE_INVALID | Invalid type. |
Definition at line 1606 of file amdsmi.h.
1606 {
1607 AMDSMI_VOLT_TYPE_FIRST = 0,
1608
1609 AMDSMI_VOLT_TYPE_VDDGFX = AMDSMI_VOLT_TYPE_FIRST,
1611 AMDSMI_VOLT_TYPE_LAST = AMDSMI_VOLT_TYPE_VDDBOARD,
1612 AMDSMI_VOLT_TYPE_INVALID = 0xFFFFFFFF
1613} amdsmi_voltage_type_t;
◆ amdsmi_power_profile_preset_masks_t
Pre-set Profile Selections. These bitmasks can be AND'd with the amdsmi_power_profile_status_t.available_profiles returned from :: amdsmi_get_gpu_power_profile_presets to determine which power profiles are supported by the system.
Definition at line 1623 of file amdsmi.h.
1623 {
1624 AMDSMI_PWR_PROF_PRST_CUSTOM_MASK = 0x1,
1625 AMDSMI_PWR_PROF_PRST_VIDEO_MASK = 0x2,
1626 AMDSMI_PWR_PROF_PRST_POWER_SAVING_MASK = 0x4,
1627 AMDSMI_PWR_PROF_PRST_COMPUTE_MASK = 0x8,
1628 AMDSMI_PWR_PROF_PRST_VR_MASK = 0x10,
1629
1630 // 3D Full Screen Power Profile
1631 AMDSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK = 0x20,
1632 AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT = 0x40,
1633 AMDSMI_PWR_PROF_PRST_LAST = AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT,
1634
1635 // Invalid power profile
1636 AMDSMI_PWR_PROF_PRST_INVALID = 0xFFFFFFFFFFFFFFFF
◆ amdsmi_gpu_block_t
| enum amdsmi_gpu_block_t |
This enum is used to identify different GPU blocks.
Definition at line 1644 of file amdsmi.h.
1644 {
1645 AMDSMI_GPU_BLOCK_INVALID = 0,
1646 AMDSMI_GPU_BLOCK_FIRST = (1ULL << 0),
1647 AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
1648 AMDSMI_GPU_BLOCK_SDMA = (1ULL << 1),
1649 AMDSMI_GPU_BLOCK_GFX = (1ULL << 2),
1650 AMDSMI_GPU_BLOCK_MMHUB = (1ULL << 3),
1651 AMDSMI_GPU_BLOCK_ATHUB = (1ULL << 4),
1652 AMDSMI_GPU_BLOCK_PCIE_BIF = (1ULL << 5),
1653 AMDSMI_GPU_BLOCK_HDP = (1ULL << 6),
1654 AMDSMI_GPU_BLOCK_XGMI_WAFL = (1ULL << 7),
1655 AMDSMI_GPU_BLOCK_DF = (1ULL << 8),
1656 AMDSMI_GPU_BLOCK_SMN = (1ULL << 9),
1657 AMDSMI_GPU_BLOCK_SEM = (1ULL << 10),
1658 AMDSMI_GPU_BLOCK_MP0 = (1ULL << 11),
1659 AMDSMI_GPU_BLOCK_MP1 = (1ULL << 12),
1660 AMDSMI_GPU_BLOCK_FUSE = (1ULL << 13),
1661 AMDSMI_GPU_BLOCK_MCA = (1ULL << 14),
1662 AMDSMI_GPU_BLOCK_VCN = (1ULL << 15),
1663 AMDSMI_GPU_BLOCK_JPEG = (1ULL << 16),
1664 AMDSMI_GPU_BLOCK_IH = (1ULL << 17),
1665 AMDSMI_GPU_BLOCK_MPIO = (1ULL << 18),
1666 AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,
1667 AMDSMI_GPU_BLOCK_RESERVED = (1ULL << 63)
1668} amdsmi_gpu_block_t;
◆ amdsmi_clk_limit_type_t
◆ amdsmi_cper_sev_t
| enum amdsmi_cper_sev_t |
Cper sev.
Definition at line 1685 of file amdsmi.h.
1685 {
1686 AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,
1687 AMDSMI_CPER_SEV_FATAL = 1,
1688 AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,
1689 AMDSMI_CPER_SEV_NUM = 3,
1690 AMDSMI_CPER_SEV_UNUSED = 10
1691} amdsmi_cper_sev_t;
◆ amdsmi_cper_notify_type_t
Cper notify.
Definition at line 1698 of file amdsmi.h.
1698 {
1699 AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,
1700 AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,
1701 AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,
1702 AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,
1703 AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,
1704 AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,
1705 AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,
1706 AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,
1707 AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,
1708 AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,
1709 AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,
1711 0x49A341DF69293BC9
1712} amdsmi_cper_notify_type_t;
◆ amdsmi_ras_err_state_t
The current ECC state.
Definition at line 1744 of file amdsmi.h.
1744 {
1745 AMDSMI_RAS_ERR_STATE_NONE = 0,
1753
1754 AMDSMI_RAS_ERR_STATE_LAST = AMDSMI_RAS_ERR_STATE_ENABLED,
1755 AMDSMI_RAS_ERR_STATE_INVALID = 0xFFFFFFFF
1756} amdsmi_ras_err_state_t;
◆ amdsmi_memory_type_t
| enum amdsmi_memory_type_t |
Types of memory.
- Note
- Sum of the process memory is not expected to be the total memory usage.
| Enumerator | |
|---|---|
| AMDSMI_MEM_TYPE_VRAM | VRAM memory. |
| AMDSMI_MEM_TYPE_VIS_VRAM | VRAM memory that is visible. |
| AMDSMI_MEM_TYPE_GTT | GTT memory. |
Definition at line 1765 of file amdsmi.h.
1765 {
1766 AMDSMI_MEM_TYPE_FIRST = 0,
1767
1768 AMDSMI_MEM_TYPE_VRAM = AMDSMI_MEM_TYPE_FIRST,
1769 AMDSMI_MEM_TYPE_VIS_VRAM,
1770 AMDSMI_MEM_TYPE_GTT,
1771
1772 AMDSMI_MEM_TYPE_LAST = AMDSMI_MEM_TYPE_GTT
1773} amdsmi_memory_type_t;
◆ amdsmi_freq_ind_t
| enum amdsmi_freq_ind_t |
The values of this enum are used as frequency identifiers.
| Enumerator | |
|---|---|
| AMDSMI_FREQ_IND_MIN | Index used for the minimum frequency value. |
| AMDSMI_FREQ_IND_MAX | Index used for the maximum frequency value. |
| AMDSMI_FREQ_IND_INVALID | An invalid frequency index. |
Definition at line 1780 of file amdsmi.h.
1780 {
1781 AMDSMI_FREQ_IND_MIN = 0,
1782 AMDSMI_FREQ_IND_MAX = 1,
1783 AMDSMI_FREQ_IND_INVALID = 0xFFFFFFFF
1784} amdsmi_freq_ind_t;
◆ amdsmi_xgmi_status_t
| enum amdsmi_xgmi_status_t |
XGMI Status.
| Enumerator | |
|---|---|
| AMDSMI_XGMI_STATUS_NO_ERRORS | XGMI No Errors. |
| AMDSMI_XGMI_STATUS_ERROR | XGMI Errors. |
| AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS | XGMI Multiple Errors. |
Definition at line 1791 of file amdsmi.h.
1791 {
1792 AMDSMI_XGMI_STATUS_NO_ERRORS = 0,
1793 AMDSMI_XGMI_STATUS_ERROR,
1795} amdsmi_xgmi_status_t;
◆ amdsmi_memory_page_status_t
Reserved Memory Page States.
◆ amdsmi_utilization_counter_type_t
The utilization counter type.
Definition at line 1822 of file amdsmi.h.
1822 {
1823 AMDSMI_UTILIZATION_COUNTER_FIRST = 0,
1824 // Course grain activity counters
1826 AMDSMI_UTILIZATION_COUNTER_FIRST,
1829 // Fine grain activity counters
1830 AMDSMI_FINE_GRAIN_GFX_ACTIVITY = 100,
1831 AMDSMI_FINE_GRAIN_MEM_ACTIVITY = 101,
1832 AMDSMI_FINE_DECODER_ACTIVITY = 102,
1833 AMDSMI_UTILIZATION_COUNTER_LAST = AMDSMI_FINE_DECODER_ACTIVITY
◆ amdsmi_xgmi_link_status_type_t
XGMI Link Status Type.
| Enumerator | |
|---|---|
| AMDSMI_XGMI_LINK_DOWN | XGMI link status is down. |
| AMDSMI_XGMI_LINK_UP | XGMI link status is up. |
| AMDSMI_XGMI_LINK_DISABLE | XGMI link status is disabled. |
◆ amdsmi_reg_type_t
| enum amdsmi_reg_type_t |
This register type for register table.
| Enumerator | |
|---|---|
| AMDSMI_REG_XGMI | XGMI registers. |
| AMDSMI_REG_WAFL | WAFL registers. |
| AMDSMI_REG_PCIE | PCIe registers. |
| AMDSMI_REG_USR | Usr registers. |
| AMDSMI_REG_USR1 | Usr1 registers. |
Definition at line 2273 of file amdsmi.h.
2273 {
2274 AMDSMI_REG_XGMI,
2275 AMDSMI_REG_WAFL,
2276 AMDSMI_REG_PCIE,
2277 AMDSMI_REG_USR,
2278 AMDSMI_REG_USR1
2279} amdsmi_reg_type_t;
◆ amdsmi_virtualization_mode_t
Variant placeholder.
Place-holder "variant" for functions that have don't have any variants, but do have monitors or sensors.
◆ amdsmi_affinity_scope_t
Scope for Numa affinity or Socket affinity.
| Enumerator | |
|---|---|
| AMDSMI_AFFINITY_SCOPE_NODE | Memory affinity as numa node. |
| AMDSMI_AFFINITY_SCOPE_SOCKET | socket affinity |
Definition at line 2359 of file amdsmi.h.
2359 {
2362} amdsmi_affinity_scope_t;
◆ amdsmi_npm_status_t
| enum amdsmi_npm_status_t |
NPM status.
Definition at line 2369 of file amdsmi.h.
2369{ AMDSMI_NPM_STATUS_DISABLED, AMDSMI_NPM_STATUS_ENABLED } amdsmi_npm_status_t;
◆ amdsmi_ptl_data_format_t
PTL (Peak Tops Limiter) data format types These correspond to the hardware data types used in matrix operations. Only F8 and XF32 are always supported at full performance. From the remaining five types, only two can be supported at peak performance simultaneously.
Definition at line 2391 of file amdsmi.h.
2391 {
2392 AMDSMI_PTL_DATA_FORMAT_I8 = 0x0,
2393 AMDSMI_PTL_DATA_FORMAT_F16 = 0x1,
2394 AMDSMI_PTL_DATA_FORMAT_BF16 = 0x2,
2395 AMDSMI_PTL_DATA_FORMAT_F32 = 0x3,
2396 AMDSMI_PTL_DATA_FORMAT_F64 = 0x4,
2397 AMDSMI_PTL_DATA_FORMAT_F8 = 0x5,
2398 AMDSMI_PTL_DATA_FORMAT_VECTOR = 0x6,
2399 AMDSMI_PTL_DATA_FORMAT_INVALID = 0xFFFFFFFF
2400} amdsmi_ptl_data_format_t;
◆ amdsmi_io_bw_encoding_t
◆ amdsmi_nic_link_type_t
NIC Link Types. This enum is used to identify the link type between NIC and GPU processors based on their PCIe and NUMA connectivity.
Definition at line 2654 of file amdsmi.h.
2654 {
2661} amdsmi_nic_link_type_t;