hipStreamBatchMemOpParams Union Reference

hipStreamBatchMemOpParams Union Reference#

HIP Runtime API Reference: hipStreamBatchMemOpParams Union Reference
hipStreamBatchMemOpParams Union Reference

Union representing batch memory operation parameters for HIP streams. More...

#include <hip_runtime_api.h>

Collaboration diagram for hipStreamBatchMemOpParams:
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Data Structures

struct  hipStreamMemOpFlushRemoteWritesParams_t
 
struct  hipStreamMemOpMemoryBarrierParams_t
 
struct  hipStreamMemOpWaitValueParams_t
 
struct  hipStreamMemOpWriteValueParams_t
 

Data Fields

hipStreamBatchMemOpType operation
 
struct hipStreamBatchMemOpParams::hipStreamMemOpWaitValueParams_t waitValue
 
struct hipStreamBatchMemOpParams::hipStreamMemOpWriteValueParams_t writeValue
 
struct hipStreamBatchMemOpParams::hipStreamMemOpFlushRemoteWritesParams_t flushRemoteWrites
 Currently not supported on AMD.
 
struct hipStreamBatchMemOpParams::hipStreamMemOpMemoryBarrierParams_t memoryBarrier
 Currently not supported on AMD.
 
uint64_t pad [6]
 

Detailed Description

Union representing batch memory operation parameters for HIP streams.

hipStreamBatchMemOpParams is used to specify the parameters for batch memory operations in a HIP stream. This union supports various operations including waiting for a specific value, writing a value, and different flags for wait conditions.

The union includes fields for different types of operations defined in the enum hipStreamBatchMemOpType:

  • hipStreamMemOpWaitValue32: Wait for a 32-bit value.
  • hipStreamMemOpWriteValue32: Write a 32-bit value.
  • hipStreamMemOpWaitValue64: Wait for a 64-bit value.
  • hipStreamMemOpWriteValue64: Write a 64-bit value.

Each operation type includes an address, the value to wait for or write, flags, and an optional alias that is not relevant on AMD GPUs. Flags can be used to specify different wait conditions such as equality, bitwise AND, greater than or equal, and bitwise NOR.

Example usage:

myArray[0].waitValue.address = waitAddr1;
myArray[0].waitValue.value = 0x1;
myArray[0].waitValue.flags = CU_STREAM_WAIT_VALUE_EQ;
myArray[1].writeValue.address = writeAddr1;
myArray[1].writeValue.value = 0x1;
myArray[1].writeValue.flags = 0x0;
result = hipStreamBatchMemOp(stream, 2, myArray, 0);
@ hipStreamMemOpWriteValue32
Definition hip_runtime_api.h:845
@ hipStreamMemOpWaitValue32
Definition hip_runtime_api.h:844
hipError_t hipStreamBatchMemOp(hipStream_t stream, unsigned int count, hipStreamBatchMemOpParams *paramArray, unsigned int flags)
Enqueues an array of stream memory operations in the stream.[BETA].
hipDeviceptr_t address
Definition hip_runtime_api.h:892
uint32_t value
Definition hip_runtime_api.h:894
unsigned int flags
Definition hip_runtime_api.h:897
hipDeviceptr_t address
Definition hip_runtime_api.h:902
uint32_t value
Definition hip_runtime_api.h:904
unsigned int flags
Definition hip_runtime_api.h:907
Union representing batch memory operation parameters for HIP streams.
Definition hip_runtime_api.h:888
hipStreamBatchMemOpType operation
Definition hip_runtime_api.h:889
struct hipStreamBatchMemOpParams::hipStreamMemOpWriteValueParams_t writeValue
struct hipStreamBatchMemOpParams::hipStreamMemOpWaitValueParams_t waitValue

Field Documentation

◆ flushRemoteWrites

struct hipStreamBatchMemOpParams::hipStreamMemOpFlushRemoteWritesParams_t hipStreamBatchMemOpParams::flushRemoteWrites

Currently not supported on AMD.

◆ memoryBarrier

struct hipStreamBatchMemOpParams::hipStreamMemOpMemoryBarrierParams_t hipStreamBatchMemOpParams::memoryBarrier

Currently not supported on AMD.

◆ operation

hipStreamBatchMemOpType hipStreamBatchMemOpParams::operation

◆ pad

uint64_t hipStreamBatchMemOpParams::pad[6]

◆ waitValue

struct hipStreamBatchMemOpParams::hipStreamMemOpWaitValueParams_t hipStreamBatchMemOpParams::waitValue

◆ writeValue

struct hipStreamBatchMemOpParams::hipStreamMemOpWriteValueParams_t hipStreamBatchMemOpParams::writeValue

The documentation for this union was generated from the following file: