hipDeviceProp_t Struct Reference

hipDeviceProp_t Struct Reference#

HIP Runtime API Reference: hipDeviceProp_t Struct Reference
hipDeviceProp_t Struct Reference

#include <hip_runtime_api.h>

Collaboration diagram for hipDeviceProp_t:
[legend]

Data Fields

char name [256]
 Device name.
 
hipUUID uuid
 UUID of a device.
 
char luid [8]
 8-byte unique identifier. Only valid on windows
 
unsigned int luidDeviceNodeMask
 LUID node mask.
 
size_t totalGlobalMem
 Size of global memory region (in bytes).
 
size_t sharedMemPerBlock
 Size of shared memory per block (in bytes).
 
int regsPerBlock
 Registers per block.
 
int warpSize
 Warp size.
 
size_t memPitch
 
int maxThreadsPerBlock
 Max work items per work group or workgroup max size.
 
int maxThreadsDim [3]
 Max number of threads in each dimension (XYZ) of a block.
 
int maxGridSize [3]
 Max grid dimensions (XYZ).
 
int clockRate
 Max clock frequency of the multiProcessors in khz.
 
size_t totalConstMem
 
int major
 
int minor
 
size_t textureAlignment
 Alignment requirement for textures.
 
size_t texturePitchAlignment
 Pitch alignment requirement for texture references bound to.
 
int deviceOverlap
 Deprecated. Use asyncEngineCount instead.
 
int multiProcessorCount
 Number of multi-processors (compute units).
 
int kernelExecTimeoutEnabled
 Run time limit for kernels executed on the device.
 
int integrated
 APU vs dGPU.
 
int canMapHostMemory
 Check whether HIP can map host memory.
 
int computeMode
 Compute mode.
 
int maxTexture1D
 Maximum number of elements in 1D images.
 
int maxTexture1DMipmap
 Maximum 1D mipmap texture size.
 
int maxTexture1DLinear
 Maximum size for 1D textures bound to linear memory.
 
int maxTexture2D [2]
 Maximum dimensions (width, height) of 2D images, in image elements.
 
int maxTexture2DMipmap [2]
 Maximum number of elements in 2D array mipmap of images.
 
int maxTexture2DLinear [3]
 Maximum 2D tex dimensions if tex are bound to pitched memory.
 
int maxTexture2DGather [2]
 Maximum 2D tex dimensions if gather has to be performed.
 
int maxTexture3D [3]
 
int maxTexture3DAlt [3]
 Maximum alternate 3D texture dims.
 
int maxTextureCubemap
 Maximum cubemap texture dims.
 
int maxTexture1DLayered [2]
 Maximum number of elements in 1D array images.
 
int maxTexture2DLayered [3]
 Maximum number of elements in 2D array images.
 
int maxTextureCubemapLayered [2]
 Maximum cubemaps layered texture dims.
 
int maxSurface1D
 Maximum 1D surface size.
 
int maxSurface2D [2]
 Maximum 2D surface size.
 
int maxSurface3D [3]
 Maximum 3D surface size.
 
int maxSurface1DLayered [2]
 Maximum 1D layered surface size.
 
int maxSurface2DLayered [3]
 Maximum 2D layared surface size.
 
int maxSurfaceCubemap
 Maximum cubemap surface size.
 
int maxSurfaceCubemapLayered [2]
 Maximum cubemap layered surface size.
 
size_t surfaceAlignment
 Alignment requirement for surface.
 
int concurrentKernels
 Device can possibly execute multiple kernels concurrently.
 
int ECCEnabled
 Device has ECC support enabled.
 
int pciBusID
 PCI Bus ID.
 
int pciDeviceID
 PCI Device ID.
 
int pciDomainID
 PCI Domain ID.
 
int tccDriver
 1:If device is Tesla device using TCC driver, else 0
 
int asyncEngineCount
 Number of async engines.
 
int unifiedAddressing
 Does device and host share unified address space.
 
int memoryClockRate
 Max global memory clock frequency in khz.
 
int memoryBusWidth
 Global memory bus width in bits.
 
int l2CacheSize
 L2 cache size.
 
int persistingL2CacheMaxSize
 Device's max L2 persisting lines in bytes.
 
int maxThreadsPerMultiProcessor
 Maximum resident threads per multi-processor.
 
int streamPrioritiesSupported
 Device supports stream priority.
 
int globalL1CacheSupported
 Indicates globals are cached in L1.
 
int localL1CacheSupported
 Locals are cahced in L1.
 
size_t sharedMemPerMultiprocessor
 Amount of shared memory available per multiprocessor.
 
int regsPerMultiprocessor
 registers available per multiprocessor
 
int managedMemory
 Device supports allocating managed memory on this system.
 
int isMultiGpuBoard
 1 if device is on a multi-GPU board, 0 if not.
 
int multiGpuBoardGroupID
 Unique identifier for a group of devices on same multiboard GPU.
 
int hostNativeAtomicSupported
 Link between host and device supports native atomics.
 
int singleToDoublePrecisionPerfRatio
 Deprecated. CUDA only.
 
int pageableMemoryAccess
 
int concurrentManagedAccess
 
int computePreemptionSupported
 Is compute preemption supported on the device.
 
int canUseHostPointerForRegisteredMem
 
int cooperativeLaunch
 HIP device supports cooperative launch.
 
int cooperativeMultiDeviceLaunch
 
size_t sharedMemPerBlockOptin
 Per device m ax shared mem per block usable by special opt in.
 
int pageableMemoryAccessUsesHostPageTables
 
int directManagedMemAccessFromHost
 
int maxBlocksPerMultiProcessor
 Max number of blocks on CU.
 
int accessPolicyMaxWindowSize
 Max value of access policy window.
 
size_t reservedSharedMemPerBlock
 Shared memory reserved by driver per block.
 
int hostRegisterSupported
 Device supports hipHostRegister.
 
int sparseHipArraySupported
 Indicates if device supports sparse hip arrays.
 
int hostRegisterReadOnlySupported
 
int timelineSemaphoreInteropSupported
 Indicates external timeline semaphore support.
 
int memoryPoolsSupported
 Indicates if device supports hipMallocAsync and hipMemPool APIs.
 
int gpuDirectRDMASupported
 Indicates device support of RDMA APIs.
 
unsigned int gpuDirectRDMAFlushWritesOptions
 
int gpuDirectRDMAWritesOrdering
 value of hipGPUDirectRDMAWritesOrdering
 
unsigned int memoryPoolSupportedHandleTypes
 Bitmask of handle types support with mempool based IPC.
 
int deferredMappingHipArraySupported
 
int ipcEventSupported
 Device supports IPC events.
 
int clusterLaunch
 Device supports cluster launch.
 
int unifiedFunctionPointers
 Indicates device supports unified function pointers.
 
int reserved [63]
 CUDA Reserved.
 
int hipReserved [32]
 Reserved for adding new entries for HIP/CUDA.
 
char gcnArchName [256]
 AMD GCN Arch Name. HIP Only.
 
size_t maxSharedMemoryPerMultiProcessor
 Maximum Shared Memory Per CU. HIP Only.
 
int clockInstructionRate
 
hipDeviceArch_t arch
 Architectural feature flags. New for HIP.
 
unsigned int * hdpMemFlushCntl
 Addres of HDP_MEM_COHERENCY_FLUSH_CNTL register.
 
unsigned int * hdpRegFlushCntl
 Addres of HDP_REG_COHERENCY_FLUSH_CNTL register.
 
int cooperativeMultiDeviceUnmatchedFunc
 
int cooperativeMultiDeviceUnmatchedGridDim
 
int cooperativeMultiDeviceUnmatchedBlockDim
 
int cooperativeMultiDeviceUnmatchedSharedMem
 
int isLargeBar
 1: if it is a large PCI bar device, else 0
 
int asicRevision
 Revision of the GPU in this device.
 

Detailed Description

hipDeviceProp

Field Documentation

◆ accessPolicyMaxWindowSize

int hipDeviceProp_t::accessPolicyMaxWindowSize

Max value of access policy window.

◆ arch

hipDeviceArch_t hipDeviceProp_t::arch

Architectural feature flags. New for HIP.

◆ asicRevision

int hipDeviceProp_t::asicRevision

Revision of the GPU in this device.

◆ asyncEngineCount

int hipDeviceProp_t::asyncEngineCount

Number of async engines.

◆ canMapHostMemory

int hipDeviceProp_t::canMapHostMemory

Check whether HIP can map host memory.

◆ canUseHostPointerForRegisteredMem

int hipDeviceProp_t::canUseHostPointerForRegisteredMem

Device can access host registered memory with same address as the host

◆ clockInstructionRate

int hipDeviceProp_t::clockInstructionRate

Frequency in khz of the timer used by the device-side "clock*" instructions. New for HIP.

◆ clockRate

int hipDeviceProp_t::clockRate

Max clock frequency of the multiProcessors in khz.

◆ clusterLaunch

int hipDeviceProp_t::clusterLaunch

Device supports cluster launch.

◆ computeMode

int hipDeviceProp_t::computeMode

Compute mode.

◆ computePreemptionSupported

int hipDeviceProp_t::computePreemptionSupported

Is compute preemption supported on the device.

◆ concurrentKernels

int hipDeviceProp_t::concurrentKernels

Device can possibly execute multiple kernels concurrently.

◆ concurrentManagedAccess

int hipDeviceProp_t::concurrentManagedAccess

Device can coherently access managed memory concurrently with the CPU

◆ cooperativeLaunch

int hipDeviceProp_t::cooperativeLaunch

HIP device supports cooperative launch.

◆ cooperativeMultiDeviceLaunch

int hipDeviceProp_t::cooperativeMultiDeviceLaunch

HIP device supports cooperative launch on multiple devices

◆ cooperativeMultiDeviceUnmatchedBlockDim

int hipDeviceProp_t::cooperativeMultiDeviceUnmatchedBlockDim

HIP device supports cooperative launch on multiple devices with unmatched block dimensions

◆ cooperativeMultiDeviceUnmatchedFunc

int hipDeviceProp_t::cooperativeMultiDeviceUnmatchedFunc

HIP device supports cooperative launch on multiple devices with unmatched functions

◆ cooperativeMultiDeviceUnmatchedGridDim

int hipDeviceProp_t::cooperativeMultiDeviceUnmatchedGridDim

HIP device supports cooperative launch on multiple devices with unmatched grid dimensions

◆ cooperativeMultiDeviceUnmatchedSharedMem

int hipDeviceProp_t::cooperativeMultiDeviceUnmatchedSharedMem

HIP device supports cooperative launch on multiple devices with unmatched shared memories

◆ deferredMappingHipArraySupported

int hipDeviceProp_t::deferredMappingHipArraySupported

Device supports deferred mapping HIP arrays and HIP mipmapped arrays

◆ deviceOverlap

int hipDeviceProp_t::deviceOverlap

Deprecated. Use asyncEngineCount instead.

◆ directManagedMemAccessFromHost

int hipDeviceProp_t::directManagedMemAccessFromHost

Host can directly access managed memory on the device without migration

◆ ECCEnabled

int hipDeviceProp_t::ECCEnabled

Device has ECC support enabled.

◆ gcnArchName

char hipDeviceProp_t::gcnArchName[256]

AMD GCN Arch Name. HIP Only.

◆ globalL1CacheSupported

int hipDeviceProp_t::globalL1CacheSupported

Indicates globals are cached in L1.

◆ gpuDirectRDMAFlushWritesOptions

unsigned int hipDeviceProp_t::gpuDirectRDMAFlushWritesOptions

Bitmask to be interpreted according to hipFlushGPUDirectRDMAWritesOptions

◆ gpuDirectRDMASupported

int hipDeviceProp_t::gpuDirectRDMASupported

Indicates device support of RDMA APIs.

◆ gpuDirectRDMAWritesOrdering

int hipDeviceProp_t::gpuDirectRDMAWritesOrdering

value of hipGPUDirectRDMAWritesOrdering

◆ hdpMemFlushCntl

unsigned int* hipDeviceProp_t::hdpMemFlushCntl

Addres of HDP_MEM_COHERENCY_FLUSH_CNTL register.

◆ hdpRegFlushCntl

unsigned int* hipDeviceProp_t::hdpRegFlushCntl

Addres of HDP_REG_COHERENCY_FLUSH_CNTL register.

◆ hipReserved

int hipDeviceProp_t::hipReserved[32]

Reserved for adding new entries for HIP/CUDA.

◆ hostNativeAtomicSupported

int hipDeviceProp_t::hostNativeAtomicSupported

Link between host and device supports native atomics.

◆ hostRegisterReadOnlySupported

int hipDeviceProp_t::hostRegisterReadOnlySupported

Device supports using the hipHostRegisterReadOnly flag with hipHostRegistger

◆ hostRegisterSupported

int hipDeviceProp_t::hostRegisterSupported

Device supports hipHostRegister.

◆ integrated

int hipDeviceProp_t::integrated

APU vs dGPU.

◆ ipcEventSupported

int hipDeviceProp_t::ipcEventSupported

Device supports IPC events.

◆ isLargeBar

int hipDeviceProp_t::isLargeBar

1: if it is a large PCI bar device, else 0

◆ isMultiGpuBoard

int hipDeviceProp_t::isMultiGpuBoard

1 if device is on a multi-GPU board, 0 if not.

◆ kernelExecTimeoutEnabled

int hipDeviceProp_t::kernelExecTimeoutEnabled

Run time limit for kernels executed on the device.

◆ l2CacheSize

int hipDeviceProp_t::l2CacheSize

L2 cache size.

◆ localL1CacheSupported

int hipDeviceProp_t::localL1CacheSupported

Locals are cahced in L1.

◆ luid

char hipDeviceProp_t::luid[8]

8-byte unique identifier. Only valid on windows

◆ luidDeviceNodeMask

unsigned int hipDeviceProp_t::luidDeviceNodeMask

LUID node mask.

◆ major

int hipDeviceProp_t::major

Major compute capability. On HCC, this is an approximation and features may differ from CUDA CC. See the arch feature flags for portable ways to query feature caps.

◆ managedMemory

int hipDeviceProp_t::managedMemory

Device supports allocating managed memory on this system.

◆ maxBlocksPerMultiProcessor

int hipDeviceProp_t::maxBlocksPerMultiProcessor

Max number of blocks on CU.

◆ maxGridSize

int hipDeviceProp_t::maxGridSize[3]

Max grid dimensions (XYZ).

◆ maxSharedMemoryPerMultiProcessor

size_t hipDeviceProp_t::maxSharedMemoryPerMultiProcessor

Maximum Shared Memory Per CU. HIP Only.

◆ maxSurface1D

int hipDeviceProp_t::maxSurface1D

Maximum 1D surface size.

◆ maxSurface1DLayered

int hipDeviceProp_t::maxSurface1DLayered[2]

Maximum 1D layered surface size.

◆ maxSurface2D

int hipDeviceProp_t::maxSurface2D[2]

Maximum 2D surface size.

◆ maxSurface2DLayered

int hipDeviceProp_t::maxSurface2DLayered[3]

Maximum 2D layared surface size.

◆ maxSurface3D

int hipDeviceProp_t::maxSurface3D[3]

Maximum 3D surface size.

◆ maxSurfaceCubemap

int hipDeviceProp_t::maxSurfaceCubemap

Maximum cubemap surface size.

◆ maxSurfaceCubemapLayered

int hipDeviceProp_t::maxSurfaceCubemapLayered[2]

Maximum cubemap layered surface size.

◆ maxTexture1D

int hipDeviceProp_t::maxTexture1D

Maximum number of elements in 1D images.

◆ maxTexture1DLayered

int hipDeviceProp_t::maxTexture1DLayered[2]

Maximum number of elements in 1D array images.

◆ maxTexture1DLinear

int hipDeviceProp_t::maxTexture1DLinear

Maximum size for 1D textures bound to linear memory.

◆ maxTexture1DMipmap

int hipDeviceProp_t::maxTexture1DMipmap

Maximum 1D mipmap texture size.

◆ maxTexture2D

int hipDeviceProp_t::maxTexture2D[2]

Maximum dimensions (width, height) of 2D images, in image elements.

◆ maxTexture2DGather

int hipDeviceProp_t::maxTexture2DGather[2]

Maximum 2D tex dimensions if gather has to be performed.

◆ maxTexture2DLayered

int hipDeviceProp_t::maxTexture2DLayered[3]

Maximum number of elements in 2D array images.

◆ maxTexture2DLinear

int hipDeviceProp_t::maxTexture2DLinear[3]

Maximum 2D tex dimensions if tex are bound to pitched memory.

◆ maxTexture2DMipmap

int hipDeviceProp_t::maxTexture2DMipmap[2]

Maximum number of elements in 2D array mipmap of images.

◆ maxTexture3D

int hipDeviceProp_t::maxTexture3D[3]

Maximum dimensions (width, height, depth) of 3D images, in image elements

◆ maxTexture3DAlt

int hipDeviceProp_t::maxTexture3DAlt[3]

Maximum alternate 3D texture dims.

◆ maxTextureCubemap

int hipDeviceProp_t::maxTextureCubemap

Maximum cubemap texture dims.

◆ maxTextureCubemapLayered

int hipDeviceProp_t::maxTextureCubemapLayered[2]

Maximum cubemaps layered texture dims.

◆ maxThreadsDim

int hipDeviceProp_t::maxThreadsDim[3]

Max number of threads in each dimension (XYZ) of a block.

◆ maxThreadsPerBlock

int hipDeviceProp_t::maxThreadsPerBlock

Max work items per work group or workgroup max size.

◆ maxThreadsPerMultiProcessor

int hipDeviceProp_t::maxThreadsPerMultiProcessor

Maximum resident threads per multi-processor.

◆ memoryBusWidth

int hipDeviceProp_t::memoryBusWidth

Global memory bus width in bits.

◆ memoryClockRate

int hipDeviceProp_t::memoryClockRate

Max global memory clock frequency in khz.

◆ memoryPoolsSupported

int hipDeviceProp_t::memoryPoolsSupported

Indicates if device supports hipMallocAsync and hipMemPool APIs.

◆ memoryPoolSupportedHandleTypes

unsigned int hipDeviceProp_t::memoryPoolSupportedHandleTypes

Bitmask of handle types support with mempool based IPC.

◆ memPitch

size_t hipDeviceProp_t::memPitch

Maximum pitch in bytes allowed by memory copies pitched memory

◆ minor

int hipDeviceProp_t::minor

Minor compute capability. On HCC, this is an approximation and features may differ from CUDA CC. See the arch feature flags for portable ways to query feature caps.

◆ multiGpuBoardGroupID

int hipDeviceProp_t::multiGpuBoardGroupID

Unique identifier for a group of devices on same multiboard GPU.

◆ multiProcessorCount

int hipDeviceProp_t::multiProcessorCount

Number of multi-processors (compute units).

◆ name

char hipDeviceProp_t::name[256]

Device name.

◆ pageableMemoryAccess

int hipDeviceProp_t::pageableMemoryAccess

Device supports coherently accessing pageable memory without calling hipHostRegister on it

◆ pageableMemoryAccessUsesHostPageTables

int hipDeviceProp_t::pageableMemoryAccessUsesHostPageTables

Device accesses pageable memory via the host's page tables

◆ pciBusID

int hipDeviceProp_t::pciBusID

PCI Bus ID.

◆ pciDeviceID

int hipDeviceProp_t::pciDeviceID

PCI Device ID.

◆ pciDomainID

int hipDeviceProp_t::pciDomainID

PCI Domain ID.

◆ persistingL2CacheMaxSize

int hipDeviceProp_t::persistingL2CacheMaxSize

Device's max L2 persisting lines in bytes.

◆ regsPerBlock

int hipDeviceProp_t::regsPerBlock

Registers per block.

◆ regsPerMultiprocessor

int hipDeviceProp_t::regsPerMultiprocessor

registers available per multiprocessor

◆ reserved

int hipDeviceProp_t::reserved[63]

CUDA Reserved.

◆ reservedSharedMemPerBlock

size_t hipDeviceProp_t::reservedSharedMemPerBlock

Shared memory reserved by driver per block.

◆ sharedMemPerBlock

size_t hipDeviceProp_t::sharedMemPerBlock

Size of shared memory per block (in bytes).

◆ sharedMemPerBlockOptin

size_t hipDeviceProp_t::sharedMemPerBlockOptin

Per device m ax shared mem per block usable by special opt in.

◆ sharedMemPerMultiprocessor

size_t hipDeviceProp_t::sharedMemPerMultiprocessor

Amount of shared memory available per multiprocessor.

◆ singleToDoublePrecisionPerfRatio

int hipDeviceProp_t::singleToDoublePrecisionPerfRatio

Deprecated. CUDA only.

◆ sparseHipArraySupported

int hipDeviceProp_t::sparseHipArraySupported

Indicates if device supports sparse hip arrays.

◆ streamPrioritiesSupported

int hipDeviceProp_t::streamPrioritiesSupported

Device supports stream priority.

◆ surfaceAlignment

size_t hipDeviceProp_t::surfaceAlignment

Alignment requirement for surface.

◆ tccDriver

int hipDeviceProp_t::tccDriver

1:If device is Tesla device using TCC driver, else 0

◆ textureAlignment

size_t hipDeviceProp_t::textureAlignment

Alignment requirement for textures.

◆ texturePitchAlignment

size_t hipDeviceProp_t::texturePitchAlignment

Pitch alignment requirement for texture references bound to.

◆ timelineSemaphoreInteropSupported

int hipDeviceProp_t::timelineSemaphoreInteropSupported

Indicates external timeline semaphore support.

◆ totalConstMem

size_t hipDeviceProp_t::totalConstMem

Size of shared constant memory region on the device (in bytes).

◆ totalGlobalMem

size_t hipDeviceProp_t::totalGlobalMem

Size of global memory region (in bytes).

◆ unifiedAddressing

int hipDeviceProp_t::unifiedAddressing

Does device and host share unified address space.

◆ unifiedFunctionPointers

int hipDeviceProp_t::unifiedFunctionPointers

Indicates device supports unified function pointers.

◆ uuid

hipUUID hipDeviceProp_t::uuid

UUID of a device.

◆ warpSize

int hipDeviceProp_t::warpSize

Warp size.


The documentation for this struct was generated from the following file:
  • /home/docs/checkouts/readthedocs.org/user_builds/advanced-micro-devices-hip/checkouts/docs-6.2.1/include/hip/hip_runtime_api.h