/home/docs/checkouts/readthedocs.org/user_builds/advanced-micro-devices-rpp/checkouts/docs-6.1.1/include/rppi_logical_operations.h Source File

/home/docs/checkouts/readthedocs.org/user_builds/advanced-micro-devices-rpp/checkouts/docs-6.1.1/include/rppi_logical_operations.h Source File#

RPP: /home/docs/checkouts/readthedocs.org/user_builds/advanced-micro-devices-rpp/checkouts/docs-6.1.1/include/rppi_logical_operations.h Source File
rppi_logical_operations.h
Go to the documentation of this file.
1 /*
2 MIT License
3 
4 Copyright (c) 2019 - 2024 Advanced Micro Devices, Inc.
5 
6 Permission is hereby granted, free of charge, to any person obtaining a copy
7 of this software and associated documentation files (the "Software"), to deal
8 in the Software without restriction, including without limitation the rights
9 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 copies of the Software, and to permit persons to whom the Software is
11 furnished to do so, subject to the following conditions:
12 
13 The above copyright notice and this permission notice shall be included in all
14 copies or substantial portions of the Software.
15 
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 SOFTWARE.
23 */
24 
25 #ifndef RPPI_LOGICAL_OPERATIONS_H
26 #define RPPI_LOGICAL_OPERATIONS_H
27 
28 #include "rppdefs.h"
29 #include "rpp.h"
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
46 /******************** bitwise_AND ********************/
47 
48 // Performs an element-wise bitwise AND between corresponding pixels of two batches of images
49 
50 // *param[in] srcPtr1 Input image1 batch
51 // *param[in] srcPtr2 Input image2 batch
52 // *param[in] srcSize Array containing an RppiSize for each image in the batch
53 // *param[in] maxSrcSize A single RppiSize which is the maxWidth and maxHeight for all images in the batch
54 // *param[out] dstPtr Output image batch
55 // *param[in] nbatchSize Batch size or the number of images in the batch
56 // *param[in] rppHandle OpenCL-handle/HIP-handle for "_gpu" variants and Host-handle for "_host" variants
57 // *returns a RppStatus enumeration.
58 // *retval RPP_SUCCESS : No error, Succesful completion
59 // *retval RPP_ERROR : Error
60 
61 RppStatus rppi_bitwise_AND_u8_pln1_batchPD_host(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
62 RppStatus rppi_bitwise_AND_u8_pln3_batchPD_host(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
63 RppStatus rppi_bitwise_AND_u8_pkd3_batchPD_host(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
64 #ifdef GPU_SUPPORT
65 RppStatus rppi_bitwise_AND_u8_pln1_batchPD_gpu(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
66 RppStatus rppi_bitwise_AND_u8_pln3_batchPD_gpu(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
67 RppStatus rppi_bitwise_AND_u8_pkd3_batchPD_gpu(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
68 #endif // GPU_SUPPORT
69 
70 /******************** bitwise_NOT ********************/
71 
72 // Performs an element-wise bitwise NOT of a batch of images
73 
74 // *param[in] srcPtr1 Input image1 batch
75 // *param[in] srcSize Array containing an RppiSize for each image in the batch
76 // *param[in] maxSrcSize A single RppiSize which is the maxWidth and maxHeight for all images in the batch
77 // *param[out] dstPtr Output image batch
78 // *param[in] nbatchSize Batch size or the number of images in the batch
79 // *param[in] rppHandle OpenCL-handle/HIP-handle for "_gpu" variants and Host-handle for "_host" variants
80 // *returns a RppStatus enumeration.
81 // *retval RPP_SUCCESS : No error, Succesful completion
82 // *retval RPP_ERROR : Error
83 
84 RppStatus rppi_bitwise_NOT_u8_pln1_batchPD_host(RppPtr_t srcPtr1, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
85 RppStatus rppi_bitwise_NOT_u8_pln3_batchPD_host(RppPtr_t srcPtr1, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
86 RppStatus rppi_bitwise_NOT_u8_pkd3_batchPD_host(RppPtr_t srcPtr1, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
87 #ifdef GPU_SUPPORT
88 RppStatus rppi_bitwise_NOT_u8_pln1_batchPD_gpu(RppPtr_t srcPtr1, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
89 RppStatus rppi_bitwise_NOT_u8_pln3_batchPD_gpu(RppPtr_t srcPtr1, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
90 RppStatus rppi_bitwise_NOT_u8_pkd3_batchPD_gpu(RppPtr_t srcPtr1, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
91 #endif // GPU_SUPPORT
92 
93 /******************** exclusive_OR ********************/
94 
95 // Performs an element-wise exclusive OR between corresponding pixels of two batches of images
96 
97 // *param[in] srcPtr1 Input image1 batch
98 // *param[in] srcPtr2 Input image2 batch
99 // *param[in] srcSize Array containing an RppiSize for each image in the batch
100 // *param[in] maxSrcSize A single RppiSize which is the maxWidth and maxHeight for all images in the batch
101 // *param[out] dstPtr Output image batch
102 // *param[in] nbatchSize Batch size or the number of images in the batch
103 // *param[in] rppHandle OpenCL-handle/HIP-handle for "_gpu" variants and Host-handle for "_host" variants
104 // *returns a RppStatus enumeration.
105 // *retval RPP_SUCCESS : No error, Succesful completion
106 // *retval RPP_ERROR : Error
107 
108 RppStatus rppi_exclusive_OR_u8_pln1_batchPD_host(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
109 RppStatus rppi_exclusive_OR_u8_pln3_batchPD_host(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
110 RppStatus rppi_exclusive_OR_u8_pkd3_batchPD_host(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
111 #ifdef GPU_SUPPORT
112 RppStatus rppi_exclusive_OR_u8_pln1_batchPD_gpu(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
113 RppStatus rppi_exclusive_OR_u8_pln3_batchPD_gpu(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
114 RppStatus rppi_exclusive_OR_u8_pkd3_batchPD_gpu(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
115 #endif // GPU_SUPPORT
116 
117 /******************** inclusive_OR ********************/
118 
119 // Performs an element-wise inclusive OR between corresponding pixels of two batches of images
120 
121 // *param[in] srcPtr1 Input image1 batch
122 // *param[in] srcPtr2 Input image2 batch
123 // *param[in] srcSize Array containing an RppiSize for each image in the batch
124 // *param[in] maxSrcSize A single RppiSize which is the maxWidth and maxHeight for all images in the batch
125 // *param[out] dstPtr Output image batch
126 // *param[in] nbatchSize Batch size or the number of images in the batch
127 // *param[in] rppHandle OpenCL-handle/HIP-handle for "_gpu" variants and Host-handle for "_host" variants
128 // *returns a RppStatus enumeration.
129 // *retval RPP_SUCCESS : No error, Succesful completion
130 // *retval RPP_ERROR : Error
131 
132 RppStatus rppi_inclusive_OR_u8_pln1_batchPD_host(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
133 RppStatus rppi_inclusive_OR_u8_pln3_batchPD_host(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
134 RppStatus rppi_inclusive_OR_u8_pkd3_batchPD_host(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
135 #ifdef GPU_SUPPORT
136 RppStatus rppi_inclusive_OR_u8_pln1_batchPD_gpu(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
137 RppStatus rppi_inclusive_OR_u8_pln3_batchPD_gpu(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
138 RppStatus rppi_inclusive_OR_u8_pkd3_batchPD_gpu(RppPtr_t srcPtr1, RppPtr_t srcPtr2, RppiSize *srcSize, RppiSize maxSrcSize, RppPtr_t dstPtr, Rpp32u nbatchSize, rppHandle_t rppHandle);
139 #endif // GPU_SUPPORT
140 
144 #ifdef __cplusplus
145 }
146 #endif
147 #endif
Rpp32u
unsigned int Rpp32u
32 bit unsigned int
Definition: rppdefs.h:62
RppPtr_t
void * RppPtr_t
void pointer
Definition: rppdefs.h:74
RppStatus
RppStatus
RPP RppStatus type enums.
Definition: rppdefs.h:82
rpp.h
RPP top-level header with RPP handle API.
rppdefs.h
RPP common HOST/GPU typedef, enum and structure definitions.
RppiSize
RPPI Image size(Width/Height dimensions) type struct.
Definition: rppdefs.h:291