amdsmi.h Source File

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• amd_smi

amdsmi.h

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1 /*

2  * Copyright (c) Advanced Micro Devices, Inc. All rights reserved.

3  *

4  * Permission is hereby granted, free of charge, to any person obtaining a copy

5  * of this software and associated documentation files (the "Software"), to deal

6  * in the Software without restriction, including without limitation the rights

7  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

8  * copies of the Software, and to permit persons to whom the Software is

9  * furnished to do so, subject to the following conditions:

10  *

11  * The above copyright notice and this permission notice shall be included in

12  * all copies or substantial portions of the Software.

13  *

14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE

17  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

19  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

20  * THE SOFTWARE.

21  */

22 

23 #ifndef __AMDSMI_H__

24 #define __AMDSMI_H__

25 

31 #include <stdlib.h>

32 #include <stdbool.h>

33 

34 #ifdef __cplusplus

35 extern "C" {

36 #include <cstdint>

37 #else // __cplusplus

38 #include <stdint.h>

39 #endif // __cplusplus

40 

48 typedef enum {

49  AMDSMI_INIT_ALL_PROCESSORS = 0xFFFFFFFF,

50  AMDSMI_INIT_AMD_CPUS = (1 << 0),

51  AMDSMI_INIT_AMD_GPUS = (1 << 1),

52  AMDSMI_INIT_NON_AMD_CPUS = (1 << 2),

53  AMDSMI_INIT_NON_AMD_GPUS = (1 << 3),

54  AMDSMI_INIT_AMD_APUS = (AMDSMI_INIT_AMD_CPUS | AMDSMI_INIT_AMD_GPUS)

56 } amdsmi_init_flags_t;

57 

63 #define AMDSMI_MAX_MM_IP_COUNT 8

64 #define AMDSMI_MAX_STRING_LENGTH 256

65 #define AMDSMI_MAX_DEVICES 32

66 #define AMDSMI_MAX_CACHE_TYPES 10

67 #define AMDSMI_MAX_ACCELERATOR_PROFILE 32

68 #define AMDSMI_MAX_CP_PROFILE_RESOURCES 32

69 #define AMDSMI_MAX_ACCELERATOR_PARTITIONS 8

70 #define AMDSMI_MAX_NUM_NUMA_NODES 32

71 

72 #define AMDSMI_GPU_UUID_SIZE 38

73 

79 #define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64

80 #define AMDSMI_MAX_CONTAINER_TYPE 2

81 

91 #define CENTRIGRADE_TO_MILLI_CENTIGRADE 1000

92 

98 #define AMDSMI_NUM_HBM_INSTANCES 4

99 

105 #define AMDSMI_MAX_NUM_VCN 4

106 

112 #define AMDSMI_MAX_NUM_CLKS 4

113 

119 #define AMDSMI_MAX_NUM_XGMI_LINKS 8

120 

126 #define AMDSMI_MAX_NUM_GFX_CLKS 8

127 

133 #define AMDSMI_MAX_AID 4

134 

140 #define AMDSMI_MAX_ENGINES 8

141 

147 #define AMDSMI_MAX_NUM_JPEG 32

148 

155 #define AMDSMI_MAX_NUM_JPEG_ENG_V1 40

156 

168 #define AMDSMI_MAX_NUM_XCC 8

169 

182 #define AMDSMI_MAX_NUM_XCP 8

183 

189 #define MAX_NUMBER_OF_AFIDS_PER_RECORD 12

190 

196 #define AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d"

197 #define AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d"

198 

207 #define AMDSMI_LIB_VERSION_MAJOR 26

208 

210 #define AMDSMI_LIB_VERSION_MINOR 0

211 

213 #define AMDSMI_LIB_VERSION_RELEASE 0

214 

215 #define AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR, MINOR, RELEASE) (#MAJOR "." #MINOR "." #RELEASE)

216 #define AMDSMI_LIB_VERSION_EXPAND_PARTS(MAJOR_STR, MINOR_STR, RELEASE_STR) AMDSMI_LIB_VERSION_CREATE_STRING(MAJOR_STR, MINOR_STR, RELEASE_STR)

217 #define AMDSMI_LIB_VERSION_STRING AMDSMI_LIB_VERSION_EXPAND_PARTS(AMDSMI_LIB_VERSION_MAJOR, AMDSMI_LIB_VERSION_MINOR, AMDSMI_LIB_VERSION_RELEASE)

218 

224 typedef enum {

225  AMDSMI_MM_UVD,

226  AMDSMI_MM_VCE,

227  AMDSMI_MM_VCN,

228  AMDSMI_MM__MAX

229 } amdsmi_mm_ip_t;

230 

236 typedef enum {

237  AMDSMI_CONTAINER_LXC,

238  AMDSMI_CONTAINER_DOCKER

239 } amdsmi_container_types_t;

240 

246 typedef void *amdsmi_processor_handle;

247 typedef void *amdsmi_socket_handle;

248 

249 #ifdef ENABLE_ESMI_LIB

250 

256 typedef void *amdsmi_cpusocket_handle;

257 

263 typedef struct {

264  uint32_t major;

265  uint32_t minor;

266 } amdsmi_hsmp_driver_version_t;

267 

268 #endif

269 

279 typedef enum {

280  AMDSMI_PROCESSOR_TYPE_UNKNOWN = 0,

281  AMDSMI_PROCESSOR_TYPE_AMD_GPU,

282  AMDSMI_PROCESSOR_TYPE_AMD_CPU,

283  AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU,

284  AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU,

285  AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE,

286  AMDSMI_PROCESSOR_TYPE_AMD_APU

287 } processor_type_t;

288 

297 typedef enum {

298  AMDSMI_STATUS_SUCCESS = 0,

299  // Library usage errors

300  AMDSMI_STATUS_INVAL = 1,

301  AMDSMI_STATUS_NOT_SUPPORTED = 2,

302  AMDSMI_STATUS_NOT_YET_IMPLEMENTED = 3,

303  AMDSMI_STATUS_FAIL_LOAD_MODULE = 4,

304  AMDSMI_STATUS_FAIL_LOAD_SYMBOL = 5,

305  AMDSMI_STATUS_DRM_ERROR = 6,

306  AMDSMI_STATUS_API_FAILED = 7,

307  AMDSMI_STATUS_TIMEOUT = 8,

308  AMDSMI_STATUS_RETRY = 9,

309  AMDSMI_STATUS_NO_PERM = 10,

310  AMDSMI_STATUS_INTERRUPT = 11,

311  AMDSMI_STATUS_IO = 12,

312  AMDSMI_STATUS_ADDRESS_FAULT = 13,

313  AMDSMI_STATUS_FILE_ERROR = 14,

314  AMDSMI_STATUS_OUT_OF_RESOURCES = 15,

315  AMDSMI_STATUS_INTERNAL_EXCEPTION = 16,

316  AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS = 17,

317  AMDSMI_STATUS_INIT_ERROR = 18,

318  AMDSMI_STATUS_REFCOUNT_OVERFLOW = 19,

319  AMDSMI_STATUS_DIRECTORY_NOT_FOUND = 20,

320  // Processor related errors

321  AMDSMI_STATUS_BUSY = 30,

322  AMDSMI_STATUS_NOT_FOUND = 31,

323  AMDSMI_STATUS_NOT_INIT = 32,

324  AMDSMI_STATUS_NO_SLOT = 33,

325  AMDSMI_STATUS_DRIVER_NOT_LOADED = 34,

326  // Data and size errors

327  AMDSMI_STATUS_MORE_DATA = 39,

328  AMDSMI_STATUS_NO_DATA = 40,

329  AMDSMI_STATUS_INSUFFICIENT_SIZE = 41,

330  AMDSMI_STATUS_UNEXPECTED_SIZE = 42,

331  AMDSMI_STATUS_UNEXPECTED_DATA = 43,

332  //esmi errors

333  AMDSMI_STATUS_NON_AMD_CPU = 44,

334  AMDSMI_STATUS_NO_ENERGY_DRV = 45,

335  AMDSMI_STATUS_NO_MSR_DRV = 46,

336  AMDSMI_STATUS_NO_HSMP_DRV = 47,

337  AMDSMI_STATUS_NO_HSMP_SUP = 48,

338  AMDSMI_STATUS_NO_HSMP_MSG_SUP = 49,

339  AMDSMI_STATUS_HSMP_TIMEOUT = 50,

340  AMDSMI_STATUS_NO_DRV = 51,

341  AMDSMI_STATUS_FILE_NOT_FOUND = 52,

342  AMDSMI_STATUS_ARG_PTR_NULL = 53,

343  AMDSMI_STATUS_AMDGPU_RESTART_ERR = 54,

344  AMDSMI_STATUS_SETTING_UNAVAILABLE = 55,

345  AMDSMI_STATUS_CORRUPTED_EEPROM = 56,

346  // General errors

347  AMDSMI_STATUS_MAP_ERROR = 0xFFFFFFFE,

348  AMDSMI_STATUS_UNKNOWN_ERROR = 0xFFFFFFFF

349 } amdsmi_status_t;

350 

356 typedef enum {

357  AMDSMI_CLK_TYPE_SYS = 0x0,

358  AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,

359  AMDSMI_CLK_TYPE_GFX = AMDSMI_CLK_TYPE_SYS,

360  AMDSMI_CLK_TYPE_DF,

362  AMDSMI_CLK_TYPE_DCEF,

364  AMDSMI_CLK_TYPE_SOC,

365  AMDSMI_CLK_TYPE_MEM,

366  AMDSMI_CLK_TYPE_PCIE,

367  AMDSMI_CLK_TYPE_VCLK0,

368  AMDSMI_CLK_TYPE_VCLK1,

369  AMDSMI_CLK_TYPE_DCLK0,

370  AMDSMI_CLK_TYPE_DCLK1,

371  AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1

372 } amdsmi_clk_type_t;

373 

379 typedef enum {

380  AMDSMI_ACCELERATOR_PARTITION_INVALID = 0,

381  AMDSMI_ACCELERATOR_PARTITION_SPX,

383  AMDSMI_ACCELERATOR_PARTITION_DPX,

385  AMDSMI_ACCELERATOR_PARTITION_TPX,

387  AMDSMI_ACCELERATOR_PARTITION_QPX,

389  AMDSMI_ACCELERATOR_PARTITION_CPX,

391  AMDSMI_ACCELERATOR_PARTITION_MAX

392 } amdsmi_accelerator_partition_type_t;

393 

399 typedef enum {

400  AMDSMI_ACCELERATOR_XCC,

401  AMDSMI_ACCELERATOR_ENCODER,

402  AMDSMI_ACCELERATOR_DECODER,

403  AMDSMI_ACCELERATOR_DMA,

404  AMDSMI_ACCELERATOR_JPEG,

405  AMDSMI_ACCELERATOR_MAX

406 } amdsmi_accelerator_partition_resource_type_t;

407 

414 typedef enum {

415  AMDSMI_COMPUTE_PARTITION_INVALID = 0,

416  AMDSMI_COMPUTE_PARTITION_SPX,

418  AMDSMI_COMPUTE_PARTITION_DPX,

420  AMDSMI_COMPUTE_PARTITION_TPX,

422  AMDSMI_COMPUTE_PARTITION_QPX,

424  AMDSMI_COMPUTE_PARTITION_CPX

426 } amdsmi_compute_partition_type_t;

427 

433 typedef enum {

434  AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,

435  AMDSMI_MEMORY_PARTITION_NPS1 = 1,

437  AMDSMI_MEMORY_PARTITION_NPS2 = 2,

440  AMDSMI_MEMORY_PARTITION_NPS4 = 4,

443  AMDSMI_MEMORY_PARTITION_NPS8 = 8,

448 } amdsmi_memory_partition_type_t;

449 

456 typedef enum {

457  AMDSMI_TEMPERATURE_TYPE_EDGE,

458  AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,

459  AMDSMI_TEMPERATURE_TYPE_HOTSPOT,

460  AMDSMI_TEMPERATURE_TYPE_JUNCTION = AMDSMI_TEMPERATURE_TYPE_HOTSPOT,

461  AMDSMI_TEMPERATURE_TYPE_VRAM,

462  AMDSMI_TEMPERATURE_TYPE_HBM_0,

463  AMDSMI_TEMPERATURE_TYPE_HBM_1,

464  AMDSMI_TEMPERATURE_TYPE_HBM_2,

465  AMDSMI_TEMPERATURE_TYPE_HBM_3,

466  AMDSMI_TEMPERATURE_TYPE_PLX,

467 

468  // GPU Board Node temperature

469  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST = 100,

470  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_RETIMER_X

471  = AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_FIRST,

472  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC,

473  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC_2,

474  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR,

475  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR,

476  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR,

477  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_LAST = 149,

478 

479  // GPU Board VR (Voltage Regulator) temperature

480  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST = 150,

481  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0

482  = AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_FIRST,

483  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1,

484  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2,

485  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD3,

486  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_A,

487  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_C,

488  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_A,

489  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_C,

490  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_085_HBM,

491  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_B,

492  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_D,

493  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_USR,

494  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32,

495  AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VR_LAST = 199,

496 

497  // Baseboard System temperature

498  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST = 200,

499  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA

500  = AMDSMI_TEMPERATURE_TYPE_BASEBOARD_FIRST,

501  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FRONT,

502  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_BACK,

503  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM7,

504  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_IBC,

505  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_UFPGA,

506  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM1,

507  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_HSC,

508  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_2_3_HSC,

509  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_HSC,

510  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_6_7_HSC,

511  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_0V72_VR,

512  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_3V3_VR,

513  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR,

514  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR,

515  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR,

516  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR,

517  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR,

518  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR,

519  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR,

520  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR,

521  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC_HSC,

522  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC,

523  AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST = 249,

524  AMDSMI_TEMPERATURE_TYPE__MAX = AMDSMI_TEMPERATURE_TYPE_BASEBOARD_LAST,

525 

526 

527 } amdsmi_temperature_type_t;

528 

535 typedef enum {

536  AMDSMI_FW_ID_SMU = 1,

538  AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,

539  AMDSMI_FW_ID_CP_CE,

540  AMDSMI_FW_ID_CP_PFP,

541  AMDSMI_FW_ID_CP_ME,

542  AMDSMI_FW_ID_CP_MEC_JT1,

543  AMDSMI_FW_ID_CP_MEC_JT2,

544  AMDSMI_FW_ID_CP_MEC1,

545  AMDSMI_FW_ID_CP_MEC2,

546  AMDSMI_FW_ID_RLC,

547  AMDSMI_FW_ID_SDMA0,

548  AMDSMI_FW_ID_SDMA1,

549  AMDSMI_FW_ID_SDMA2,

550  AMDSMI_FW_ID_SDMA3,

551  AMDSMI_FW_ID_SDMA4,

552  AMDSMI_FW_ID_SDMA5,

553  AMDSMI_FW_ID_SDMA6,

554  AMDSMI_FW_ID_SDMA7,

555  AMDSMI_FW_ID_VCN,

556  AMDSMI_FW_ID_UVD,

557  AMDSMI_FW_ID_VCE,

558  AMDSMI_FW_ID_ISP,

559  AMDSMI_FW_ID_DMCU_ERAM,

560  AMDSMI_FW_ID_DMCU_ISR,

561  AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM,

562  AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM,

563  AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL,

564  AMDSMI_FW_ID_RLC_V,

565  AMDSMI_FW_ID_MMSCH,

566  AMDSMI_FW_ID_PSP_SYSDRV,

567  AMDSMI_FW_ID_PSP_SOSDRV,

568  AMDSMI_FW_ID_PSP_TOC,

569  AMDSMI_FW_ID_PSP_KEYDB,

570  AMDSMI_FW_ID_DFC,

571  AMDSMI_FW_ID_PSP_SPL,

572  AMDSMI_FW_ID_DRV_CAP,

573  AMDSMI_FW_ID_MC,

574  AMDSMI_FW_ID_PSP_BL,

575  AMDSMI_FW_ID_CP_PM4,

576  AMDSMI_FW_ID_RLC_P,

577  AMDSMI_FW_ID_SEC_POLICY_STAGE2,

578  AMDSMI_FW_ID_REG_ACCESS_WHITELIST,

579  AMDSMI_FW_ID_IMU_DRAM,

580  AMDSMI_FW_ID_IMU_IRAM,

581  AMDSMI_FW_ID_SDMA_TH0,

582  AMDSMI_FW_ID_SDMA_TH1,

583  AMDSMI_FW_ID_CP_MES,

584  AMDSMI_FW_ID_MES_KIQ,

585  AMDSMI_FW_ID_MES_STACK,

586  AMDSMI_FW_ID_MES_THREAD1,

587  AMDSMI_FW_ID_MES_THREAD1_STACK,

588  AMDSMI_FW_ID_RLX6,

589  AMDSMI_FW_ID_RLX6_DRAM_BOOT,

590  AMDSMI_FW_ID_RS64_ME,

591  AMDSMI_FW_ID_RS64_ME_P0_DATA,

592  AMDSMI_FW_ID_RS64_ME_P1_DATA,

593  AMDSMI_FW_ID_RS64_PFP,

594  AMDSMI_FW_ID_RS64_PFP_P0_DATA,

595  AMDSMI_FW_ID_RS64_PFP_P1_DATA,

596  AMDSMI_FW_ID_RS64_MEC,

597  AMDSMI_FW_ID_RS64_MEC_P0_DATA,

598  AMDSMI_FW_ID_RS64_MEC_P1_DATA,

599  AMDSMI_FW_ID_RS64_MEC_P2_DATA,

600  AMDSMI_FW_ID_RS64_MEC_P3_DATA,

601  AMDSMI_FW_ID_PPTABLE,

602  AMDSMI_FW_ID_PSP_SOC,

603  AMDSMI_FW_ID_PSP_DBG,

604  AMDSMI_FW_ID_PSP_INTF,

605  AMDSMI_FW_ID_RLX6_CORE1,

606  AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1,

607  AMDSMI_FW_ID_RLCV_LX7,

608  AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST,

609  AMDSMI_FW_ID_ASD,

610  AMDSMI_FW_ID_TA_RAS,

611  AMDSMI_FW_ID_TA_XGMI,

612  AMDSMI_FW_ID_RLC_SRLG,

613  AMDSMI_FW_ID_RLC_SRLS,

614  AMDSMI_FW_ID_PM,

615  AMDSMI_FW_ID_DMCU,

616  AMDSMI_FW_ID_PLDM_BUNDLE,

617  AMDSMI_FW_ID__MAX

618 } amdsmi_fw_block_t;

619 

625 typedef enum {

626  AMDSMI_VRAM_TYPE_UNKNOWN = 0,

627  // HBM

628  AMDSMI_VRAM_TYPE_HBM = 1,

629  AMDSMI_VRAM_TYPE_HBM2 = 2,

630  AMDSMI_VRAM_TYPE_HBM2E = 3,

631  AMDSMI_VRAM_TYPE_HBM3 = 4,

632  // DDR

633  AMDSMI_VRAM_TYPE_DDR2 = 10,

634  AMDSMI_VRAM_TYPE_DDR3 = 11,

635  AMDSMI_VRAM_TYPE_DDR4 = 12,

636  // GDDR

637  AMDSMI_VRAM_TYPE_GDDR1 = 17,

638  AMDSMI_VRAM_TYPE_GDDR2 = 18,

639  AMDSMI_VRAM_TYPE_GDDR3 = 19,

640  AMDSMI_VRAM_TYPE_GDDR4 = 20,

641  AMDSMI_VRAM_TYPE_GDDR5 = 21,

642  AMDSMI_VRAM_TYPE_GDDR6 = 22,

643  AMDSMI_VRAM_TYPE_GDDR7 = 23,

644  AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_GDDR7

645 } amdsmi_vram_type_t;

646 

652 typedef struct {

653  uint64_t lower_bound;

654  uint64_t upper_bound;

655  uint64_t reserved[2];

656 } amdsmi_range_t;

657 

663 typedef struct {

664  uint8_t xgmi_lanes;

665  uint64_t xgmi_hive_id;

666  uint64_t xgmi_node_id;

667  uint32_t index;

668  uint32_t reserved[9];

669 } amdsmi_xgmi_info_t;

670 

676 typedef struct {

677  uint32_t vram_total;

678  uint32_t vram_used;

679  uint32_t reserved[2];

680 } amdsmi_vram_usage_t;

681 

688 typedef struct {

689  uint64_t reference_timestamp;

690  uint64_t violation_timestamp;

691  uint64_t acc_counter;

692  uint64_t acc_prochot_thrm;

693  uint64_t acc_ppt_pwr;

694  uint64_t acc_socket_thrm;

695  uint64_t acc_vr_thrm;

696  uint64_t acc_hbm_thrm;

697  uint64_t acc_gfx_clk_below_host_limit;

700  uint64_t per_prochot_thrm;

701  uint64_t per_ppt_pwr;

702  uint64_t per_socket_thrm;

703  uint64_t per_vr_thrm;

704  uint64_t per_hbm_thrm;

705  uint64_t per_gfx_clk_below_host_limit;

708  uint8_t active_prochot_thrm;

709  uint8_t active_ppt_pwr;

710  uint8_t active_socket_thrm;

711  uint8_t active_vr_thrm;

712  uint8_t active_hbm_thrm;

713  uint8_t active_gfx_clk_below_host_limit;

715  //GPU metrics 1.8 violations

716  uint64_t acc_gfx_clk_below_host_limit_pwr[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

717  uint64_t acc_gfx_clk_below_host_limit_thm[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

718  uint64_t acc_low_utilization[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

719  uint64_t acc_gfx_clk_below_host_limit_total[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

720 

721  uint64_t per_gfx_clk_below_host_limit_pwr[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

722  uint64_t per_gfx_clk_below_host_limit_thm[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

723  uint64_t per_low_utilization[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

724  uint64_t per_gfx_clk_below_host_limit_total[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

725 

726  uint8_t active_gfx_clk_below_host_limit_pwr[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

727  uint8_t active_gfx_clk_below_host_limit_thm[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

728  uint8_t active_low_utilization[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

729  uint8_t active_gfx_clk_below_host_limit_total[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC];

730  uint64_t reserved[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC]; // reserved for new violation info

731  uint64_t reserved2[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC]; // reserved for new violation info

732  uint64_t reserved3[AMDSMI_MAX_NUM_XCP][AMDSMI_MAX_NUM_XCC]; // reserved for new violation info

733 } amdsmi_violation_status_t;

734 

740 typedef struct {

741  amdsmi_range_t supported_freq_range;

742  amdsmi_range_t current_freq_range;

743  uint32_t reserved[8];

744 } amdsmi_frequency_range_t;

745 

751 typedef union {

752  struct bdf_ {

753  uint64_t function_number : 3;

754  uint64_t device_number : 5;

755  uint64_t bus_number : 8;

756  uint64_t domain_number : 48;

757  } bdf;

758  struct {

759  uint64_t function_number : 3;

760  uint64_t device_number : 5;

761  uint64_t bus_number : 8;

762  uint64_t domain_number : 48;

763  };

764  uint64_t as_uint;

765 } amdsmi_bdf_t;

766 

772 typedef struct {

773  uint32_t drm_render;

774  uint32_t drm_card;

775  uint32_t hsa_id;

776  uint32_t hip_id;

777  char hip_uuid[AMDSMI_MAX_STRING_LENGTH];

778 } amdsmi_enumeration_info_t;

779 

785 typedef enum {

786  AMDSMI_CARD_FORM_FACTOR_PCIE,

787  AMDSMI_CARD_FORM_FACTOR_OAM,

788  AMDSMI_CARD_FORM_FACTOR_CEM,

789  AMDSMI_CARD_FORM_FACTOR_UNKNOWN

790 } amdsmi_card_form_factor_t;

791 

797 typedef struct {

798  struct pcie_static_ {

799  uint16_t max_pcie_width;

800  uint32_t max_pcie_speed;

801  uint32_t pcie_interface_version;

802  amdsmi_card_form_factor_t slot_type;

803  uint32_t max_pcie_interface_version;

804  uint64_t reserved[9];

805  } pcie_static;

806  struct pcie_metric_ {

807  uint16_t pcie_width;

808  uint32_t pcie_speed;

809  uint32_t pcie_bandwidth;

810  uint64_t pcie_replay_count;

811  uint64_t pcie_l0_to_recovery_count;

812  uint64_t pcie_replay_roll_over_count;

813  uint64_t pcie_nak_sent_count;

814  uint64_t pcie_nak_received_count;

815  uint32_t pcie_lc_perf_other_end_recovery_count;

816  uint64_t reserved[12];

817  } pcie_metric;

818  uint64_t reserved[32];

819 } amdsmi_pcie_info_t;

820 

826 typedef struct {

827  uint64_t power_cap;

828  uint64_t default_power_cap;

829  uint64_t dpm_cap;

830  uint64_t min_power_cap;

831  uint64_t max_power_cap;

832  uint64_t reserved[3];

833 } amdsmi_power_cap_info_t;

834 

840 typedef struct {

841  char name[AMDSMI_MAX_STRING_LENGTH];

842  char build_date[AMDSMI_MAX_STRING_LENGTH];

843  char part_number[AMDSMI_MAX_STRING_LENGTH];

844  char version[AMDSMI_MAX_STRING_LENGTH];

845  uint64_t reserved[68];

846 } amdsmi_vbios_info_t;

847 

853 typedef enum {

854  AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,

855  AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,

856  AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,

857  AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,

858  AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010

859 } amdsmi_cache_property_type_t;

860 

866 typedef struct {

867  uint32_t num_cache_types;

868  struct cache_ {

869  uint32_t cache_properties;

870  uint32_t cache_size;

871  uint32_t cache_level;

872  uint32_t max_num_cu_shared;

873  uint32_t num_cache_instance;

874  uint32_t reserved[3];

875  } cache[AMDSMI_MAX_CACHE_TYPES];

876  uint32_t reserved[15];

877 } amdsmi_gpu_cache_info_t;

878 

884 typedef struct {

885  uint8_t num_fw_info;

886  struct fw_info_list_ {

887  amdsmi_fw_block_t fw_id;

888  uint64_t fw_version;

889  uint64_t reserved[2];

890  } fw_info_list[AMDSMI_FW_ID__MAX];

891  uint32_t reserved[7];

892 } amdsmi_fw_info_t;

893 

899 typedef struct {

900  char market_name[AMDSMI_MAX_STRING_LENGTH];

901  uint32_t vendor_id;

902  char vendor_name[AMDSMI_MAX_STRING_LENGTH];

903  uint32_t subvendor_id;

904  uint64_t device_id;

905  uint32_t rev_id;

906  char asic_serial[AMDSMI_MAX_STRING_LENGTH];

907  uint32_t oam_id;

908  uint32_t num_of_compute_units;

909  uint64_t target_graphics_version;

910  uint32_t subsystem_id;

911  uint32_t reserved[21];

912 } amdsmi_asic_info_t;

913 

919 typedef struct {

920  uint64_t kfd_id;

921  uint32_t node_id;

922  uint32_t current_partition_id;

923  uint32_t reserved[12];

924 } amdsmi_kfd_info_t;

925 

931 typedef union {

932  struct nps_flags_ {

933  uint32_t nps1_cap :1;

934  uint32_t nps2_cap :1;

935  uint32_t nps4_cap :1;

936  uint32_t nps8_cap :1;

937  uint32_t reserved :28;

938  } nps_flags;

939  uint32_t nps_cap_mask;

940 } amdsmi_nps_caps_t;

941 

948 typedef struct {

949  amdsmi_nps_caps_t partition_caps;

950  amdsmi_memory_partition_type_t mp_mode;

951  uint32_t num_numa_ranges;

952  struct numa_range_ {

953  amdsmi_vram_type_t memory_type;

954  uint64_t start;

955  uint64_t end;

956  } numa_range[AMDSMI_MAX_NUM_NUMA_NODES];

957  uint64_t reserved[11];

958 } amdsmi_memory_partition_config_t;

959 

965 typedef struct {

966  amdsmi_accelerator_partition_type_t profile_type;

967  uint32_t num_partitions;

968  amdsmi_nps_caps_t memory_caps;

969  uint32_t profile_index;

970  uint32_t num_resources;

971  uint32_t resources[AMDSMI_MAX_ACCELERATOR_PARTITIONS][AMDSMI_MAX_CP_PROFILE_RESOURCES];

972  uint64_t reserved[13];

973 } amdsmi_accelerator_partition_profile_t;

974 

981 typedef struct {

982  uint32_t profile_index;

983  amdsmi_accelerator_partition_resource_type_t resource_type;

984  uint32_t partition_resource;

985  uint32_t num_partitions_share_resource;

986  uint64_t reserved[6];

987 } amdsmi_accelerator_partition_resource_profile_t;

988 

994 typedef struct {

995  uint32_t num_profiles;

996  uint32_t num_resource_profiles;

997  amdsmi_accelerator_partition_resource_profile_t resource_profiles[AMDSMI_MAX_CP_PROFILE_RESOURCES];

998  uint32_t default_profile_index;

999  amdsmi_accelerator_partition_profile_t profiles[AMDSMI_MAX_ACCELERATOR_PROFILE];

1000  uint64_t reserved[30];

1001 } amdsmi_accelerator_partition_profile_config_t;

1002 

1008 typedef enum {

1009  AMDSMI_LINK_TYPE_INTERNAL = 0,

1010  AMDSMI_LINK_TYPE_PCIE = 1,

1011  AMDSMI_LINK_TYPE_XGMI = 2,

1012  AMDSMI_LINK_TYPE_NOT_APPLICABLE = 3,

1013  AMDSMI_LINK_TYPE_UNKNOWN = 4

1014 } amdsmi_link_type_t;

1015 

1021 typedef struct {

1022  uint32_t cpu_util_total;

1023  uint32_t cpu_util_user;

1024  uint32_t cpu_util_nice;

1025  uint32_t cpu_util_sys;

1026  uint32_t cpu_util_irq;

1027 } amdsmi_cpu_util_t;

1028 

1034 typedef struct {

1035  uint32_t num_links;

1036  struct _links {

1037  amdsmi_bdf_t bdf;

1038  uint32_t bit_rate;

1039  uint32_t max_bandwidth;

1040  amdsmi_link_type_t link_type;

1041  uint64_t read;

1042  uint64_t write;

1043  uint64_t reserved[2];

1044  } links[AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK];

1045  uint64_t reserved[7];

1046 } amdsmi_link_metrics_t;

1047 

1053 typedef struct {

1054  amdsmi_vram_type_t vram_type;

1055  char vram_vendor[AMDSMI_MAX_STRING_LENGTH];

1056  uint64_t vram_size;

1057  uint32_t vram_bit_width;

1058  uint64_t vram_max_bandwidth;

1059  uint64_t reserved[37];

1060 } amdsmi_vram_info_t;

1061 

1067 typedef struct {

1068  char driver_version[AMDSMI_MAX_STRING_LENGTH];

1069  char driver_date[AMDSMI_MAX_STRING_LENGTH];

1070  char driver_name[AMDSMI_MAX_STRING_LENGTH];

1071 } amdsmi_driver_info_t;

1072 

1078 typedef struct {

1079  char model_number[AMDSMI_MAX_STRING_LENGTH];

1080  char product_serial[AMDSMI_MAX_STRING_LENGTH];

1081  char fru_id[AMDSMI_MAX_STRING_LENGTH];

1082  char product_name[AMDSMI_MAX_STRING_LENGTH];

1083  char manufacturer_name[AMDSMI_MAX_STRING_LENGTH];

1084  uint64_t reserved[64];

1085 } amdsmi_board_info_t;

1086 

1092 typedef struct {

1093  uint64_t socket_power;

1094  uint32_t current_socket_power;

1095  uint32_t average_socket_power;

1096  uint64_t gfx_voltage;

1097  uint64_t soc_voltage;

1098  uint64_t mem_voltage;

1099  uint32_t power_limit;

1100  uint64_t reserved[18];

1101 } amdsmi_power_info_t;

1107 typedef struct {

1108  uint32_t clk;

1109  uint32_t min_clk;

1110  uint32_t max_clk;

1111  uint8_t clk_locked;

1112  uint8_t clk_deep_sleep;

1113  uint32_t reserved[4];

1114 } amdsmi_clk_info_t;

1115 

1125 typedef struct {

1126  uint32_t gfx_activity;

1127  uint32_t umc_activity;

1128  uint32_t mm_activity;

1129  uint32_t reserved[13];

1130 } amdsmi_engine_usage_t;

1131 

1137 typedef uint32_t amdsmi_process_handle_t;

1138 

1144 typedef struct {

1145  char name[AMDSMI_MAX_STRING_LENGTH];

1146  amdsmi_process_handle_t pid;

1147  uint64_t mem;

1148  struct engine_usage_ {

1149  uint64_t gfx;

1150  uint64_t enc;

1151  uint32_t reserved[12];

1152  } engine_usage;

1153  struct memory_usage_ {

1154  uint64_t gtt_mem;

1155  uint64_t cpu_mem;

1156  uint64_t vram_mem;

1157  uint32_t reserved[10];

1158  } memory_usage;

1159  char container_name[AMDSMI_MAX_STRING_LENGTH];

1160  uint32_t cu_occupancy;

1161  uint32_t reserved[11];

1162 } amdsmi_proc_info_t;

1163 

1169 typedef struct {

1170  uint8_t is_iolink_coherent;

1171  uint8_t is_iolink_atomics_32bit;

1172  uint8_t is_iolink_atomics_64bit;

1173  uint8_t is_iolink_dma;

1174  uint8_t is_iolink_bi_directional;

1175 } amdsmi_p2p_capability_t;

1176 

1179 #define AMDSMI_MAX_NUM_FREQUENCIES 33

1180 

1184 #define AMDSMI_MAX_FAN_SPEED 255

1185 

1188 #define AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3

1189 

1195 typedef enum {

1196  AMDSMI_DEV_PERF_LEVEL_AUTO = 0,

1197  AMDSMI_DEV_PERF_LEVEL_FIRST = AMDSMI_DEV_PERF_LEVEL_AUTO,

1198  AMDSMI_DEV_PERF_LEVEL_LOW,

1199  AMDSMI_DEV_PERF_LEVEL_HIGH,

1200  AMDSMI_DEV_PERF_LEVEL_MANUAL,

1202  AMDSMI_DEV_PERF_LEVEL_STABLE_STD,

1203  AMDSMI_DEV_PERF_LEVEL_STABLE_PEAK,

1204  AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_MCLK,

1205  AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_SCLK,

1206  AMDSMI_DEV_PERF_LEVEL_DETERMINISM,

1207  AMDSMI_DEV_PERF_LEVEL_LAST = AMDSMI_DEV_PERF_LEVEL_DETERMINISM,

1208  AMDSMI_DEV_PERF_LEVEL_UNKNOWN = 0x100

1209 } amdsmi_dev_perf_level_t;

1210 

1216 typedef uintptr_t amdsmi_event_handle_t;

1217 

1225 typedef enum {

1226  AMDSMI_EVNT_GRP_XGMI = 0,

1227  AMDSMI_EVNT_GRP_XGMI_DATA_OUT = 10,

1228  AMDSMI_EVNT_GRP_INVALID = 0xFFFFFFFF

1229 } amdsmi_event_group_t;

1230 

1261 typedef enum {

1262  AMDSMI_EVNT_FIRST = AMDSMI_EVNT_GRP_XGMI,

1263 

1264  AMDSMI_EVNT_XGMI_FIRST = AMDSMI_EVNT_GRP_XGMI,

1265  AMDSMI_EVNT_XGMI_0_NOP_TX = AMDSMI_EVNT_XGMI_FIRST,

1266  AMDSMI_EVNT_XGMI_0_REQUEST_TX,

1267  AMDSMI_EVNT_XGMI_0_RESPONSE_TX,

1268  AMDSMI_EVNT_XGMI_0_BEATS_TX,

1269  AMDSMI_EVNT_XGMI_1_NOP_TX,

1270  AMDSMI_EVNT_XGMI_1_REQUEST_TX,

1271  AMDSMI_EVNT_XGMI_1_RESPONSE_TX,

1272  AMDSMI_EVNT_XGMI_1_BEATS_TX,

1273  AMDSMI_EVNT_XGMI_LAST = AMDSMI_EVNT_XGMI_1_BEATS_TX,

1274  AMDSMI_EVNT_XGMI_DATA_OUT_FIRST = AMDSMI_EVNT_GRP_XGMI_DATA_OUT,

1275  AMDSMI_EVNT_XGMI_DATA_OUT_0 = AMDSMI_EVNT_XGMI_DATA_OUT_FIRST,

1276  AMDSMI_EVNT_XGMI_DATA_OUT_1,

1277  AMDSMI_EVNT_XGMI_DATA_OUT_2,

1278  AMDSMI_EVNT_XGMI_DATA_OUT_3,

1279  AMDSMI_EVNT_XGMI_DATA_OUT_4,

1280  AMDSMI_EVNT_XGMI_DATA_OUT_5,

1281  AMDSMI_EVNT_XGMI_DATA_OUT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_5,

1282  AMDSMI_EVNT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_LAST

1283 } amdsmi_event_type_t;

1284 

1290 typedef enum {

1291  AMDSMI_CNTR_CMD_START = 0,

1292  AMDSMI_CNTR_CMD_STOP

1294 } amdsmi_counter_command_t;

1295 

1301 typedef struct {

1302  uint64_t value;

1303  uint64_t time_enabled;

1304  uint64_t time_running;

1305 } amdsmi_counter_value_t;

1306 

1312 typedef enum {

1313  AMDSMI_EVT_NOTIF_NONE = 0,

1314  AMDSMI_EVT_NOTIF_VMFAULT = 1,

1315  AMDSMI_EVT_NOTIF_FIRST = AMDSMI_EVT_NOTIF_VMFAULT,

1316  AMDSMI_EVT_NOTIF_THERMAL_THROTTLE = 2,

1317  AMDSMI_EVT_NOTIF_GPU_PRE_RESET = 3,

1318  AMDSMI_EVT_NOTIF_GPU_POST_RESET = 4,

1319  AMDSMI_EVT_NOTIF_MIGRATE_START = 5,

1320  AMDSMI_EVT_NOTIF_MIGRATE_END = 6,

1321  AMDSMI_EVT_NOTIF_PAGE_FAULT_START = 7,

1322  AMDSMI_EVT_NOTIF_PAGE_FAULT_END = 8,

1323  AMDSMI_EVT_NOTIF_QUEUE_EVICTION = 9,

1324  AMDSMI_EVT_NOTIF_QUEUE_RESTORE = 10,

1325  AMDSMI_EVT_NOTIF_UNMAP_FROM_GPU = 11,

1326  AMDSMI_EVT_NOTIF_PROCESS_START = 12,

1327  AMDSMI_EVT_NOTIF_PROCESS_END = 13,

1328  AMDSMI_EVT_NOTIF_LAST = AMDSMI_EVT_NOTIF_PROCESS_END

1329 } amdsmi_evt_notification_type_t;

1330 

1336 #define AMDSMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))

1337 

1343 typedef struct {

1344  amdsmi_processor_handle processor_handle;

1345  amdsmi_evt_notification_type_t event;

1346  char message[AMDSMI_MAX_STRING_LENGTH];

1347 } amdsmi_evt_notification_data_t;

1348 

1355 typedef enum {

1356  AMDSMI_TEMP_CURRENT = 0x0,

1357  AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,

1358  AMDSMI_TEMP_MAX,

1359  AMDSMI_TEMP_MIN,

1360  AMDSMI_TEMP_MAX_HYST,

1362  AMDSMI_TEMP_MIN_HYST,

1364  AMDSMI_TEMP_CRITICAL,

1366  AMDSMI_TEMP_CRITICAL_HYST,

1368  AMDSMI_TEMP_EMERGENCY,

1372  AMDSMI_TEMP_EMERGENCY_HYST,

1374  AMDSMI_TEMP_CRIT_MIN,

1376  AMDSMI_TEMP_CRIT_MIN_HYST,

1378  AMDSMI_TEMP_OFFSET,

1380  AMDSMI_TEMP_LOWEST,

1381  AMDSMI_TEMP_HIGHEST,

1382  AMDSMI_TEMP_SHUTDOWN,

1383  AMDSMI_TEMP_LAST = AMDSMI_TEMP_SHUTDOWN

1384 } amdsmi_temperature_metric_t;

1385 

1392 typedef enum {

1393  AMDSMI_VOLT_CURRENT = 0x0,

1394 

1395  AMDSMI_VOLT_FIRST = AMDSMI_VOLT_CURRENT,

1396  AMDSMI_VOLT_MAX,

1397  AMDSMI_VOLT_MIN_CRIT,

1398  AMDSMI_VOLT_MIN,

1399  AMDSMI_VOLT_MAX_CRIT,

1400  AMDSMI_VOLT_AVERAGE,

1401  AMDSMI_VOLT_LOWEST,

1402  AMDSMI_VOLT_HIGHEST,

1403 

1404  AMDSMI_VOLT_LAST = AMDSMI_VOLT_HIGHEST

1405 } amdsmi_voltage_metric_t;

1406 

1413 typedef enum {

1414  AMDSMI_VOLT_TYPE_FIRST = 0,

1415 

1416  AMDSMI_VOLT_TYPE_VDDGFX = AMDSMI_VOLT_TYPE_FIRST,

1417  AMDSMI_VOLT_TYPE_VDDBOARD,

1418  AMDSMI_VOLT_TYPE_LAST = AMDSMI_VOLT_TYPE_VDDBOARD,

1419  AMDSMI_VOLT_TYPE_INVALID = 0xFFFFFFFF

1420 } amdsmi_voltage_type_t;

1421 

1430 typedef enum {

1431  AMDSMI_PWR_PROF_PRST_CUSTOM_MASK = 0x1,

1432  AMDSMI_PWR_PROF_PRST_VIDEO_MASK = 0x2,

1433  AMDSMI_PWR_PROF_PRST_POWER_SAVING_MASK = 0x4,

1434  AMDSMI_PWR_PROF_PRST_COMPUTE_MASK = 0x8,

1435  AMDSMI_PWR_PROF_PRST_VR_MASK = 0x10,

1436 

1437  // 3D Full Screen Power Profile

1438  AMDSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK = 0x20,

1439  AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT = 0x40,

1440  AMDSMI_PWR_PROF_PRST_LAST = AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT,

1441 

1442  // Invalid power profile

1443  AMDSMI_PWR_PROF_PRST_INVALID = 0xFFFFFFFFFFFFFFFF

1444 } amdsmi_power_profile_preset_masks_t;

1445 

1451 typedef enum {

1452  AMDSMI_GPU_BLOCK_INVALID = 0,

1453  AMDSMI_GPU_BLOCK_FIRST = (1ULL << 0),

1454  AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,

1455  AMDSMI_GPU_BLOCK_SDMA = (1ULL << 1),

1456  AMDSMI_GPU_BLOCK_GFX = (1ULL << 2),

1457  AMDSMI_GPU_BLOCK_MMHUB = (1ULL << 3),

1458  AMDSMI_GPU_BLOCK_ATHUB = (1ULL << 4),

1459  AMDSMI_GPU_BLOCK_PCIE_BIF = (1ULL << 5),

1460  AMDSMI_GPU_BLOCK_HDP = (1ULL << 6),

1461  AMDSMI_GPU_BLOCK_XGMI_WAFL = (1ULL << 7),

1462  AMDSMI_GPU_BLOCK_DF = (1ULL << 8),

1463  AMDSMI_GPU_BLOCK_SMN = (1ULL << 9),

1464  AMDSMI_GPU_BLOCK_SEM = (1ULL << 10),

1465  AMDSMI_GPU_BLOCK_MP0 = (1ULL << 11),

1466  AMDSMI_GPU_BLOCK_MP1 = (1ULL << 12),

1467  AMDSMI_GPU_BLOCK_FUSE = (1ULL << 13),

1468  AMDSMI_GPU_BLOCK_MCA = (1ULL << 14),

1469  AMDSMI_GPU_BLOCK_VCN = (1ULL << 15),

1470  AMDSMI_GPU_BLOCK_JPEG = (1ULL << 16),

1471  AMDSMI_GPU_BLOCK_IH = (1ULL << 17),

1472  AMDSMI_GPU_BLOCK_MPIO = (1ULL << 18),

1473  AMDSMI_GPU_BLOCK_LAST = AMDSMI_GPU_BLOCK_MPIO,

1474  AMDSMI_GPU_BLOCK_RESERVED = (1ULL << 63)

1475 } amdsmi_gpu_block_t;

1476 

1482 typedef enum {

1483  CLK_LIMIT_MIN,

1484  CLK_LIMIT_MAX

1485 } amdsmi_clk_limit_type_t;

1486 

1492 typedef enum {

1493  AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED = 0,

1494  AMDSMI_CPER_SEV_FATAL = 1,

1495  AMDSMI_CPER_SEV_NON_FATAL_CORRECTED = 2,

1496  AMDSMI_CPER_SEV_NUM = 3,

1497  AMDSMI_CPER_SEV_UNUSED = 10

1498 } amdsmi_cper_sev_t;

1499 

1505 typedef enum {

1506  AMDSMI_CPER_NOTIFY_TYPE_CMC = 0x450eBDD72DCE8BB1,

1507  AMDSMI_CPER_NOTIFY_TYPE_CPE = 0x4a55D8434E292F96,

1508  AMDSMI_CPER_NOTIFY_TYPE_MCE = 0x4cc5919CE8F56FFE,

1509  AMDSMI_CPER_NOTIFY_TYPE_PCIE = 0x4dfc1A16CF93C01F,

1510  AMDSMI_CPER_NOTIFY_TYPE_INIT = 0x454a9308CC5263E8,

1511  AMDSMI_CPER_NOTIFY_TYPE_NMI = 0x42c9B7E65BAD89FF,

1512  AMDSMI_CPER_NOTIFY_TYPE_BOOT = 0x409aAB403D61A466,

1513  AMDSMI_CPER_NOTIFY_TYPE_DMAR = 0x4c27C6B3667DD791,

1514  AMDSMI_CPER_NOTIFY_TYPE_SEA = 0x11E4BBE89A78788A,

1515  AMDSMI_CPER_NOTIFY_TYPE_SEI = 0x4E87B0AE5C284C81,

1516  AMDSMI_CPER_NOTIFY_TYPE_PEI = 0x4214520409A9D5AC,

1517  AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT = 0x49A341DF69293BC9

1518 } amdsmi_cper_notify_type_t;

1519 

1525 typedef enum {

1526  AMDSMI_RAS_ERR_STATE_NONE = 0,

1527  AMDSMI_RAS_ERR_STATE_DISABLED,

1528  AMDSMI_RAS_ERR_STATE_PARITY,

1529  AMDSMI_RAS_ERR_STATE_SING_C,

1530  AMDSMI_RAS_ERR_STATE_MULT_UC,

1531  AMDSMI_RAS_ERR_STATE_POISON,

1533  AMDSMI_RAS_ERR_STATE_ENABLED,

1534 

1535  AMDSMI_RAS_ERR_STATE_LAST = AMDSMI_RAS_ERR_STATE_ENABLED,

1536  AMDSMI_RAS_ERR_STATE_INVALID = 0xFFFFFFFF

1537 } amdsmi_ras_err_state_t;

1538 

1544 typedef enum {

1545  AMDSMI_MEM_TYPE_FIRST = 0,

1546 

1547  AMDSMI_MEM_TYPE_VRAM = AMDSMI_MEM_TYPE_FIRST,

1548  AMDSMI_MEM_TYPE_VIS_VRAM,

1549  AMDSMI_MEM_TYPE_GTT,

1550 

1551  AMDSMI_MEM_TYPE_LAST = AMDSMI_MEM_TYPE_GTT

1552 } amdsmi_memory_type_t;

1553 

1559 typedef enum {

1560  AMDSMI_FREQ_IND_MIN = 0,

1561  AMDSMI_FREQ_IND_MAX = 1,

1562  AMDSMI_FREQ_IND_INVALID = 0xFFFFFFFF

1563 } amdsmi_freq_ind_t;

1564 

1570 typedef enum {

1571  AMDSMI_XGMI_STATUS_NO_ERRORS = 0,

1572  AMDSMI_XGMI_STATUS_ERROR,

1573  AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS

1574 } amdsmi_xgmi_status_t;

1575 

1581 typedef uint64_t amdsmi_bit_field_t;

1582 

1588 typedef enum {

1589  AMDSMI_MEM_PAGE_STATUS_RESERVED = 0,

1590  AMDSMI_MEM_PAGE_STATUS_PENDING,

1592  AMDSMI_MEM_PAGE_STATUS_UNRESERVABLE

1593 } amdsmi_memory_page_status_t;

1594 

1600 typedef enum {

1601  AMDSMI_UTILIZATION_COUNTER_FIRST = 0,

1602  // Course grain activity counters

1603  AMDSMI_COARSE_GRAIN_GFX_ACTIVITY = AMDSMI_UTILIZATION_COUNTER_FIRST,

1604  AMDSMI_COARSE_GRAIN_MEM_ACTIVITY,

1605  AMDSMI_COARSE_DECODER_ACTIVITY,

1606  // Fine grain activity counters

1607  AMDSMI_FINE_GRAIN_GFX_ACTIVITY = 100,

1608  AMDSMI_FINE_GRAIN_MEM_ACTIVITY = 101,

1609  AMDSMI_FINE_DECODER_ACTIVITY = 102,

1610  AMDSMI_UTILIZATION_COUNTER_LAST = AMDSMI_FINE_DECODER_ACTIVITY

1611 } amdsmi_utilization_counter_type_t;

1612 

1613 #define AMDSMI_MAX_UTILIZATION_VALUES 4

1614 

1622 typedef struct {

1623  amdsmi_utilization_counter_type_t type;

1624  uint64_t value;

1625  uint64_t fine_value[AMDSMI_MAX_UTILIZATION_VALUES];

1626  uint16_t fine_value_count;

1627 } amdsmi_utilization_counter_t;

1628 

1634 typedef struct {

1635  uint64_t page_address;

1636  uint64_t page_size;

1637  amdsmi_memory_page_status_t status;

1638 } amdsmi_retired_page_record_t;

1639 

1647 typedef struct {

1648  amdsmi_bit_field_t available_profiles;

1649  amdsmi_power_profile_preset_masks_t current;

1650  uint32_t num_profiles;

1651 } amdsmi_power_profile_status_t;

1652 

1658 typedef struct {

1659  bool has_deep_sleep;

1660  uint32_t num_supported;

1661  uint32_t current;

1662  uint64_t frequency[AMDSMI_MAX_NUM_FREQUENCIES];

1664 } amdsmi_frequencies_t;

1665 

1671 typedef struct {

1672  uint32_t policy_id;

1673  char policy_description[AMDSMI_MAX_STRING_LENGTH];

1674 } amdsmi_dpm_policy_entry_t;

1675 

1676 #define AMDSMI_MAX_NUM_PM_POLICIES 32

1677 

1685 typedef struct {

1686  uint32_t num_supported;

1687  uint32_t current;

1688  amdsmi_dpm_policy_entry_t policies[AMDSMI_MAX_NUM_PM_POLICIES];

1689 } amdsmi_dpm_policy_t;

1690 

1700 typedef struct {

1701  amdsmi_frequencies_t transfer_rate;

1702  uint32_t lanes[AMDSMI_MAX_NUM_FREQUENCIES];

1703 } amdsmi_pcie_bandwidth_t;

1704 

1710 typedef struct {

1711  uint32_t major;

1712  uint32_t minor;

1713  uint32_t release;

1714  const char *build;

1715 } amdsmi_version_t;

1716 

1722 typedef struct {

1723  uint64_t frequency;

1724  uint64_t voltage;

1725 } amdsmi_od_vddc_point_t;

1726 

1734 typedef struct {

1735  amdsmi_range_t freq_range;

1736  amdsmi_range_t volt_range;

1737 } amdsmi_freq_volt_region_t;

1738 

1745 typedef struct {

1746  amdsmi_od_vddc_point_t vc_points[AMDSMI_NUM_VOLTAGE_CURVE_POINTS];

1747 } amdsmi_od_volt_curve_t;

1748 

1754 typedef struct {

1755  amdsmi_range_t curr_sclk_range;

1756  amdsmi_range_t curr_mclk_range;

1757  amdsmi_range_t sclk_freq_limits;

1758  amdsmi_range_t mclk_freq_limits;

1759  amdsmi_od_volt_curve_t curve;

1760  uint32_t num_regions;

1761 } amdsmi_od_volt_freq_data_t;

1762 

1770 typedef struct {

1771  // TODO(amd) Doxygen documents

1772  // Note: This should match: AMDGpuMetricsHeader_v1_t

1774  uint16_t structure_size;

1775  uint8_t format_revision;

1776  uint8_t content_revision;

1778 } amd_metrics_table_header_t;

1779 

1785 typedef struct {

1790  uint32_t gfx_busy_inst[AMDSMI_MAX_NUM_XCC];

1791  uint16_t jpeg_busy[AMDSMI_MAX_NUM_JPEG_ENG_V1];

1792  uint16_t vcn_busy[AMDSMI_MAX_NUM_VCN];

1793  uint64_t gfx_busy_acc[AMDSMI_MAX_NUM_XCC];

1794 

1798  /* Total App Clock Counter Accumulated */

1799  uint64_t gfx_below_host_limit_acc[AMDSMI_MAX_NUM_XCC];

1800 

1804  /* Total App Clock Counter Accumulated */

1805  uint64_t gfx_below_host_limit_ppt_acc[AMDSMI_MAX_NUM_XCC];

1806  uint64_t gfx_below_host_limit_thm_acc[AMDSMI_MAX_NUM_XCC];

1807  uint64_t gfx_low_utilization_acc[AMDSMI_MAX_NUM_XCC];

1808  uint64_t gfx_below_host_limit_total_acc[AMDSMI_MAX_NUM_XCC];

1809 } amdsmi_gpu_xcp_metrics_t;

1810 

1826 typedef struct {

1827  amd_metrics_table_header_t common_header;

1828 

1834  uint16_t temperature_edge;

1835  uint16_t temperature_hotspot;

1836  uint16_t temperature_mem;

1837  uint16_t temperature_vrgfx;

1838  uint16_t temperature_vrsoc;

1839  uint16_t temperature_vrmem;

1840 

1844  uint16_t average_gfx_activity;

1845  uint16_t average_umc_activity;

1846  uint16_t average_mm_activity;

1847 

1851  uint16_t average_socket_power;

1852  uint64_t energy_accumulator;

1853 

1855  uint64_t system_clock_counter;

1856 

1860  uint16_t average_gfxclk_frequency;

1861  uint16_t average_socclk_frequency;

1862  uint16_t average_uclk_frequency;

1863  uint16_t average_vclk0_frequency;

1864  uint16_t average_dclk0_frequency;

1865  uint16_t average_vclk1_frequency;

1866  uint16_t average_dclk1_frequency;

1867 

1871  uint16_t current_gfxclk;

1872  uint16_t current_socclk;

1873  uint16_t current_uclk;

1874  uint16_t current_vclk0;

1875  uint16_t current_dclk0;

1876  uint16_t current_vclk1;

1877  uint16_t current_dclk1;

1878 

1879  uint32_t throttle_status;

1880 

1881  uint16_t current_fan_speed;

1882 

1886  uint16_t pcie_link_width;

1887  uint16_t pcie_link_speed;

1888 

1889  /*

1890  * v1.1 additions

1891  */

1892  uint32_t gfx_activity_acc;

1893  uint32_t mem_activity_acc;

1894  uint16_t temperature_hbm[AMDSMI_NUM_HBM_INSTANCES];

1895 

1896  /*

1897  * v1.2 additions

1898  */

1899  uint64_t firmware_timestamp;

1900 

1901  /*

1902  * v1.3 additions

1903  */

1904  uint16_t voltage_soc;

1905  uint16_t voltage_gfx;

1906  uint16_t voltage_mem;

1907 

1908  uint64_t indep_throttle_status;

1909 

1910  /*

1911  * v1.4 additions

1912  */

1913  uint16_t current_socket_power;

1914 

1915  uint16_t vcn_activity[AMDSMI_MAX_NUM_VCN];

1916 

1917  uint32_t gfxclk_lock_status;

1918 

1919  uint16_t xgmi_link_width;

1920  uint16_t xgmi_link_speed;

1921 

1922  uint64_t pcie_bandwidth_acc;

1923  uint64_t pcie_bandwidth_inst;

1924  uint64_t pcie_l0_to_recov_count_acc;

1925  uint64_t pcie_replay_count_acc;

1926  uint64_t pcie_replay_rover_count_acc;

1927 

1931  uint64_t xgmi_read_data_acc[AMDSMI_MAX_NUM_XGMI_LINKS];

1932  uint64_t xgmi_write_data_acc[AMDSMI_MAX_NUM_XGMI_LINKS];

1933 

1937  uint16_t current_gfxclks[AMDSMI_MAX_NUM_GFX_CLKS];

1938  uint16_t current_socclks[AMDSMI_MAX_NUM_CLKS];

1939  uint16_t current_vclk0s[AMDSMI_MAX_NUM_CLKS];

1940  uint16_t current_dclk0s[AMDSMI_MAX_NUM_CLKS];

1941 

1945  uint16_t jpeg_activity[AMDSMI_MAX_NUM_JPEG];

1946  uint32_t pcie_nak_sent_count_acc;

1947  uint32_t pcie_nak_rcvd_count_acc;

1948 

1952  uint64_t accumulation_counter;

1953 

1957  uint64_t prochot_residency_acc;

1958 

1973  uint64_t ppt_residency_acc;

1974 

1989  uint64_t socket_thm_residency_acc;

1990  uint64_t vr_thm_residency_acc;

1991  uint64_t hbm_thm_residency_acc;

1992 

1993  uint16_t num_partition;

1994 

1995  amdsmi_gpu_xcp_metrics_t xcp_stats[AMDSMI_MAX_NUM_XCP];

1996 

1997  uint32_t pcie_lc_perf_other_end_recovery;

1998 

2002  uint64_t vram_max_bandwidth;

2003 

2004  uint16_t xgmi_link_status[AMDSMI_MAX_NUM_XGMI_LINKS];

2005 } amdsmi_gpu_metrics_t;

2006 

2012 typedef enum {

2013  AMDSMI_XGMI_LINK_DOWN,

2014  AMDSMI_XGMI_LINK_UP,

2015  AMDSMI_XGMI_LINK_DISABLE

2016 } amdsmi_xgmi_link_status_type_t;

2017 

2023 typedef struct {

2024  uint32_t total_links;

2025  amdsmi_xgmi_link_status_type_t status[AMDSMI_MAX_NUM_XGMI_LINKS];

2026  uint64_t reserved[7];

2027 } amdsmi_xgmi_link_status_t;

2028 

2034 typedef struct {

2035  char name[AMDSMI_MAX_STRING_LENGTH];

2036  uint64_t value;

2037 } amdsmi_name_value_t;

2038 

2044 typedef enum {

2045  AMDSMI_REG_XGMI,

2046  AMDSMI_REG_WAFL,

2047  AMDSMI_REG_PCIE,

2048  AMDSMI_REG_USR,

2049  AMDSMI_REG_USR1

2050 } amdsmi_reg_type_t;

2051 

2057 typedef struct {

2058  uint32_t ras_eeprom_version;

2059  uint32_t ecc_correction_schema_flag;

2062 } amdsmi_ras_feature_t;

2063 

2069 typedef struct {

2070  uint64_t correctable_count;

2071  uint64_t uncorrectable_count;

2072  uint64_t deferred_count;

2073  uint64_t reserved[5];

2074 } amdsmi_error_count_t;

2075 

2081 typedef struct {

2082  uint32_t process_id;

2083  uint64_t vram_usage;

2084  uint64_t sdma_usage;

2085  uint32_t cu_occupancy;

2086 } amdsmi_process_info_t;

2087 

2093 typedef struct {

2094  uint32_t count;

2095  amdsmi_processor_handle processor_list[AMDSMI_MAX_DEVICES];

2096  uint64_t reserved[15];

2097 } amdsmi_topology_nearest_t;

2098 

2107 typedef enum {

2108  AMDSMI_VIRTUALIZATION_MODE_UNKNOWN = 0,

2109  AMDSMI_VIRTUALIZATION_MODE_BAREMETAL,

2110  AMDSMI_VIRTUALIZATION_MODE_HOST,

2111  AMDSMI_VIRTUALIZATION_MODE_GUEST,

2112  AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH

2113 } amdsmi_virtualization_mode_t;

2114 

2115 

2121 typedef enum {

2122  AMDSMI_AFFINITY_SCOPE_NODE = 0, // Memory affinity as numa node

2123  AMDSMI_AFFINITY_SCOPE_SOCKET = 1 // socket affinity

2124 } amdsmi_affinity_scope_t;

2125 

2126 #ifdef ENABLE_ESMI_LIB

2127 

2133 typedef struct {

2134  uint8_t debug;

2135  uint8_t minor;

2136  uint8_t major;

2137  uint8_t unused;

2138 } amdsmi_smu_fw_version_t;

2139 

2145 typedef struct {

2146  uint32_t max_bw;

2147  uint32_t utilized_bw;

2148  uint32_t utilized_pct;

2149 } amdsmi_ddr_bw_metrics_t;

2150 

2156 typedef struct {

2157  uint8_t range : 3;

2158  uint8_t ref_rate : 1;

2159 } amdsmi_temp_range_refresh_rate_t;

2160 

2166 typedef struct {

2167  uint16_t power : 15;

2168  uint16_t update_rate : 9;

2169  uint8_t dimm_addr;

2170 } amdsmi_dimm_power_t;

2171 

2177 typedef struct {

2178  uint16_t sensor : 11;

2179  uint16_t update_rate : 9;

2180  uint8_t dimm_addr;

2181  float temp;

2182 } amdsmi_dimm_thermal_t;

2183 

2189 typedef enum {

2190  AGG_BW0 = 1,

2191  RD_BW0 = 2,

2192  WR_BW0 = 4

2193 } amdsmi_io_bw_encoding_t;

2194 

2204 typedef struct {

2205  amdsmi_io_bw_encoding_t bw_type;

2206  char *link_name;

2207 } amdsmi_link_id_bw_type_t;

2208 

2215 typedef struct {

2216  uint8_t max_dpm_level;

2217  uint8_t min_dpm_level;

2218 } amdsmi_dpm_level_t;

2219 

2225 typedef struct __attribute__((__packed__)) {

2226  uint32_t accumulation_counter;

2227 

2228  uint32_t max_socket_temperature;

2229  uint32_t max_vr_temperature;

2230  uint32_t max_hbm_temperature;

2231  uint64_t max_socket_temperature_acc;

2232  uint64_t max_vr_temperature_acc;

2233  uint64_t max_hbm_temperature_acc;

2234 

2235  uint32_t socket_power_limit;

2236  uint32_t max_socket_power_limit;

2237  uint32_t socket_power;

2238 

2239  uint64_t timestamp;

2240  uint64_t socket_energy_acc;

2241  uint64_t ccd_energy_acc;

2242  uint64_t xcd_energy_acc;

2243  uint64_t aid_energy_acc;

2244  uint64_t hbm_energy_acc;

2245 

2246  uint32_t cclk_frequency_limit;

2247  uint32_t gfxclk_frequency_limit;

2248  uint32_t fclk_frequency;

2249  uint32_t uclk_frequency;

2250  uint32_t socclk_frequency[4];

2251  uint32_t vclk_frequency[4];

2252  uint32_t dclk_frequency[4];

2253  uint32_t lclk_frequency[4];

2254  uint64_t gfxclk_frequency_acc[8];

2255  uint64_t cclk_frequency_acc[96];

2256 

2257  uint32_t max_cclk_frequency;

2258  uint32_t min_cclk_frequency;

2259  uint32_t max_gfxclk_frequency;

2260  uint32_t min_gfxclk_frequency;

2261  uint32_t fclk_frequency_table[4];

2262  uint32_t uclk_frequency_table[4];

2263  uint32_t socclk_frequency_table[4];

2264  uint32_t vclk_frequency_table[4];

2265  uint32_t dclk_frequency_table[4];

2266  uint32_t lclk_frequency_table[4];

2267  uint32_t max_lclk_dpm_range;

2268  uint32_t min_lclk_dpm_range;

2269 

2270  uint32_t xgmi_width;

2271  uint32_t xgmi_bitrate;

2272  uint64_t xgmi_read_bandwidth_acc[8];

2273  uint64_t xgmi_write_bandwidth_acc[8];

2274 

2275  uint32_t socket_c0_residency;

2276  uint32_t socket_gfx_busy;

2277  uint32_t dram_bandwidth_utilization;

2278  uint64_t socket_c0_residency_acc;

2279  uint64_t socket_gfx_busy_acc;

2280  uint64_t dram_bandwidth_acc;

2281  uint32_t max_dram_bandwidth;

2282  uint64_t dram_bandwidth_utilization_acc;

2283  uint64_t pcie_bandwidth_acc[4];

2284 

2285  uint32_t prochot_residency_acc;

2286  uint32_t ppt_residency_acc;

2287  uint32_t socket_thm_residency_acc;

2288  uint32_t vr_thm_residency_acc;

2289  uint32_t hbm_thm_residency_acc;

2290  uint32_t spare;

2291 

2292  uint32_t gfxclk_frequency[8];

2293 } amdsmi_hsmp_metrics_table_t;

2294 

2300 static char* const amdsmi_hsmp_freqlimit_src_names[] = {

2301  "cHTC-Active",

2302  "PROCHOT",

2303  "TDC limit",

2304  "PPT Limit",

2305  "OPN Max",

2306  "Reliability Limit",

2307  "APML Agent",

2308  "HSMP Agent"

2309 };

2310 

2316 typedef struct {

2317  char model_name[AMDSMI_MAX_STRING_LENGTH];

2318  uint32_t cpu_family_id;

2319  uint32_t model_id;

2320  uint32_t threads_per_core;

2321  uint32_t cores_per_socket;

2322  bool frequency_boost;

2323  uint32_t vendor_id;

2324  char vendor_name[AMDSMI_MAX_STRING_LENGTH];

2325  uint32_t subvendor_id;

2326  uint64_t device_id;

2327  uint32_t rev_id;

2328  char asic_serial[AMDSMI_MAX_STRING_LENGTH];

2329  uint32_t socket_id;

2330  uint32_t core_id;

2331  uint32_t num_of_cpu_cores;

2332  uint32_t socket_count;

2333  uint32_t core_count;

2334  uint32_t reserved[17];

2335 } amdsmi_cpu_info_t;

2336 

2337 #endif

2338 

2344 typedef struct {

2345  uint32_t socket_id;

2346  uint32_t cores_per_socket;

2347 } amdsmi_sock_info_t;

2348 

2349 /*****************************************************************************/

2377 amdsmi_status_t amdsmi_init(uint64_t init_flags);

2378 

2392 amdsmi_status_t amdsmi_shut_down(void);

2393 

2396 /*****************************************************************************/

2433 amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle* socket_handles);

2434 

2435 #ifdef ENABLE_ESMI_LIB

2436 

2464 amdsmi_status_t amdsmi_get_cpu_handles(uint32_t *cpu_count, amdsmi_processor_handle *processor_handles);

2465 

2466 #endif

2467 

2487 amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name);

2488 

2489 #ifdef ENABLE_ESMI_LIB

2490 

2509 amdsmi_status_t amdsmi_get_processor_info(amdsmi_processor_handle processor_handle, size_t len, char *name);

2510 

2534 amdsmi_status_t amdsmi_get_processor_count_from_handles(amdsmi_processor_handle* processor_handles,

2535  uint32_t* processor_count, uint32_t* nr_cpusockets,

2536  uint32_t* nr_cpucores, uint32_t* nr_gpus);

2537 

2559 amdsmi_status_t amdsmi_get_processor_handles_by_type(amdsmi_socket_handle socket_handle,

2560  processor_type_t processor_type,

2561  amdsmi_processor_handle* processor_handles,

2562  uint32_t* processor_count);

2563 

2564 #endif

2565 

2602 amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle,

2603  uint32_t *processor_count,

2604  amdsmi_processor_handle* processor_handles);

2605 

2606 

2607 #ifdef ENABLE_ESMI_LIB

2634 amdsmi_status_t amdsmi_get_cpucore_handles(uint32_t *cores_count,

2635  amdsmi_processor_handle* processor_handles);

2636 #endif

2637 

2657 amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, processor_type_t* processor_type);

2658 

2676 amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle* processor_handle);

2677 

2692 amdsmi_status_t

2693 amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf);

2694 

2714 amdsmi_status_t

2715 amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid);

2716 

2735 amdsmi_status_t

2736 amdsmi_get_gpu_enumeration_info(amdsmi_processor_handle processor_handle, amdsmi_enumeration_info_t *info);

2737 

2763 amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle,

2764  uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope);

2765 

2783 amdsmi_status_t

2784 amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle,

2785  amdsmi_virtualization_mode_t* mode);

2786 

2789 /*****************************************************************************/

2821 amdsmi_status_t amdsmi_get_gpu_id(amdsmi_processor_handle processor_handle, uint16_t *id);

2822 

2840 amdsmi_status_t amdsmi_get_gpu_revision(amdsmi_processor_handle processor_handle, uint16_t *revision);

2841 

2877 amdsmi_status_t amdsmi_get_gpu_vendor_name(amdsmi_processor_handle processor_handle, char *name,

2878  size_t len);

2879 

2906 amdsmi_status_t amdsmi_get_gpu_vram_vendor(amdsmi_processor_handle processor_handle, char *brand, uint32_t len);

2907 

2931 amdsmi_status_t amdsmi_get_gpu_subsystem_id(amdsmi_processor_handle processor_handle, uint16_t *id);

2932 

2968 amdsmi_status_t

2969 amdsmi_get_gpu_subsystem_name(amdsmi_processor_handle processor_handle, char *name, size_t len);

2970 

2973 /*****************************************************************************/

3000 amdsmi_status_t

3001 amdsmi_get_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle,

3002  amdsmi_pcie_bandwidth_t *bandwidth);

3003 

3042 amdsmi_status_t amdsmi_get_gpu_bdf_id(amdsmi_processor_handle processor_handle, uint64_t *bdfid);

3043 

3067 amdsmi_status_t amdsmi_get_gpu_topo_numa_affinity(amdsmi_processor_handle processor_handle, int32_t *numa_node);

3068 

3095 amdsmi_status_t amdsmi_get_gpu_pci_throughput(amdsmi_processor_handle processor_handle, uint64_t *sent,

3096  uint64_t *received, uint64_t *max_pkt_sz);

3097 

3121 amdsmi_status_t amdsmi_get_gpu_pci_replay_counter(amdsmi_processor_handle processor_handle, uint64_t *counter);

3122 

3125 /*****************************************************************************/

3165 amdsmi_status_t amdsmi_set_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, uint64_t bw_bitmask);

3166 

3169 /*****************************************************************************/

3206 amdsmi_status_t

3207 amdsmi_get_energy_count(amdsmi_processor_handle processor_handle, uint64_t *energy_accumulator,

3208  float *counter_resolution, uint64_t *timestamp);

3209 

3212 /*****************************************************************************/

3240 amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle,

3241  uint32_t sensor_ind, uint64_t cap);

3242 

3264 amdsmi_status_t

3265 amdsmi_set_gpu_power_profile(amdsmi_processor_handle processor_handle, uint32_t reserved,

3266  amdsmi_power_profile_preset_masks_t profile);

3267 

3281 amdsmi_status_t amdsmi_get_cpu_socket_power(amdsmi_processor_handle processor_handle,

3282  uint32_t *ppower);

3283 

3297 amdsmi_status_t amdsmi_get_cpu_socket_power_cap(amdsmi_processor_handle processor_handle,

3298  uint32_t *pcap);

3299 

3313 amdsmi_status_t amdsmi_get_cpu_socket_power_cap_max(amdsmi_processor_handle processor_handle,

3314  uint32_t *pmax);

3315 

3329 amdsmi_status_t amdsmi_get_cpu_pwr_svi_telemetry_all_rails(amdsmi_processor_handle processor_handle,

3330  uint32_t *power);

3331 

3345 amdsmi_status_t amdsmi_set_cpu_socket_power_cap(amdsmi_processor_handle processor_handle,

3346  uint32_t pcap);

3347 

3361 amdsmi_status_t amdsmi_set_cpu_pwr_efficiency_mode(amdsmi_processor_handle processor_handle,

3362  uint8_t mode);

3363 

3366 /*****************************************************************************/

3397 amdsmi_status_t

3398 amdsmi_get_gpu_memory_total(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type,

3399  uint64_t *total);

3400 

3425 amdsmi_status_t

3426 amdsmi_get_gpu_memory_usage(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type,

3427  uint64_t *used);

3428 

3453 amdsmi_status_t

3454 amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *num_pages,

3455  amdsmi_retired_page_record_t *info);

3456 

3475 amdsmi_status_t

3476 amdsmi_get_gpu_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold);

3477 

3478 

3498 amdsmi_status_t amdsmi_gpu_validate_ras_eeprom(amdsmi_processor_handle processor_handle);

3499 

3514 amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature);

3515 

3541 amdsmi_status_t

3542 amdsmi_get_gpu_ras_block_features_enabled(amdsmi_processor_handle processor_handle,

3543  amdsmi_gpu_block_t block,

3544  amdsmi_ras_err_state_t *state);

3545 

3581 amdsmi_status_t

3582 amdsmi_get_gpu_memory_reserved_pages(amdsmi_processor_handle processor_handle,

3583  uint32_t *num_pages,

3584  amdsmi_retired_page_record_t *records);

3585 

3588 /*****************************************************************************/

3621 amdsmi_status_t amdsmi_get_gpu_fan_rpms(amdsmi_processor_handle processor_handle,

3622  uint32_t sensor_ind, int64_t *speed);

3623 

3651 amdsmi_status_t amdsmi_get_gpu_fan_speed(amdsmi_processor_handle processor_handle,

3652  uint32_t sensor_ind, int64_t *speed);

3653 

3680 amdsmi_status_t amdsmi_get_gpu_fan_speed_max(amdsmi_processor_handle processor_handle,

3681  uint32_t sensor_ind, uint64_t *max_speed);

3682 

3712 amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle,

3713  amdsmi_temperature_type_t sensor_type,

3714  amdsmi_temperature_metric_t metric, int64_t *temperature);

3715 

3730 amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info);

3731 

3763 amdsmi_status_t amdsmi_get_gpu_volt_metric(amdsmi_processor_handle processor_handle,

3764  amdsmi_voltage_type_t sensor_type,

3765  amdsmi_voltage_metric_t metric, int64_t *voltage);

3766 

3769 /*****************************************************************************/

3792 amdsmi_status_t amdsmi_reset_gpu_fan(amdsmi_processor_handle processor_handle, uint32_t sensor_ind);

3793 

3818 amdsmi_status_t amdsmi_set_gpu_fan_speed(amdsmi_processor_handle processor_handle,

3819  uint32_t sensor_ind, uint64_t speed);

3820 

3823 /*****************************************************************************/

3846 amdsmi_status_t amdsmi_get_gpu_busy_percent(amdsmi_processor_handle processor_handle,

3847  uint32_t *gpu_busy_percent);

3848 

3879 amdsmi_status_t

3880 amdsmi_get_utilization_count(amdsmi_processor_handle processor_handle,

3881  amdsmi_utilization_counter_t utilization_counters[],

3882  uint32_t count, uint64_t *timestamp);

3883 

3907 amdsmi_status_t amdsmi_get_gpu_perf_level(amdsmi_processor_handle processor_handle,

3908  amdsmi_dev_perf_level_t *perf);

3909 

3932 amdsmi_status_t

3933 amdsmi_set_gpu_perf_determinism_mode(amdsmi_processor_handle processor_handle, uint64_t clkvalue);

3934 

3958 amdsmi_status_t amdsmi_get_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od);

3959 

3983 amdsmi_status_t amdsmi_get_gpu_mem_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od);

3984 

4008 amdsmi_status_t amdsmi_get_clk_freq(amdsmi_processor_handle processor_handle,

4009  amdsmi_clk_type_t clk_type, amdsmi_frequencies_t *f);

4010 

4025 amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle);

4026 

4050 amdsmi_status_t amdsmi_get_gpu_od_volt_info(amdsmi_processor_handle processor_handle,

4051  amdsmi_od_volt_freq_data_t *odv);

4052 

4073 amdsmi_status_t

4074 amdsmi_get_gpu_metrics_header_info(amdsmi_processor_handle processor_handle, amd_metrics_table_header_t* header_value);

4075 

4098 amdsmi_status_t amdsmi_get_gpu_metrics_info(amdsmi_processor_handle processor_handle,

4099  amdsmi_gpu_metrics_t *pgpu_metrics);

4100 

4135 amdsmi_status_t amdsmi_get_gpu_pm_metrics_info(amdsmi_processor_handle processor_handle,

4136  amdsmi_name_value_t** pm_metrics,

4137  uint32_t *num_of_metrics);

4138 

4175 amdsmi_status_t amdsmi_get_gpu_reg_table_info(amdsmi_processor_handle processor_handle,

4176  amdsmi_reg_type_t reg_type,

4177  amdsmi_name_value_t** reg_metrics,

4178  uint32_t *num_of_metrics);

4179 

4207 amdsmi_status_t amdsmi_set_gpu_clk_range(amdsmi_processor_handle processor_handle,

4208  uint64_t minclkvalue,

4209  uint64_t maxclkvalue,

4210  amdsmi_clk_type_t clkType);

4211 

4234 amdsmi_status_t amdsmi_set_gpu_clk_limit(amdsmi_processor_handle processor_handle,

4235  amdsmi_clk_type_t clk_type,

4236  amdsmi_clk_limit_type_t limit_type,

4237  uint64_t clk_value);

4238 

4263 amdsmi_status_t amdsmi_set_gpu_od_clk_info(amdsmi_processor_handle processor_handle,

4264  amdsmi_freq_ind_t level,

4265  uint64_t clkvalue,

4266  amdsmi_clk_type_t clkType);

4267 

4291 amdsmi_status_t amdsmi_set_gpu_od_volt_info(amdsmi_processor_handle processor_handle,

4292  uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue);

4293 

4333 amdsmi_status_t amdsmi_get_gpu_od_volt_curve_regions(amdsmi_processor_handle processor_handle,

4334  uint32_t *num_regions, amdsmi_freq_volt_region_t *buffer);

4335 

4371 amdsmi_status_t

4372 amdsmi_get_gpu_power_profile_presets(amdsmi_processor_handle processor_handle, uint32_t sensor_ind,

4373  amdsmi_power_profile_status_t *status);

4374 

4377 /*****************************************************************************/

4405 amdsmi_status_t

4406 amdsmi_set_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t perf_lvl);

4407 

4448 amdsmi_status_t amdsmi_set_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t od);

4449 

4486 amdsmi_status_t amdsmi_set_clk_freq(amdsmi_processor_handle processor_handle,

4487  amdsmi_clk_type_t clk_type, uint64_t freq_bitmask);

4488 

4508 amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle,

4509  amdsmi_dpm_policy_t* policy);

4510 

4532 amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle,

4533  uint32_t policy_id);

4534 

4554 amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle,

4555  amdsmi_dpm_policy_t* xgmi_plpd);

4556 

4578 amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id);

4579 

4599 amdsmi_status_t amdsmi_get_gpu_process_isolation(amdsmi_processor_handle processor_handle,

4600  uint32_t* pisolate);

4601 

4621 amdsmi_status_t amdsmi_set_gpu_process_isolation(amdsmi_processor_handle processor_handle,

4622  uint32_t pisolate);

4623 

4641 amdsmi_status_t amdsmi_clean_gpu_local_data(amdsmi_processor_handle processor_handle);

4642 

4645 /*****************************************************************************/

4667 amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version);

4668 

4671 /*****************************************************************************/

4706 amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle,

4707  amdsmi_gpu_block_t block, amdsmi_error_count_t *ec);

4708 

4741 amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle,

4742  uint64_t *enabled_blocks);

4743 

4764 amdsmi_status_t

4765 amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec);

4766 

4767 #pragma pack(push, 1)

4768 

4774 typedef struct {

4775  unsigned char b[16];

4776 } amdsmi_cper_guid_t;

4777 

4778 typedef struct {

4779  uint8_t seconds;

4780  uint8_t minutes;

4781  uint8_t hours;

4782  uint8_t flag;

4783  uint8_t day;

4784  uint8_t month;

4785  uint8_t year;

4786  uint8_t century;

4787 } amdsmi_cper_timestamp_t;

4788 

4789 typedef union {

4790  struct valid_bits_ {

4791  uint32_t platform_id : 1;

4792  uint32_t timestamp : 1;

4793  uint32_t partition_id : 1;

4794  uint32_t reserved : 29;

4795  } valid_bits;

4796  uint32_t valid_mask;

4797 } amdsmi_cper_valid_bits_t;

4798 

4799 typedef struct {

4800  char signature[4]; /* "CPER" */

4801  uint16_t revision;

4802  uint32_t signature_end; /* 0xFFFFFFFF */

4803  uint16_t sec_cnt;

4804  amdsmi_cper_sev_t error_severity;

4805  amdsmi_cper_valid_bits_t cper_valid_bits;

4806  uint32_t record_length; /* Total size of CPER Entry */

4807  amdsmi_cper_timestamp_t timestamp;

4808  char platform_id[16];

4809  amdsmi_cper_guid_t partition_id; /* Reserved */

4810  char creator_id[16];

4811  amdsmi_cper_guid_t notify_type; /* CMC, MCE, can use amdsmi_cper_notifiy_type_t to decode*/

4812  char record_id[8]; /* Unique CPER Entry ID */

4813  uint32_t flags; /* Reserved */

4814  uint64_t persistence_info; /* Reserved */

4815  uint8_t reserved[12]; /* Reserved */

4816 } amdsmi_cper_hdr_t;

4817 

4818 #pragma pack(pop)

4819 

4856 amdsmi_status_t

4857 amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data,

4858  uint64_t *buf_size, amdsmi_cper_hdr_t** cper_hdrs, uint64_t *entry_count, uint64_t *cursor);

4859 

4862 /*****************************************************************************/

4892 amdsmi_status_t amdsmi_get_afids_from_cper(char* cper_buffer, uint32_t buf_size, uint64_t* afids, uint32_t* num_afids);

4893 

4896 /*****************************************************************************/

4933 amdsmi_status_t amdsmi_get_gpu_ecc_status(amdsmi_processor_handle processor_handle,

4934  amdsmi_gpu_block_t block,

4935  amdsmi_ras_err_state_t *state);

4936 

4954 amdsmi_status_t

4955 amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string);

4956 

4959 /*****************************************************************************/

5079 amdsmi_status_t

5080 amdsmi_gpu_counter_group_supported(amdsmi_processor_handle processor_handle, amdsmi_event_group_t group);

5081 

5110 amdsmi_status_t

5111 amdsmi_gpu_create_counter(amdsmi_processor_handle processor_handle, amdsmi_event_type_t type,

5112  amdsmi_event_handle_t *evnt_handle);

5113 

5130 amdsmi_status_t

5131 amdsmi_gpu_destroy_counter(amdsmi_event_handle_t evnt_handle);

5132 

5154 amdsmi_status_t

5155 amdsmi_gpu_control_counter(amdsmi_event_handle_t evt_handle,

5156  amdsmi_counter_command_t cmd, void *cmd_args);

5157 

5178 amdsmi_status_t

5179 amdsmi_gpu_read_counter(amdsmi_event_handle_t evt_handle,

5180  amdsmi_counter_value_t *value);

5181 

5204 amdsmi_status_t

5205 amdsmi_get_gpu_available_counters(amdsmi_processor_handle processor_handle,

5206  amdsmi_event_group_t grp, uint32_t *available);

5207 

5210 /*****************************************************************************/

5248 amdsmi_status_t

5249 amdsmi_get_gpu_compute_process_info(amdsmi_process_info_t *procs, uint32_t *num_items);

5250 

5271 amdsmi_status_t

5272 amdsmi_get_gpu_compute_process_info_by_pid(uint32_t pid, amdsmi_process_info_t *proc);

5273 

5307 amdsmi_status_t

5308 amdsmi_get_gpu_compute_process_gpus(uint32_t pid, uint32_t *dv_indices, uint32_t *num_devices);

5309 

5312 /*****************************************************************************/

5342 amdsmi_status_t

5343 amdsmi_gpu_xgmi_error_status(amdsmi_processor_handle processor_handle, amdsmi_xgmi_status_t *status);

5344 

5361 amdsmi_status_t

5362 amdsmi_reset_gpu_xgmi_error(amdsmi_processor_handle processor_handle);

5363 

5378 amdsmi_status_t

5379 amdsmi_get_xgmi_info(amdsmi_processor_handle processor_handle, amdsmi_xgmi_info_t *info);

5380 

5398 amdsmi_status_t amdsmi_get_gpu_xgmi_link_status(amdsmi_processor_handle processor_handle,

5399  amdsmi_xgmi_link_status_t* link_status);

5400 

5403 /*****************************************************************************/

5423 amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle,

5424  amdsmi_link_metrics_t *link_metrics);

5425 

5445 amdsmi_status_t

5446 amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node);

5447 

5470 amdsmi_status_t

5471 amdsmi_topo_get_link_weight(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst,

5472  uint64_t *weight);

5473 

5499 amdsmi_status_t

5500 amdsmi_get_minmax_bandwidth_between_processors(amdsmi_processor_handle processor_handle_src,

5501  amdsmi_processor_handle processor_handle_dst,

5502  uint64_t *min_bandwidth,

5503  uint64_t *max_bandwidth);

5504 

5531 amdsmi_status_t

5532 amdsmi_topo_get_link_type(amdsmi_processor_handle processor_handle_src,

5533  amdsmi_processor_handle processor_handle_dst,

5534  uint64_t *hops, amdsmi_link_type_t *type);

5535 

5560 amdsmi_status_t

5561 amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle,

5562  amdsmi_link_type_t link_type,

5563  amdsmi_topology_nearest_t* topology_nearest_info);

5564 

5587 amdsmi_status_t

5588 amdsmi_is_P2P_accessible(amdsmi_processor_handle processor_handle_src,

5589  amdsmi_processor_handle processor_handle_dst,

5590  bool *accessible);

5591 

5618 amdsmi_status_t

5619 amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src,

5620  amdsmi_processor_handle processor_handle_dst,

5621  amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap);

5622 

5625 /*****************************************************************************/

5664 amdsmi_status_t

5665 amdsmi_get_gpu_compute_partition(amdsmi_processor_handle processor_handle,

5666  char *compute_partition, uint32_t len);

5667 

5695 amdsmi_status_t

5696 amdsmi_set_gpu_compute_partition(amdsmi_processor_handle processor_handle,

5697  amdsmi_compute_partition_type_t compute_partition);

5698 

5701 /*****************************************************************************/

5740 amdsmi_status_t

5741 amdsmi_get_gpu_memory_partition(amdsmi_processor_handle processor_handle, char *memory_partition, uint32_t len);

5742 

5771 amdsmi_status_t

5772 amdsmi_set_gpu_memory_partition(amdsmi_processor_handle processor_handle,

5773  amdsmi_memory_partition_type_t memory_partition);

5788 amdsmi_status_t

5789 amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle,

5790  amdsmi_memory_partition_config_t *config);

5791 

5814 amdsmi_status_t

5815 amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle,

5816  amdsmi_memory_partition_type_t mode);

5817 

5820 /*****************************************************************************/

5843 amdsmi_status_t

5844 amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle,

5845  amdsmi_accelerator_partition_profile_config_t *profile_config);

5846 

5866 amdsmi_status_t

5867 amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle,

5868  amdsmi_accelerator_partition_profile_t *profile,

5869  uint32_t *partition_id);

5870 

5885 amdsmi_status_t

5886 amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle,

5887  uint32_t profile_index);

5888 

5891 /*****************************************************************************/

5915 amdsmi_status_t

5916 amdsmi_init_gpu_event_notification(amdsmi_processor_handle processor_handle);

5917 

5948 amdsmi_status_t

5949 amdsmi_set_gpu_event_notification_mask(amdsmi_processor_handle processor_handle, uint64_t mask);

5950 

5990 amdsmi_status_t

5991 amdsmi_get_gpu_event_notification(int timeout_ms, uint32_t *num_elem, amdsmi_evt_notification_data_t *data);

5992 

6011 amdsmi_status_t amdsmi_stop_gpu_event_notification(amdsmi_processor_handle processor_handle);

6012 

6015 /*****************************************************************************/

6035 amdsmi_status_t

6036 amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info);

6037 

6040 /*****************************************************************************/

6064 amdsmi_status_t

6065 amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info);

6066 

6067 

6086 amdsmi_status_t

6087 amdsmi_get_gpu_kfd_info(amdsmi_processor_handle processor_handle, amdsmi_kfd_info_t *info);

6088 

6103 amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info);

6104 

6119 amdsmi_status_t

6120 amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info);

6121 

6139 amdsmi_status_t

6140 amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind,

6141  amdsmi_power_cap_info_t *info);

6142 

6157 amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info);

6158 

6175 amdsmi_status_t amdsmi_get_gpu_xcd_counter(amdsmi_processor_handle processor_handle,

6176  uint16_t *xcd_count);

6177 

6180 /*****************************************************************************/

6199 amdsmi_status_t

6200 amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info);

6201 

6217 amdsmi_status_t

6218 amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info);

6219 

6222 /*****************************************************************************/

6242 amdsmi_status_t

6243 amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info);

6244 

6260 amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info);

6261 

6275 amdsmi_status_t

6276 amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled);

6277 

6297 amdsmi_status_t

6298 amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info);

6299 

6315 amdsmi_status_t

6316 amdsmi_get_gpu_vram_usage(amdsmi_processor_handle processor_handle, amdsmi_vram_usage_t *info);

6317 

6337 amdsmi_status_t

6338 amdsmi_get_violation_status(amdsmi_processor_handle processor_handle,

6339  amdsmi_violation_status_t *info);

6340 

6343 /*****************************************************************************/

6402 amdsmi_status_t

6403 amdsmi_get_gpu_process_list(amdsmi_processor_handle processor_handle, uint32_t *max_processes, amdsmi_proc_info_t *list);

6404 

6407 /*****************************************************************************/

6459 amdsmi_status_t amdsmi_gpu_driver_reload(void);

6462 #ifdef ENABLE_ESMI_LIB

6463 

6464 /*****************************************************************************/

6482 amdsmi_status_t amdsmi_get_cpu_core_energy(amdsmi_processor_handle processor_handle,

6483  uint64_t *penergy);

6484 

6498 amdsmi_status_t amdsmi_get_cpu_socket_energy(amdsmi_processor_handle processor_handle,

6499  uint64_t *penergy);

6500 

6503 /*****************************************************************************/

6519 amdsmi_status_t amdsmi_get_threads_per_core(uint32_t *threads_per_core);

6520 

6533 amdsmi_status_t amdsmi_get_cpu_hsmp_driver_version(amdsmi_processor_handle processor_handle,

6534  amdsmi_hsmp_driver_version_t *amdsmi_hsmp_driver_ver);

6535 

6548 amdsmi_status_t amdsmi_get_cpu_smu_fw_version(amdsmi_processor_handle processor_handle,

6549  amdsmi_smu_fw_version_t *amdsmi_smu_fw);

6550 

6563 amdsmi_status_t amdsmi_get_cpu_hsmp_proto_ver(amdsmi_processor_handle processor_handle,

6564  uint32_t *proto_ver);

6565 

6579 amdsmi_status_t amdsmi_get_cpu_prochot_status(amdsmi_processor_handle processor_handle,

6580  uint32_t *prochot);

6581 

6597 amdsmi_status_t amdsmi_get_cpu_fclk_mclk(amdsmi_processor_handle processor_handle,

6598  uint32_t *fclk, uint32_t *mclk);

6599 

6613 amdsmi_status_t amdsmi_get_cpu_cclk_limit(amdsmi_processor_handle processor_handle,

6614  uint32_t *cclk);

6615 

6631 amdsmi_status_t amdsmi_get_cpu_socket_current_active_freq_limit(amdsmi_processor_handle processor_handle,

6632  uint16_t *freq, char **src_type);

6633 

6649 amdsmi_status_t amdsmi_get_cpu_socket_freq_range(amdsmi_processor_handle processor_handle,

6650  uint16_t *fmax, uint16_t *fmin);

6651 

6665 amdsmi_status_t amdsmi_get_cpu_core_current_freq_limit(amdsmi_processor_handle processor_handle,

6666  uint32_t *freq);

6667 

6670 /*****************************************************************************/

6688 amdsmi_status_t amdsmi_get_cpu_core_boostlimit(amdsmi_processor_handle processor_handle,

6689  uint32_t *pboostlimit);

6690 

6704 amdsmi_status_t amdsmi_get_cpu_socket_c0_residency(amdsmi_processor_handle processor_handle,

6705  uint32_t *pc0_residency);

6706 

6720 amdsmi_status_t amdsmi_set_cpu_core_boostlimit(amdsmi_processor_handle processor_handle,

6721  uint32_t boostlimit);

6722 

6736 amdsmi_status_t amdsmi_set_cpu_socket_boostlimit(amdsmi_processor_handle processor_handle,

6737  uint32_t boostlimit);

6738 

6741 /*****************************************************************************/

6759 amdsmi_status_t amdsmi_get_cpu_ddr_bw(amdsmi_processor_handle processor_handle,

6760  amdsmi_ddr_bw_metrics_t *ddr_bw);

6761 

6764 /*****************************************************************************/

6782 amdsmi_status_t amdsmi_get_cpu_socket_temperature(amdsmi_processor_handle processor_handle,

6783  uint32_t *ptmon);

6784 

6787 /*****************************************************************************/

6807 amdsmi_status_t amdsmi_get_cpu_dimm_temp_range_and_refresh_rate(amdsmi_processor_handle processor_handle,

6808  uint8_t dimm_addr,

6809  amdsmi_temp_range_refresh_rate_t *rate);

6810 

6824 amdsmi_status_t amdsmi_get_cpu_dimm_power_consumption(amdsmi_processor_handle processor_handle,

6825  uint8_t dimm_addr,

6826  amdsmi_dimm_power_t *dimm_pow);

6827 

6843 amdsmi_status_t amdsmi_get_cpu_dimm_thermal_sensor(amdsmi_processor_handle processor_handle,

6844  uint8_t dimm_addr,

6845  amdsmi_dimm_thermal_t *dimm_temp);

6846 

6849 /*****************************************************************************/

6869 amdsmi_status_t amdsmi_set_cpu_xgmi_width(amdsmi_processor_handle processor_handle,

6870  uint8_t min, uint8_t max);

6871 

6874 /*****************************************************************************/

6894 amdsmi_status_t amdsmi_set_cpu_gmi3_link_width_range(amdsmi_processor_handle processor_handle,

6895  uint8_t min_link_width, uint8_t max_link_width);

6896 

6899 /*****************************************************************************/

6915 amdsmi_status_t amdsmi_cpu_apb_enable(amdsmi_processor_handle processor_handle);

6916 

6930 amdsmi_status_t amdsmi_cpu_apb_disable(amdsmi_processor_handle processor_handle, uint8_t pstate);

6931 

6949 amdsmi_status_t amdsmi_set_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle,

6950  uint8_t nbio_id, uint8_t min, uint8_t max);

6951 

6967 amdsmi_status_t amdsmi_get_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle,

6968  uint8_t nbio_id, amdsmi_dpm_level_t *nbio);

6969 

6985 amdsmi_status_t amdsmi_set_cpu_pcie_link_rate(amdsmi_processor_handle processor_handle,

6986  uint8_t rate_ctrl, uint8_t *prev_mode);

6987 

7003 amdsmi_status_t amdsmi_set_cpu_df_pstate_range(amdsmi_processor_handle processor_handle,

7004  uint8_t max_pstate, uint8_t min_pstate);

7005 

7008 /*****************************************************************************/

7028 amdsmi_status_t amdsmi_get_cpu_current_io_bandwidth(amdsmi_processor_handle processor_handle,

7029  amdsmi_link_id_bw_type_t link, uint32_t *io_bw);

7030 

7046 amdsmi_status_t amdsmi_get_cpu_current_xgmi_bw(amdsmi_processor_handle processor_handle,

7047  amdsmi_link_id_bw_type_t link, uint32_t *xgmi_bw);

7048 

7051 /*****************************************************************************/

7069 amdsmi_status_t amdsmi_get_hsmp_metrics_table_version(amdsmi_processor_handle processor_handle,

7070  uint32_t *metrics_version);

7071 

7085 amdsmi_status_t amdsmi_get_hsmp_metrics_table(amdsmi_processor_handle processor_handle,

7086  amdsmi_hsmp_metrics_table_t *metrics_table);

7087 

7090 /*****************************************************************************/

7108 amdsmi_status_t amdsmi_first_online_core_on_cpu_socket(amdsmi_processor_handle processor_handle,

7109  uint32_t *pcore_ind);

7110 

7122 amdsmi_status_t amdsmi_get_cpu_family(uint32_t *cpu_family);

7123 

7135 amdsmi_status_t amdsmi_get_cpu_model(uint32_t *cpu_model);

7136 

7161 amdsmi_status_t amdsmi_get_cpu_model_name(amdsmi_processor_handle processor_handle, amdsmi_cpu_info_t *cpu_info);

7162 

7180 amdsmi_status_t amdsmi_get_esmi_err_msg(amdsmi_status_t status, const char **status_string);

7181 

7194 amdsmi_status_t amdsmi_get_cpu_cores_per_socket(uint32_t sock_count, amdsmi_sock_info_t *soc_info);

7195 

7207 amdsmi_status_t amdsmi_get_cpu_socket_count(uint32_t *sock_count);

7208 

7211 #endif

7212 

7213 #ifdef __cplusplus

7214 }

7215 #endif // __cplusplus

7216 

7217 #endif // __AMDSMI_H__

7218 

amdsmi_link_type_t

amdsmi_link_type_t

Link type.

Definition: amdsmi.h:1008

AMDSMI_LINK_TYPE_NOT_APPLICABLE

@ AMDSMI_LINK_TYPE_NOT_APPLICABLE

Not Applicable Link Type.

Definition: amdsmi.h:1012

AMDSMI_LINK_TYPE_INTERNAL

@ AMDSMI_LINK_TYPE_INTERNAL

Internal Link Type, within chip.

Definition: amdsmi.h:1009

AMDSMI_LINK_TYPE_UNKNOWN

@ AMDSMI_LINK_TYPE_UNKNOWN

Unknown Link Type.

Definition: amdsmi.h:1013

AMDSMI_LINK_TYPE_PCIE

@ AMDSMI_LINK_TYPE_PCIE

Peripheral Component Interconnect Express Link Type.

Definition: amdsmi.h:1010

AMDSMI_LINK_TYPE_XGMI

@ AMDSMI_LINK_TYPE_XGMI

GPU Memory Interconnect (multi GPU communication)

Definition: amdsmi.h:1011

amdsmi_evt_notification_type_t

amdsmi_evt_notification_type_t

Event notification event types.

Definition: amdsmi.h:1312

AMDSMI_EVT_NOTIF_GPU_POST_RESET

@ AMDSMI_EVT_NOTIF_GPU_POST_RESET

post-reset

Definition: amdsmi.h:1318

AMDSMI_EVT_NOTIF_PROCESS_START

@ AMDSMI_EVT_NOTIF_PROCESS_START

KFD process start.

Definition: amdsmi.h:1326

AMDSMI_EVT_NOTIF_UNMAP_FROM_GPU

@ AMDSMI_EVT_NOTIF_UNMAP_FROM_GPU

unmap from GPU

Definition: amdsmi.h:1325

AMDSMI_EVT_NOTIF_NONE

@ AMDSMI_EVT_NOTIF_NONE

No events.

Definition: amdsmi.h:1313

AMDSMI_EVT_NOTIF_VMFAULT

@ AMDSMI_EVT_NOTIF_VMFAULT

Virtual Memory Page Fault Event.

Definition: amdsmi.h:1314

AMDSMI_EVT_NOTIF_MIGRATE_START

@ AMDSMI_EVT_NOTIF_MIGRATE_START

migrate start

Definition: amdsmi.h:1319

AMDSMI_EVT_NOTIF_MIGRATE_END

@ AMDSMI_EVT_NOTIF_MIGRATE_END

migrate end

Definition: amdsmi.h:1320

AMDSMI_EVT_NOTIF_QUEUE_EVICTION

@ AMDSMI_EVT_NOTIF_QUEUE_EVICTION

queue eviction

Definition: amdsmi.h:1323

AMDSMI_EVT_NOTIF_PAGE_FAULT_START

@ AMDSMI_EVT_NOTIF_PAGE_FAULT_START

page fault start

Definition: amdsmi.h:1321

AMDSMI_EVT_NOTIF_GPU_PRE_RESET

@ AMDSMI_EVT_NOTIF_GPU_PRE_RESET

pre-reset

Definition: amdsmi.h:1317

AMDSMI_EVT_NOTIF_QUEUE_RESTORE

@ AMDSMI_EVT_NOTIF_QUEUE_RESTORE

queue restore

Definition: amdsmi.h:1324

AMDSMI_EVT_NOTIF_THERMAL_THROTTLE

@ AMDSMI_EVT_NOTIF_THERMAL_THROTTLE

thermal throttle

Definition: amdsmi.h:1316

AMDSMI_EVT_NOTIF_PAGE_FAULT_END

@ AMDSMI_EVT_NOTIF_PAGE_FAULT_END

page fault end

Definition: amdsmi.h:1322

AMDSMI_EVT_NOTIF_PROCESS_END

@ AMDSMI_EVT_NOTIF_PROCESS_END

KFD process end.

Definition: amdsmi.h:1327

AMDSMI_MAX_NUM_CLKS

#define AMDSMI_MAX_NUM_CLKS

This should match MAX_NUM_CLKS.

Definition: amdsmi.h:112

amdsmi_container_types_t

amdsmi_container_types_t

Container.

Definition: amdsmi.h:236

AMDSMI_CONTAINER_DOCKER

@ AMDSMI_CONTAINER_DOCKER

Docker containers.

Definition: amdsmi.h:238

AMDSMI_CONTAINER_LXC

@ AMDSMI_CONTAINER_LXC

Linux containers.

Definition: amdsmi.h:237

AMDSMI_MAX_NUM_XGMI_LINKS

#define AMDSMI_MAX_NUM_XGMI_LINKS

This should match MAX_NUM_XGMI_LINKS.

Definition: amdsmi.h:119

amdsmi_freq_ind_t

amdsmi_freq_ind_t

The values of this enum are used as frequency identifiers.

Definition: amdsmi.h:1559

AMDSMI_FREQ_IND_INVALID

@ AMDSMI_FREQ_IND_INVALID

An invalid frequency index.

Definition: amdsmi.h:1562

AMDSMI_FREQ_IND_MAX

@ AMDSMI_FREQ_IND_MAX

Index used for the maximum frequency value.

Definition: amdsmi.h:1561

AMDSMI_FREQ_IND_MIN

@ AMDSMI_FREQ_IND_MIN

Index used for the minimum frequency value.

Definition: amdsmi.h:1560

amdsmi_reg_type_t

amdsmi_reg_type_t

This register type for register table.

Definition: amdsmi.h:2044

AMDSMI_REG_XGMI

@ AMDSMI_REG_XGMI

XGMI registers.

Definition: amdsmi.h:2045

AMDSMI_REG_USR

@ AMDSMI_REG_USR

Usr registers.

Definition: amdsmi.h:2048

AMDSMI_REG_WAFL

@ AMDSMI_REG_WAFL

WAFL registers.

Definition: amdsmi.h:2046

AMDSMI_REG_USR1

@ AMDSMI_REG_USR1

Usr1 registers.

Definition: amdsmi.h:2049

AMDSMI_REG_PCIE

@ AMDSMI_REG_PCIE

PCIe registers.

Definition: amdsmi.h:2047

amdsmi_event_handle_t

uintptr_t amdsmi_event_handle_t

Handle to performance event counter.

Definition: amdsmi.h:1216

amdsmi_memory_type_t

amdsmi_memory_type_t

Types of memory.

Definition: amdsmi.h:1544

AMDSMI_MEM_TYPE_VRAM

@ AMDSMI_MEM_TYPE_VRAM

VRAM memory.

Definition: amdsmi.h:1547

AMDSMI_MEM_TYPE_VIS_VRAM

@ AMDSMI_MEM_TYPE_VIS_VRAM

VRAM memory that is visible.

Definition: amdsmi.h:1548

AMDSMI_MEM_TYPE_GTT

@ AMDSMI_MEM_TYPE_GTT

GTT memory.

Definition: amdsmi.h:1549

amdsmi_accelerator_partition_type_t

amdsmi_accelerator_partition_type_t

Accelerator Partition.

Definition: amdsmi.h:379

AMDSMI_ACCELERATOR_PARTITION_DPX

@ AMDSMI_ACCELERATOR_PARTITION_DPX

Definition: amdsmi.h:383

AMDSMI_ACCELERATOR_PARTITION_QPX

@ AMDSMI_ACCELERATOR_PARTITION_QPX

Definition: amdsmi.h:387

AMDSMI_ACCELERATOR_PARTITION_SPX

@ AMDSMI_ACCELERATOR_PARTITION_SPX

Definition: amdsmi.h:381

AMDSMI_ACCELERATOR_PARTITION_TPX

@ AMDSMI_ACCELERATOR_PARTITION_TPX

Definition: amdsmi.h:385

AMDSMI_ACCELERATOR_PARTITION_CPX

@ AMDSMI_ACCELERATOR_PARTITION_CPX

Definition: amdsmi.h:389

amdsmi_clk_type_t

amdsmi_clk_type_t

Clock types.

Definition: amdsmi.h:356

AMDSMI_CLK_TYPE_DCLK1

@ AMDSMI_CLK_TYPE_DCLK1

Display 2 clock, timing signals for display output.

Definition: amdsmi.h:370

AMDSMI_CLK_TYPE_MEM

@ AMDSMI_CLK_TYPE_MEM

Memory clock speed, system operating frequency.

Definition: amdsmi.h:365

AMDSMI_CLK_TYPE_SYS

@ AMDSMI_CLK_TYPE_SYS

Graphics clock.

Definition: amdsmi.h:357

AMDSMI_CLK_TYPE_SOC

@ AMDSMI_CLK_TYPE_SOC

System On Chip clock, integrated circuit frequency.

Definition: amdsmi.h:364

AMDSMI_CLK_TYPE_GFX

@ AMDSMI_CLK_TYPE_GFX

Graphics clock.

Definition: amdsmi.h:359

AMDSMI_CLK_TYPE_DCLK0

@ AMDSMI_CLK_TYPE_DCLK0

Display 1 clock, timing signals for display output.

Definition: amdsmi.h:369

AMDSMI_CLK_TYPE_DCEF

@ AMDSMI_CLK_TYPE_DCEF

Definition: amdsmi.h:362

AMDSMI_CLK_TYPE_VCLK1

@ AMDSMI_CLK_TYPE_VCLK1

Video 1 clock, video processing units.

Definition: amdsmi.h:368

AMDSMI_CLK_TYPE_DF

@ AMDSMI_CLK_TYPE_DF

Definition: amdsmi.h:360

AMDSMI_CLK_TYPE_VCLK0

@ AMDSMI_CLK_TYPE_VCLK0

Video 0 clock, video processing units.

Definition: amdsmi.h:367

AMDSMI_CLK_TYPE_PCIE

@ AMDSMI_CLK_TYPE_PCIE

PCI Express clock, high bandwidth peripherals.

Definition: amdsmi.h:366

amdsmi_accelerator_partition_resource_type_t

amdsmi_accelerator_partition_resource_type_t

Accelerator Partition Resource Types.

Definition: amdsmi.h:399

AMDSMI_ACCELERATOR_DMA

@ AMDSMI_ACCELERATOR_DMA

Direct Memory Access, high speed data transfers.

Definition: amdsmi.h:403

AMDSMI_ACCELERATOR_XCC

@ AMDSMI_ACCELERATOR_XCC

Compute complex or stream processors.

Definition: amdsmi.h:400

AMDSMI_ACCELERATOR_DECODER

@ AMDSMI_ACCELERATOR_DECODER

Video decoding.

Definition: amdsmi.h:402

AMDSMI_ACCELERATOR_JPEG

@ AMDSMI_ACCELERATOR_JPEG

Encoding and Decoding jpeg engines.

Definition: amdsmi.h:404

AMDSMI_ACCELERATOR_ENCODER

@ AMDSMI_ACCELERATOR_ENCODER

Video encoding.

Definition: amdsmi.h:401

amdsmi_card_form_factor_t

amdsmi_card_form_factor_t

Card Form Factor.

Definition: amdsmi.h:785

AMDSMI_CARD_FORM_FACTOR_OAM

@ AMDSMI_CARD_FORM_FACTOR_OAM

OAM form factor.

Definition: amdsmi.h:787

AMDSMI_CARD_FORM_FACTOR_UNKNOWN

@ AMDSMI_CARD_FORM_FACTOR_UNKNOWN

Unknown Form factor.

Definition: amdsmi.h:789

AMDSMI_CARD_FORM_FACTOR_PCIE

@ AMDSMI_CARD_FORM_FACTOR_PCIE

PCIE card form factor.

Definition: amdsmi.h:786

AMDSMI_CARD_FORM_FACTOR_CEM

@ AMDSMI_CARD_FORM_FACTOR_CEM

CEM form factor.

Definition: amdsmi.h:788

AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK

#define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK

Common defines.

Definition: amdsmi.h:79

AMDSMI_MAX_NUM_XCP

#define AMDSMI_MAX_NUM_XCP

This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Gr...

Definition: amdsmi.h:182

amdsmi_init_flags_t

amdsmi_init_flags_t

Initialization flags.

Definition: amdsmi.h:48

AMDSMI_INIT_AMD_GPUS

@ AMDSMI_INIT_AMD_GPUS

Initialize AMD GPUS.

Definition: amdsmi.h:51

AMDSMI_INIT_ALL_PROCESSORS

@ AMDSMI_INIT_ALL_PROCESSORS

Initialize all processors.

Definition: amdsmi.h:49

AMDSMI_INIT_AMD_CPUS

@ AMDSMI_INIT_AMD_CPUS

Initialize AMD CPUS.

Definition: amdsmi.h:50

AMDSMI_INIT_NON_AMD_GPUS

@ AMDSMI_INIT_NON_AMD_GPUS

Initialize Non-AMD GPUS.

Definition: amdsmi.h:53

AMDSMI_INIT_NON_AMD_CPUS

@ AMDSMI_INIT_NON_AMD_CPUS

Initialize Non-AMD CPUS.

Definition: amdsmi.h:52

AMDSMI_INIT_AMD_APUS

@ AMDSMI_INIT_AMD_APUS

Definition: amdsmi.h:54

AMDSMI_MAX_NUM_XCC

#define AMDSMI_MAX_NUM_XCC

This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units...

Definition: amdsmi.h:168

AMDSMI_NUM_HBM_INSTANCES

#define AMDSMI_NUM_HBM_INSTANCES

This should match NUM_HBM_INSTANCES.

Definition: amdsmi.h:98

amdsmi_vram_type_t

amdsmi_vram_type_t

vRam Types. This enum is used to identify various VRam types.

Definition: amdsmi.h:625

AMDSMI_VRAM_TYPE_GDDR2

@ AMDSMI_VRAM_TYPE_GDDR2

Graphics Double Data Rate, Generation 2.

Definition: amdsmi.h:638

AMDSMI_VRAM_TYPE_HBM2E

@ AMDSMI_VRAM_TYPE_HBM2E

High Bandwidth Memory, Generation 2 Enhanced.

Definition: amdsmi.h:630

AMDSMI_VRAM_TYPE_GDDR6

@ AMDSMI_VRAM_TYPE_GDDR6

Graphics Double Data Rate, Generation 6.

Definition: amdsmi.h:642

AMDSMI_VRAM_TYPE_HBM

@ AMDSMI_VRAM_TYPE_HBM

High Bandwidth Memory.

Definition: amdsmi.h:628

AMDSMI_VRAM_TYPE_GDDR3

@ AMDSMI_VRAM_TYPE_GDDR3

Graphics Double Data Rate, Generation 3.

Definition: amdsmi.h:639

AMDSMI_VRAM_TYPE_GDDR1

@ AMDSMI_VRAM_TYPE_GDDR1

Graphics Double Data Rate, Generation 1.

Definition: amdsmi.h:637

AMDSMI_VRAM_TYPE_HBM3

@ AMDSMI_VRAM_TYPE_HBM3

High Bandwidth Memory, Generation 3.

Definition: amdsmi.h:631

AMDSMI_VRAM_TYPE_GDDR5

@ AMDSMI_VRAM_TYPE_GDDR5

Graphics Double Data Rate, Generation 5.

Definition: amdsmi.h:641

AMDSMI_VRAM_TYPE_DDR3

@ AMDSMI_VRAM_TYPE_DDR3

Double Data Rate, Generation 3.

Definition: amdsmi.h:634

AMDSMI_VRAM_TYPE_GDDR4

@ AMDSMI_VRAM_TYPE_GDDR4

Graphics Double Data Rate, Generation 4.

Definition: amdsmi.h:640

AMDSMI_VRAM_TYPE_DDR2

@ AMDSMI_VRAM_TYPE_DDR2

Double Data Rate, Generation 2.

Definition: amdsmi.h:633

AMDSMI_VRAM_TYPE_GDDR7

@ AMDSMI_VRAM_TYPE_GDDR7

Graphics Double Data Rate, Generation 7.

Definition: amdsmi.h:643

AMDSMI_VRAM_TYPE_HBM2

@ AMDSMI_VRAM_TYPE_HBM2

High Bandwidth Memory, Generation 2.

Definition: amdsmi.h:629

AMDSMI_VRAM_TYPE_DDR4

@ AMDSMI_VRAM_TYPE_DDR4

Double Data Rate, Generation 4.

Definition: amdsmi.h:635

AMDSMI_VRAM_TYPE_UNKNOWN

@ AMDSMI_VRAM_TYPE_UNKNOWN

Unknown memory type.

Definition: amdsmi.h:626

amdsmi_event_group_t

amdsmi_event_group_t

Event Groups Enum denoting an event group. The value of the enum is the base value for all the event ...

Definition: amdsmi.h:1225

AMDSMI_EVNT_GRP_XGMI

@ AMDSMI_EVNT_GRP_XGMI

Data Fabric (XGMI) related events.

Definition: amdsmi.h:1226

AMDSMI_EVNT_GRP_XGMI_DATA_OUT

@ AMDSMI_EVNT_GRP_XGMI_DATA_OUT

XGMI Outbound data.

Definition: amdsmi.h:1227

AMDSMI_EVNT_GRP_INVALID

@ AMDSMI_EVNT_GRP_INVALID

Unknown Event Group.

Definition: amdsmi.h:1228

amdsmi_ras_err_state_t

amdsmi_ras_err_state_t

The current ECC state.

Definition: amdsmi.h:1525

AMDSMI_RAS_ERR_STATE_PARITY

@ AMDSMI_RAS_ERR_STATE_PARITY

ECC errors present, but type unknown.

Definition: amdsmi.h:1528

AMDSMI_RAS_ERR_STATE_SING_C

@ AMDSMI_RAS_ERR_STATE_SING_C

Single correctable error.

Definition: amdsmi.h:1529

AMDSMI_RAS_ERR_STATE_MULT_UC

@ AMDSMI_RAS_ERR_STATE_MULT_UC

Multiple uncorrectable errors.

Definition: amdsmi.h:1530

AMDSMI_RAS_ERR_STATE_POISON

@ AMDSMI_RAS_ERR_STATE_POISON

Definition: amdsmi.h:1531

AMDSMI_RAS_ERR_STATE_ENABLED

@ AMDSMI_RAS_ERR_STATE_ENABLED

ECC is enabled.

Definition: amdsmi.h:1533

AMDSMI_RAS_ERR_STATE_NONE

@ AMDSMI_RAS_ERR_STATE_NONE

No current errors.

Definition: amdsmi.h:1526

AMDSMI_RAS_ERR_STATE_DISABLED

@ AMDSMI_RAS_ERR_STATE_DISABLED

ECC is disabled.

Definition: amdsmi.h:1527

amdsmi_io_bw_encoding_t

amdsmi_io_bw_encoding_t

xGMI Bandwidth Encoding types

Definition: amdsmi.h:2189

AGG_BW0

@ AGG_BW0

Aggregate Bandwidth.

Definition: amdsmi.h:2190

RD_BW0

@ RD_BW0

Read Bandwidth.

Definition: amdsmi.h:2191

WR_BW0

@ WR_BW0

Write Bandwdith.

Definition: amdsmi.h:2192

amdsmi_cper_notify_type_t

amdsmi_cper_notify_type_t

Cper notify.

Definition: amdsmi.h:1505

AMDSMI_CPER_NOTIFY_TYPE_DMAR

@ AMDSMI_CPER_NOTIFY_TYPE_DMAR

Direct Memory Access Remapping Error.

Definition: amdsmi.h:1513

AMDSMI_CPER_NOTIFY_TYPE_NMI

@ AMDSMI_CPER_NOTIFY_TYPE_NMI

Non_Maskable Interrupt.

Definition: amdsmi.h:1511

AMDSMI_CPER_NOTIFY_TYPE_SEI

@ AMDSMI_CPER_NOTIFY_TYPE_SEI

System Error Interface.

Definition: amdsmi.h:1515

AMDSMI_CPER_NOTIFY_TYPE_CMC

@ AMDSMI_CPER_NOTIFY_TYPE_CMC

Corrected Memory Check.

Definition: amdsmi.h:1506

AMDSMI_CPER_NOTIFY_TYPE_CPE

@ AMDSMI_CPER_NOTIFY_TYPE_CPE

Corrected Platform Error.

Definition: amdsmi.h:1507

AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT

@ AMDSMI_CPER_NOTIFY_TYPE_CXL_COMPONENT

Compute Express Link Component Error.

Definition: amdsmi.h:1517

AMDSMI_CPER_NOTIFY_TYPE_SEA

@ AMDSMI_CPER_NOTIFY_TYPE_SEA

System Error Architecture.

Definition: amdsmi.h:1514

AMDSMI_CPER_NOTIFY_TYPE_PEI

@ AMDSMI_CPER_NOTIFY_TYPE_PEI

Platform Error Interface.

Definition: amdsmi.h:1516

AMDSMI_CPER_NOTIFY_TYPE_MCE

@ AMDSMI_CPER_NOTIFY_TYPE_MCE

Machine Check Exception.

Definition: amdsmi.h:1508

AMDSMI_CPER_NOTIFY_TYPE_BOOT

@ AMDSMI_CPER_NOTIFY_TYPE_BOOT

Boot Error.

Definition: amdsmi.h:1512

AMDSMI_CPER_NOTIFY_TYPE_PCIE

@ AMDSMI_CPER_NOTIFY_TYPE_PCIE

PCI Express Error.

Definition: amdsmi.h:1509

AMDSMI_CPER_NOTIFY_TYPE_INIT

@ AMDSMI_CPER_NOTIFY_TYPE_INIT

Initialization Error.

Definition: amdsmi.h:1510

amdsmi_event_type_t

amdsmi_event_type_t

Event types Event type enum. Events belonging to a particular event group amdsmi_event_group_t should...

Definition: amdsmi.h:1261

AMDSMI_EVNT_XGMI_0_BEATS_TX

@ AMDSMI_EVNT_XGMI_0_BEATS_TX

Throughput = BEATS/time_running 10^9 bytes/sec.

Definition: amdsmi.h:1268

AMDSMI_EVNT_XGMI_DATA_OUT_3

@ AMDSMI_EVNT_XGMI_DATA_OUT_3

Outbound beats to neighbor 3.

Definition: amdsmi.h:1278

AMDSMI_EVNT_XGMI_0_NOP_TX

@ AMDSMI_EVNT_XGMI_0_NOP_TX

NOPs sent to neighbor 0.

Definition: amdsmi.h:1265

AMDSMI_EVNT_XGMI_1_NOP_TX

@ AMDSMI_EVNT_XGMI_1_NOP_TX

NOPs sent to neighbor 1.

Definition: amdsmi.h:1269

AMDSMI_EVNT_XGMI_0_RESPONSE_TX

@ AMDSMI_EVNT_XGMI_0_RESPONSE_TX

Outgoing responses to neighbor 0.

Definition: amdsmi.h:1267

AMDSMI_EVNT_XGMI_1_BEATS_TX

@ AMDSMI_EVNT_XGMI_1_BEATS_TX

Data beats sent to neighbor 1; Each beat represents 32 bytes.

Definition: amdsmi.h:1272

AMDSMI_EVNT_XGMI_DATA_OUT_4

@ AMDSMI_EVNT_XGMI_DATA_OUT_4

Outbound beats to neighbor 4.

Definition: amdsmi.h:1279

AMDSMI_EVNT_XGMI_DATA_OUT_1

@ AMDSMI_EVNT_XGMI_DATA_OUT_1

Outbound beats to neighbor 1.

Definition: amdsmi.h:1276

AMDSMI_EVNT_XGMI_DATA_OUT_2

@ AMDSMI_EVNT_XGMI_DATA_OUT_2

Outbound beats to neighbor 2.

Definition: amdsmi.h:1277

AMDSMI_EVNT_XGMI_1_REQUEST_TX

@ AMDSMI_EVNT_XGMI_1_REQUEST_TX

Outgoing requests to neighbor 1.

Definition: amdsmi.h:1270

AMDSMI_EVNT_XGMI_DATA_OUT_5

@ AMDSMI_EVNT_XGMI_DATA_OUT_5

Outbound beats to neighbor 5.

Definition: amdsmi.h:1280

AMDSMI_EVNT_XGMI_DATA_OUT_0

@ AMDSMI_EVNT_XGMI_DATA_OUT_0

Outbound beats to neighbor 0.

Definition: amdsmi.h:1275

AMDSMI_EVNT_XGMI_0_REQUEST_TX

@ AMDSMI_EVNT_XGMI_0_REQUEST_TX

Outgoing requests to neighbor 0.

Definition: amdsmi.h:1266

AMDSMI_EVNT_XGMI_1_RESPONSE_TX

@ AMDSMI_EVNT_XGMI_1_RESPONSE_TX

Outgoing responses to neighbor 1.

Definition: amdsmi.h:1271

processor_type_t

processor_type_t

Processor types detectable by AMD SMI.

Definition: amdsmi.h:279

AMDSMI_PROCESSOR_TYPE_AMD_APU

@ AMDSMI_PROCESSOR_TYPE_AMD_APU

AMD Accelerated processor type (GPU and CPU)

Definition: amdsmi.h:286

AMDSMI_PROCESSOR_TYPE_UNKNOWN

@ AMDSMI_PROCESSOR_TYPE_UNKNOWN

Unknown processor type.

Definition: amdsmi.h:280

AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU

@ AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU

Non-AMD CPU processor type.

Definition: amdsmi.h:284

AMDSMI_PROCESSOR_TYPE_AMD_CPU

@ AMDSMI_PROCESSOR_TYPE_AMD_CPU

AMD CPU processor type.

Definition: amdsmi.h:282

AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE

@ AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE

AMD CPU-Core processor type.

Definition: amdsmi.h:285

AMDSMI_PROCESSOR_TYPE_AMD_GPU

@ AMDSMI_PROCESSOR_TYPE_AMD_GPU

AMD Graphics processor type.

Definition: amdsmi.h:281

AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU

@ AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU

Non-AMD Graphics processor type.

Definition: amdsmi.h:283

AMDSMI_MAX_UTILIZATION_VALUES

#define AMDSMI_MAX_UTILIZATION_VALUES

The max number of values per counter type.

Definition: amdsmi.h:1613

amdsmi_fw_block_t

amdsmi_fw_block_t

The values of this enum are used to identify the various firmware blocks.

Definition: amdsmi.h:535

AMDSMI_FW_ID_ASD

@ AMDSMI_FW_ID_ASD

Asynchronous Shader Dispatcher.

Definition: amdsmi.h:609

AMDSMI_FW_ID_RS64_ME_P0_DATA

@ AMDSMI_FW_ID_RS64_ME_P0_DATA

Hardware Block RS64 - Micro Engine Partition 0 Data.

Definition: amdsmi.h:591

AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM

@ AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM

Rasterizier and L2 Cache Restore List System RAM Memory.

Definition: amdsmi.h:562

AMDSMI_FW_ID_SDMA7

@ AMDSMI_FW_ID_SDMA7

System Direct Memory Access 7 (high speed data transfers)

Definition: amdsmi.h:554

AMDSMI_FW_ID_PSP_BL

@ AMDSMI_FW_ID_PSP_BL

Platform Security Processor Bootloader (initial firmware)

Definition: amdsmi.h:574

AMDSMI_FW_ID_RLC

@ AMDSMI_FW_ID_RLC

Rasterizer and L2 Cache (rasterization processs)

Definition: amdsmi.h:546

AMDSMI_FW_ID_RS64_PFP

@ AMDSMI_FW_ID_RS64_PFP

Hardware Block RS64 - Pixel Front End Processor.

Definition: amdsmi.h:593

AMDSMI_FW_ID_SDMA_TH1

@ AMDSMI_FW_ID_SDMA_TH1

System Direct Memory Access - Thread Handler 0.

Definition: amdsmi.h:582

AMDSMI_FW_ID_MMSCH

@ AMDSMI_FW_ID_MMSCH

Multi-Media Shader Hardware Scheduler.

Definition: amdsmi.h:565

AMDSMI_FW_ID_RLX6

@ AMDSMI_FW_ID_RLX6

Hardware Block RLX6.

Definition: amdsmi.h:588

AMDSMI_FW_ID_PSP_SOSDRV

@ AMDSMI_FW_ID_PSP_SOSDRV

Platform Security Processor Secure Operating System Driver.

Definition: amdsmi.h:567

AMDSMI_FW_ID_TA_RAS

@ AMDSMI_FW_ID_TA_RAS

Trusted Applications - Reliablity Availability and Serviceability.

Definition: amdsmi.h:610

AMDSMI_FW_ID_PSP_KEYDB

@ AMDSMI_FW_ID_PSP_KEYDB

Platform Security Processor Table of Contents.

Definition: amdsmi.h:569

AMDSMI_FW_ID_RLC_SRLS

@ AMDSMI_FW_ID_RLC_SRLS

Rasterizier and L2 Cache - Shared Resource Local Segment.

Definition: amdsmi.h:613

AMDSMI_FW_ID_VCE

@ AMDSMI_FW_ID_VCE

Video Coding Engine (Encoding video)

Definition: amdsmi.h:557

AMDSMI_FW_ID_DMCU_ISR

@ AMDSMI_FW_ID_DMCU_ISR

Digital Micro Controller Unit - Interrupt Service Routine (interrupt handlers)

Definition: amdsmi.h:560

AMDSMI_FW_ID_SDMA6

@ AMDSMI_FW_ID_SDMA6

System Direct Memory Access 6 (high speed data transfers)

Definition: amdsmi.h:553

AMDSMI_FW_ID_PSP_DBG

@ AMDSMI_FW_ID_PSP_DBG

Platform Security Processor - Debug.

Definition: amdsmi.h:603

AMDSMI_FW_ID_CP_CE

@ AMDSMI_FW_ID_CP_CE

Compute Processor - Command_Engine (fetch, decode, dispatch)

Definition: amdsmi.h:539

AMDSMI_FW_ID_DRV_CAP

@ AMDSMI_FW_ID_DRV_CAP

Driver Capabilities (capabilities, features)

Definition: amdsmi.h:572

AMDSMI_FW_ID_RS64_ME_P1_DATA

@ AMDSMI_FW_ID_RS64_ME_P1_DATA

Hardware Block RS64 - Micro Engine Partition 1 Data.

Definition: amdsmi.h:592

AMDSMI_FW_ID_MES_THREAD1

@ AMDSMI_FW_ID_MES_THREAD1

Micro Engine Scheduler - Thread 1.

Definition: amdsmi.h:586

AMDSMI_FW_ID_PM

@ AMDSMI_FW_ID_PM

Power Management Firmware.

Definition: amdsmi.h:614

AMDSMI_FW_ID_SDMA0

@ AMDSMI_FW_ID_SDMA0

System Direct Memory Access 0 (high speed data transfers)

Definition: amdsmi.h:547

AMDSMI_FW_ID_ISP

@ AMDSMI_FW_ID_ISP

Image Signal Processor (processing raw image data from sensors)

Definition: amdsmi.h:558

AMDSMI_FW_ID_PSP_SOC

@ AMDSMI_FW_ID_PSP_SOC

Platform Security Processor - System On a Chip.

Definition: amdsmi.h:602

AMDSMI_FW_ID_CP_PM4

@ AMDSMI_FW_ID_CP_PM4

Compute Processor Packet Processor 4 (processing command packets)

Definition: amdsmi.h:575

AMDSMI_FW_ID_RLC_P

@ AMDSMI_FW_ID_RLC_P

Rasterizier and L2 Cache Partition.

Definition: amdsmi.h:576

AMDSMI_FW_ID_SDMA_TH0

@ AMDSMI_FW_ID_SDMA_TH0

System Direct Memory Access - Thread Handler 0.

Definition: amdsmi.h:581

AMDSMI_FW_ID_MC

@ AMDSMI_FW_ID_MC

Memory Contoller (RAM and VRAM)

Definition: amdsmi.h:573

AMDSMI_FW_ID_VCN

@ AMDSMI_FW_ID_VCN

Video Core Next (encoding and decoding)

Definition: amdsmi.h:555

AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1

@ AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1

Hardware Block RLX6 Core 1 - Dynamic RAM Boot.

Definition: amdsmi.h:606

AMDSMI_FW_ID_MES_STACK

@ AMDSMI_FW_ID_MES_STACK

Micro Engine Scheduler - Stack.

Definition: amdsmi.h:585

AMDSMI_FW_ID_PSP_TOC

@ AMDSMI_FW_ID_PSP_TOC

Platform Security Processor Table of Contents.

Definition: amdsmi.h:568

AMDSMI_FW_ID_IMU_IRAM

@ AMDSMI_FW_ID_IMU_IRAM

Input/Output Memory Management Unit - Instruction RAM.

Definition: amdsmi.h:580

AMDSMI_FW_ID_SEC_POLICY_STAGE2

@ AMDSMI_FW_ID_SEC_POLICY_STAGE2

Security Policy Stage 2 (security features)

Definition: amdsmi.h:577

AMDSMI_FW_ID_RS64_MEC_P2_DATA

@ AMDSMI_FW_ID_RS64_MEC_P2_DATA

Hardware Block RS64 - Micro Engine Controller Partition 2 Data.

Definition: amdsmi.h:599

AMDSMI_FW_ID_PLDM_BUNDLE

@ AMDSMI_FW_ID_PLDM_BUNDLE

Platform Level Data Model Firmware Bundle.

Definition: amdsmi.h:616

AMDSMI_FW_ID_TA_XGMI

@ AMDSMI_FW_ID_TA_XGMI

Trusted Applications - Reliablity XGMI.

Definition: amdsmi.h:611

AMDSMI_FW_ID_RS64_ME

@ AMDSMI_FW_ID_RS64_ME

Hardware Block RS64 - Micro Engine.

Definition: amdsmi.h:590

AMDSMI_FW_ID_SDMA3

@ AMDSMI_FW_ID_SDMA3

System Direct Memory Access 3 (high speed data transfers)

Definition: amdsmi.h:550

AMDSMI_FW_ID_SDMA1

@ AMDSMI_FW_ID_SDMA1

System Direct Memory Access 1 (high speed data transfers)

Definition: amdsmi.h:548

AMDSMI_FW_ID_CP_ME

@ AMDSMI_FW_ID_CP_ME

Compute Processor - Micro Engine (specialize processing)

Definition: amdsmi.h:541

AMDSMI_FW_ID_RS64_MEC_P3_DATA

@ AMDSMI_FW_ID_RS64_MEC_P3_DATA

Hardware Block RS64 - Micro Engine Controller Partition 3 Data.

Definition: amdsmi.h:600

AMDSMI_FW_ID_CP_MEC_JT1

@ AMDSMI_FW_ID_CP_MEC_JT1

Compute Processor - Micro Engine Controler Job Table 1 (queues, scheduling)

Definition: amdsmi.h:542

AMDSMI_FW_ID_UVD

@ AMDSMI_FW_ID_UVD

Unified Video Decoder (decode specific video formats)

Definition: amdsmi.h:556

AMDSMI_FW_ID_RLC_V

@ AMDSMI_FW_ID_RLC_V

Rasterizier and L2 Cache Virtual memory.

Definition: amdsmi.h:564

AMDSMI_FW_ID_SDMA4

@ AMDSMI_FW_ID_SDMA4

System Direct Memory Access 4 (high speed data transfers)

Definition: amdsmi.h:551

AMDSMI_FW_ID_MES_KIQ

@ AMDSMI_FW_ID_MES_KIQ

Micro Engine Scheduler - Kernel Indirect Queue.

Definition: amdsmi.h:584

AMDSMI_FW_ID_DMCU

@ AMDSMI_FW_ID_DMCU

Display Micro-Controller Unit.

Definition: amdsmi.h:615

AMDSMI_FW_ID_RLC_SRLG

@ AMDSMI_FW_ID_RLC_SRLG

Rasterizier and L2 Cache - Shared Resource Local Group.

Definition: amdsmi.h:612

AMDSMI_FW_ID_RS64_PFP_P1_DATA

@ AMDSMI_FW_ID_RS64_PFP_P1_DATA

Hardware Block RS64 - Pixel Front End Processor Partition 1 Data.

Definition: amdsmi.h:595

AMDSMI_FW_ID_RLX6_DRAM_BOOT

@ AMDSMI_FW_ID_RLX6_DRAM_BOOT

Hardware Block RLX6 - Dynamic Ram Boot.

Definition: amdsmi.h:589

AMDSMI_FW_ID_IMU_DRAM

@ AMDSMI_FW_ID_IMU_DRAM

Input/Output Memory Management Unit - Dynamic RAM.

Definition: amdsmi.h:579

AMDSMI_FW_ID_CP_MEC1

@ AMDSMI_FW_ID_CP_MEC1

Compute Processor - Micro Engine Controler 1 (scheduling, managing resources)

Definition: amdsmi.h:544

AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL

@ AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL

Rasterizier and L2 Cache Restore List Control.

Definition: amdsmi.h:563

AMDSMI_FW_ID_RS64_MEC_P0_DATA

@ AMDSMI_FW_ID_RS64_MEC_P0_DATA

Hardware Block RS64 - Micro Engine Controller Partition 0 Data.

Definition: amdsmi.h:597

AMDSMI_FW_ID_RLX6_CORE1

@ AMDSMI_FW_ID_RLX6_CORE1

Hardware Block RLX6 - Core 1.

Definition: amdsmi.h:605

AMDSMI_FW_ID_RS64_MEC_P1_DATA

@ AMDSMI_FW_ID_RS64_MEC_P1_DATA

Hardware Block RS64 - Micro Engine Controller Partition 1 Data.

Definition: amdsmi.h:598

AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM

@ AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM

Rasterizier and L2 Cache Restore List Graphics Processor Memory.

Definition: amdsmi.h:561

AMDSMI_FW_ID_PSP_INTF

@ AMDSMI_FW_ID_PSP_INTF

Platform Security Processor - Interface.

Definition: amdsmi.h:604

AMDSMI_FW_ID_CP_MEC_JT2

@ AMDSMI_FW_ID_CP_MEC_JT2

Compute Processor - Micro Engine Controler Job Table 2 (queues, scheduling)

Definition: amdsmi.h:543

AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST

@ AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST

Rasterizier and L2 Cache - Save Restore List.

Definition: amdsmi.h:608

AMDSMI_FW_ID_CP_PFP

@ AMDSMI_FW_ID_CP_PFP

Compute Processor - Pixel Front End Processor (pixelating process)

Definition: amdsmi.h:540

AMDSMI_FW_ID_MES_THREAD1_STACK

@ AMDSMI_FW_ID_MES_THREAD1_STACK

Micro Engine Scheduler - Thread 1 Stack.

Definition: amdsmi.h:587

AMDSMI_FW_ID_SMU

@ AMDSMI_FW_ID_SMU

Definition: amdsmi.h:536

AMDSMI_FW_ID_PPTABLE

@ AMDSMI_FW_ID_PPTABLE

Power Policy Table (power management policies)

Definition: amdsmi.h:601

AMDSMI_FW_ID_PSP_SPL

@ AMDSMI_FW_ID_PSP_SPL

Platform Security Processor Secure Program Loader.

Definition: amdsmi.h:571

AMDSMI_FW_ID_REG_ACCESS_WHITELIST

@ AMDSMI_FW_ID_REG_ACCESS_WHITELIST

Register Access Whitelist (Prevent unathorizied access)

Definition: amdsmi.h:578

AMDSMI_FW_ID_PSP_SYSDRV

@ AMDSMI_FW_ID_PSP_SYSDRV

Platform Security Processor System Driver.

Definition: amdsmi.h:566

AMDSMI_FW_ID_RS64_PFP_P0_DATA

@ AMDSMI_FW_ID_RS64_PFP_P0_DATA

Hardware Block RS64 - Pixel Front End Processor Partition 0 Data.

Definition: amdsmi.h:594

AMDSMI_FW_ID_SDMA5

@ AMDSMI_FW_ID_SDMA5

System Direct Memory Access 5 (high speed data transfers)

Definition: amdsmi.h:552

AMDSMI_FW_ID_SDMA2

@ AMDSMI_FW_ID_SDMA2

System Direct Memory Access 2 (high speed data transfers)

Definition: amdsmi.h:549

AMDSMI_FW_ID_CP_MES

@ AMDSMI_FW_ID_CP_MES

Compute Processor - Micro Engine Scheduler.

Definition: amdsmi.h:583

AMDSMI_FW_ID_DMCU_ERAM

@ AMDSMI_FW_ID_DMCU_ERAM

Digital Micro Controller Unit - Embedded RAM (memory used by DMU)

Definition: amdsmi.h:559

AMDSMI_FW_ID_RLCV_LX7

@ AMDSMI_FW_ID_RLCV_LX7

Hardware Block RLCV - Subsystem LX7.

Definition: amdsmi.h:607

AMDSMI_FW_ID_RS64_MEC

@ AMDSMI_FW_ID_RS64_MEC

Hardware Block RS64 - Micro Engine Controller.

Definition: amdsmi.h:596

AMDSMI_FW_ID_DFC

@ AMDSMI_FW_ID_DFC

Data Fabric Controler (bandwidth and coherency)

Definition: amdsmi.h:570

AMDSMI_FW_ID_CP_MEC2

@ AMDSMI_FW_ID_CP_MEC2

Compute Processor - Micro Engine Controler 2 (scheduling, managing resources)

Definition: amdsmi.h:545

amdsmi_mm_ip_t

amdsmi_mm_ip_t

GPU Capability info.

Definition: amdsmi.h:224

AMDSMI_MM_UVD

@ AMDSMI_MM_UVD

Multi-Media Unified Video Decoder.

Definition: amdsmi.h:225

AMDSMI_MM_VCE

@ AMDSMI_MM_VCE

Multi-Media Video Coding Engine.

Definition: amdsmi.h:226

AMDSMI_MM_VCN

@ AMDSMI_MM_VCN

Multi-Media Video Core Next.

Definition: amdsmi.h:227

amdsmi_memory_page_status_t

amdsmi_memory_page_status_t

Reserved Memory Page States.

Definition: amdsmi.h:1588

AMDSMI_MEM_PAGE_STATUS_UNRESERVABLE

@ AMDSMI_MEM_PAGE_STATUS_UNRESERVABLE

Unable to reserve this page.

Definition: amdsmi.h:1592

AMDSMI_MEM_PAGE_STATUS_RESERVED

@ AMDSMI_MEM_PAGE_STATUS_RESERVED

Reserved. This gpu page is reserved and not available for use.

Definition: amdsmi.h:1589

AMDSMI_MEM_PAGE_STATUS_PENDING

@ AMDSMI_MEM_PAGE_STATUS_PENDING

Definition: amdsmi.h:1590

amdsmi_xgmi_status_t

amdsmi_xgmi_status_t

XGMI Status.

Definition: amdsmi.h:1570

AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS

@ AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS

XGMI Multiple Errors.

Definition: amdsmi.h:1573

AMDSMI_XGMI_STATUS_NO_ERRORS

@ AMDSMI_XGMI_STATUS_NO_ERRORS

XGMI No Errors.

Definition: amdsmi.h:1571

AMDSMI_XGMI_STATUS_ERROR

@ AMDSMI_XGMI_STATUS_ERROR

XGMI Errors.

Definition: amdsmi.h:1572

amdsmi_dev_perf_level_t

amdsmi_dev_perf_level_t

PowerPlay performance levels.

Definition: amdsmi.h:1195

AMDSMI_DEV_PERF_LEVEL_STABLE_STD

@ AMDSMI_DEV_PERF_LEVEL_STABLE_STD

Stable power state with profiling clocks.

Definition: amdsmi.h:1202

AMDSMI_DEV_PERF_LEVEL_STABLE_PEAK

@ AMDSMI_DEV_PERF_LEVEL_STABLE_PEAK

Stable power state with peak clocks.

Definition: amdsmi.h:1203

AMDSMI_DEV_PERF_LEVEL_AUTO

@ AMDSMI_DEV_PERF_LEVEL_AUTO

Performance level is "auto".

Definition: amdsmi.h:1196

AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_SCLK

@ AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_SCLK

Stable power state with minimum system clock.

Definition: amdsmi.h:1205

AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_MCLK

@ AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_MCLK

Stable power state with minimum memory clock.

Definition: amdsmi.h:1204

AMDSMI_DEV_PERF_LEVEL_DETERMINISM

@ AMDSMI_DEV_PERF_LEVEL_DETERMINISM

Performance determinism state.

Definition: amdsmi.h:1206

AMDSMI_DEV_PERF_LEVEL_LOW

@ AMDSMI_DEV_PERF_LEVEL_LOW

Keep PowerPlay levels "low", regardless of workload.

Definition: amdsmi.h:1198

AMDSMI_DEV_PERF_LEVEL_HIGH

@ AMDSMI_DEV_PERF_LEVEL_HIGH

Keep PowerPlay levels "high", regardless of workload.

Definition: amdsmi.h:1199

AMDSMI_DEV_PERF_LEVEL_MANUAL

@ AMDSMI_DEV_PERF_LEVEL_MANUAL

Definition: amdsmi.h:1200

AMDSMI_DEV_PERF_LEVEL_UNKNOWN

@ AMDSMI_DEV_PERF_LEVEL_UNKNOWN

Unknown performance level.

Definition: amdsmi.h:1208

amdsmi_virtualization_mode_t

amdsmi_virtualization_mode_t

Variant placeholder.

Definition: amdsmi.h:2107

AMDSMI_VIRTUALIZATION_MODE_BAREMETAL

@ AMDSMI_VIRTUALIZATION_MODE_BAREMETAL

Baremetal Virtualization Mode.

Definition: amdsmi.h:2109

AMDSMI_VIRTUALIZATION_MODE_UNKNOWN

@ AMDSMI_VIRTUALIZATION_MODE_UNKNOWN

Unknown Virtualization Mode.

Definition: amdsmi.h:2108

AMDSMI_VIRTUALIZATION_MODE_HOST

@ AMDSMI_VIRTUALIZATION_MODE_HOST

Host Virtualization Mode.

Definition: amdsmi.h:2110

AMDSMI_VIRTUALIZATION_MODE_GUEST

@ AMDSMI_VIRTUALIZATION_MODE_GUEST

Guest Virtualization Mode.

Definition: amdsmi.h:2111

AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH

@ AMDSMI_VIRTUALIZATION_MODE_PASSTHROUGH

Passthrough Virtualization Mode.

Definition: amdsmi.h:2112

amdsmi_process_handle_t

uint32_t amdsmi_process_handle_t

Process Handle.

Definition: amdsmi.h:1137

amdsmi_utilization_counter_type_t

amdsmi_utilization_counter_type_t

The utilization counter type.

Definition: amdsmi.h:1600

AMDSMI_FINE_GRAIN_MEM_ACTIVITY

@ AMDSMI_FINE_GRAIN_MEM_ACTIVITY

Fine Grain Memory Activity.

Definition: amdsmi.h:1608

AMDSMI_COARSE_GRAIN_MEM_ACTIVITY

@ AMDSMI_COARSE_GRAIN_MEM_ACTIVITY

Course Grain Memory Activity.

Definition: amdsmi.h:1604

AMDSMI_COARSE_GRAIN_GFX_ACTIVITY

@ AMDSMI_COARSE_GRAIN_GFX_ACTIVITY

Course Grain Graphic Activity.

Definition: amdsmi.h:1603

AMDSMI_FINE_GRAIN_GFX_ACTIVITY

@ AMDSMI_FINE_GRAIN_GFX_ACTIVITY

Fine Grain Graphic Activity.

Definition: amdsmi.h:1607

AMDSMI_FINE_DECODER_ACTIVITY

@ AMDSMI_FINE_DECODER_ACTIVITY

Fine Grain Decoder Activity.

Definition: amdsmi.h:1609

AMDSMI_COARSE_DECODER_ACTIVITY

@ AMDSMI_COARSE_DECODER_ACTIVITY

Course Grain Decoder Activity.

Definition: amdsmi.h:1605

amdsmi_memory_partition_type_t

amdsmi_memory_partition_type_t

Memory Partitions.

Definition: amdsmi.h:433

AMDSMI_MEMORY_PARTITION_NPS8

@ AMDSMI_MEMORY_PARTITION_NPS8

Definition: amdsmi.h:443

AMDSMI_MEMORY_PARTITION_NPS1

@ AMDSMI_MEMORY_PARTITION_NPS1

Definition: amdsmi.h:435

AMDSMI_MEMORY_PARTITION_NPS2

@ AMDSMI_MEMORY_PARTITION_NPS2

Definition: amdsmi.h:437

AMDSMI_MEMORY_PARTITION_NPS4

@ AMDSMI_MEMORY_PARTITION_NPS4

Definition: amdsmi.h:440

amdsmi_voltage_metric_t

amdsmi_voltage_metric_t

Voltage Metrics. This enum is used to identify various Volatge metrics. Corresponding values will be ...

Definition: amdsmi.h:1392

AMDSMI_VOLT_LOWEST

@ AMDSMI_VOLT_LOWEST

Historical minimum voltage.

Definition: amdsmi.h:1401

AMDSMI_VOLT_MAX_CRIT

@ AMDSMI_VOLT_MAX_CRIT

Voltage critical max value.

Definition: amdsmi.h:1399

AMDSMI_VOLT_HIGHEST

@ AMDSMI_VOLT_HIGHEST

Historical maximum voltage.

Definition: amdsmi.h:1402

AMDSMI_VOLT_MIN

@ AMDSMI_VOLT_MIN

Voltage min value.

Definition: amdsmi.h:1398

AMDSMI_VOLT_AVERAGE

@ AMDSMI_VOLT_AVERAGE

Average voltage.

Definition: amdsmi.h:1400

AMDSMI_VOLT_CURRENT

@ AMDSMI_VOLT_CURRENT

Voltage current value.

Definition: amdsmi.h:1393

AMDSMI_VOLT_MAX

@ AMDSMI_VOLT_MAX

Voltage max value.

Definition: amdsmi.h:1396

AMDSMI_VOLT_MIN_CRIT

@ AMDSMI_VOLT_MIN_CRIT

Voltage critical min value.

Definition: amdsmi.h:1397

AMDSMI_MAX_NUM_JPEG_ENG_V1

#define AMDSMI_MAX_NUM_JPEG_ENG_V1

Introduced in gpu metrics v1.8, document presents NUM_JPEG_ENG_V1 but will change to AMDSMI_MAX_NUM_J...

Definition: amdsmi.h:155

amdsmi_bit_field_t

uint64_t amdsmi_bit_field_t

Bitfield used in various AMDSMI calls.

Definition: amdsmi.h:1581

amdsmi_voltage_type_t

amdsmi_voltage_type_t

This ennumeration is used to indicate which type of voltage reading should be obtained.

Definition: amdsmi.h:1413

AMDSMI_VOLT_TYPE_VDDBOARD

@ AMDSMI_VOLT_TYPE_VDDBOARD

Voltage for VDDBOARD.

Definition: amdsmi.h:1417

AMDSMI_VOLT_TYPE_INVALID

@ AMDSMI_VOLT_TYPE_INVALID

Invalid type.

Definition: amdsmi.h:1419

AMDSMI_VOLT_TYPE_VDDGFX

@ AMDSMI_VOLT_TYPE_VDDGFX

Vddgfx GPU voltage.

Definition: amdsmi.h:1416

amdsmi_clk_limit_type_t

amdsmi_clk_limit_type_t

The clk limit type.

Definition: amdsmi.h:1482

CLK_LIMIT_MAX

@ CLK_LIMIT_MAX

Max Clock value in MHz.

Definition: amdsmi.h:1484

CLK_LIMIT_MIN

@ CLK_LIMIT_MIN

Min Clock value in MHz.

Definition: amdsmi.h:1483

amdsmi_processor_handle

void * amdsmi_processor_handle

opaque handler point to underlying implementation

Definition: amdsmi.h:246

amdsmi_cache_property_type_t

amdsmi_cache_property_type_t

cache properties

Definition: amdsmi.h:853

AMDSMI_CACHE_PROPERTY_ENABLED

@ AMDSMI_CACHE_PROPERTY_ENABLED

Cache enabled.

Definition: amdsmi.h:854

AMDSMI_CACHE_PROPERTY_INST_CACHE

@ AMDSMI_CACHE_PROPERTY_INST_CACHE

Instruction cache.

Definition: amdsmi.h:856

AMDSMI_CACHE_PROPERTY_DATA_CACHE

@ AMDSMI_CACHE_PROPERTY_DATA_CACHE

Data cache.

Definition: amdsmi.h:855

AMDSMI_CACHE_PROPERTY_SIMD_CACHE

@ AMDSMI_CACHE_PROPERTY_SIMD_CACHE

Single Instruction, Multiple Data Cache.

Definition: amdsmi.h:858

AMDSMI_CACHE_PROPERTY_CPU_CACHE

@ AMDSMI_CACHE_PROPERTY_CPU_CACHE

CPU cache.

Definition: amdsmi.h:857

amdsmi_status_t

amdsmi_status_t

Error codes returned by amdsmi functions.

Definition: amdsmi.h:297

AMDSMI_STATUS_NOT_INIT

@ AMDSMI_STATUS_NOT_INIT

Processor not initialized.

Definition: amdsmi.h:323

AMDSMI_STATUS_NON_AMD_CPU

@ AMDSMI_STATUS_NON_AMD_CPU

System has different cpu than AMD.

Definition: amdsmi.h:333

AMDSMI_STATUS_DIRECTORY_NOT_FOUND

@ AMDSMI_STATUS_DIRECTORY_NOT_FOUND

Error when a directory is not found, maps to ENOTDIR.

Definition: amdsmi.h:319

AMDSMI_STATUS_INVAL

@ AMDSMI_STATUS_INVAL

Invalid parameters.

Definition: amdsmi.h:300

AMDSMI_STATUS_BUSY

@ AMDSMI_STATUS_BUSY

Processor busy.

Definition: amdsmi.h:321

AMDSMI_STATUS_UNKNOWN_ERROR

@ AMDSMI_STATUS_UNKNOWN_ERROR

An unknown error occurred.

Definition: amdsmi.h:348

AMDSMI_STATUS_DRIVER_NOT_LOADED

@ AMDSMI_STATUS_DRIVER_NOT_LOADED

Processor driver not loaded.

Definition: amdsmi.h:325

AMDSMI_STATUS_FILE_ERROR

@ AMDSMI_STATUS_FILE_ERROR

Problem accessing a file.

Definition: amdsmi.h:313

AMDSMI_STATUS_DRM_ERROR

@ AMDSMI_STATUS_DRM_ERROR

Error when call libdrm.

Definition: amdsmi.h:305

AMDSMI_STATUS_CORRUPTED_EEPROM

@ AMDSMI_STATUS_CORRUPTED_EEPROM

EEPROM is corrupted.

Definition: amdsmi.h:345

AMDSMI_STATUS_ARG_PTR_NULL

@ AMDSMI_STATUS_ARG_PTR_NULL

Parsed argument is invalid.

Definition: amdsmi.h:342

AMDSMI_STATUS_IO

@ AMDSMI_STATUS_IO

I/O Error.

Definition: amdsmi.h:311

AMDSMI_STATUS_NO_HSMP_DRV

@ AMDSMI_STATUS_NO_HSMP_DRV

HSMP driver not found.

Definition: amdsmi.h:336

AMDSMI_STATUS_HSMP_TIMEOUT

@ AMDSMI_STATUS_HSMP_TIMEOUT

HSMP message timed out.

Definition: amdsmi.h:339

AMDSMI_STATUS_NO_DATA

@ AMDSMI_STATUS_NO_DATA

No data was found for a given input.

Definition: amdsmi.h:328

AMDSMI_STATUS_RETRY

@ AMDSMI_STATUS_RETRY

Retry operation.

Definition: amdsmi.h:308

AMDSMI_STATUS_UNEXPECTED_SIZE

@ AMDSMI_STATUS_UNEXPECTED_SIZE

An unexpected amount of data was read.

Definition: amdsmi.h:330

AMDSMI_STATUS_SETTING_UNAVAILABLE

@ AMDSMI_STATUS_SETTING_UNAVAILABLE

Setting is not available.

Definition: amdsmi.h:344

AMDSMI_STATUS_FILE_NOT_FOUND

@ AMDSMI_STATUS_FILE_NOT_FOUND

file or directory not found

Definition: amdsmi.h:341

AMDSMI_STATUS_INTERNAL_EXCEPTION

@ AMDSMI_STATUS_INTERNAL_EXCEPTION

An internal exception was caught.

Definition: amdsmi.h:315

AMDSMI_STATUS_NO_HSMP_SUP

@ AMDSMI_STATUS_NO_HSMP_SUP

HSMP not supported.

Definition: amdsmi.h:337

AMDSMI_STATUS_MAP_ERROR

@ AMDSMI_STATUS_MAP_ERROR

The internal library error did not map to a status code.

Definition: amdsmi.h:347

AMDSMI_STATUS_FAIL_LOAD_SYMBOL

@ AMDSMI_STATUS_FAIL_LOAD_SYMBOL

Fail to load symbol.

Definition: amdsmi.h:304

AMDSMI_STATUS_INSUFFICIENT_SIZE

@ AMDSMI_STATUS_INSUFFICIENT_SIZE

Not enough resources were available for the operation.

Definition: amdsmi.h:329

AMDSMI_STATUS_INIT_ERROR

@ AMDSMI_STATUS_INIT_ERROR

An error occurred when initializing internal data structures.

Definition: amdsmi.h:317

AMDSMI_STATUS_OUT_OF_RESOURCES

@ AMDSMI_STATUS_OUT_OF_RESOURCES

Not enough memory.

Definition: amdsmi.h:314

AMDSMI_STATUS_NO_SLOT

@ AMDSMI_STATUS_NO_SLOT

No more free slot.

Definition: amdsmi.h:324

AMDSMI_STATUS_NO_MSR_DRV

@ AMDSMI_STATUS_NO_MSR_DRV

MSR driver not found.

Definition: amdsmi.h:335

AMDSMI_STATUS_INTERRUPT

@ AMDSMI_STATUS_INTERRUPT

An interrupt occurred during execution of function.

Definition: amdsmi.h:310

AMDSMI_STATUS_SUCCESS

@ AMDSMI_STATUS_SUCCESS

Call succeeded.

Definition: amdsmi.h:298

AMDSMI_STATUS_NO_ENERGY_DRV

@ AMDSMI_STATUS_NO_ENERGY_DRV

Energy driver not found.

Definition: amdsmi.h:334

AMDSMI_STATUS_ADDRESS_FAULT

@ AMDSMI_STATUS_ADDRESS_FAULT

Bad address.

Definition: amdsmi.h:312

AMDSMI_STATUS_MORE_DATA

@ AMDSMI_STATUS_MORE_DATA

There is more data than the buffer size the user passed.

Definition: amdsmi.h:327

AMDSMI_STATUS_NOT_YET_IMPLEMENTED

@ AMDSMI_STATUS_NOT_YET_IMPLEMENTED

Not implemented yet.

Definition: amdsmi.h:302

AMDSMI_STATUS_NO_DRV

@ AMDSMI_STATUS_NO_DRV

No Energy and HSMP driver present.

Definition: amdsmi.h:340

AMDSMI_STATUS_NO_PERM

@ AMDSMI_STATUS_NO_PERM

Permission Denied.

Definition: amdsmi.h:309

AMDSMI_STATUS_NOT_FOUND

@ AMDSMI_STATUS_NOT_FOUND

Processor Not found.

Definition: amdsmi.h:322

AMDSMI_STATUS_FAIL_LOAD_MODULE

@ AMDSMI_STATUS_FAIL_LOAD_MODULE

Fail to load lib.

Definition: amdsmi.h:303

AMDSMI_STATUS_AMDGPU_RESTART_ERR

@ AMDSMI_STATUS_AMDGPU_RESTART_ERR

AMDGPU restart failed.

Definition: amdsmi.h:343

AMDSMI_STATUS_NOT_SUPPORTED

@ AMDSMI_STATUS_NOT_SUPPORTED

Command not supported.

Definition: amdsmi.h:301

AMDSMI_STATUS_UNEXPECTED_DATA

@ AMDSMI_STATUS_UNEXPECTED_DATA

The data read or provided to function is not what was expected.

Definition: amdsmi.h:331

AMDSMI_STATUS_API_FAILED

@ AMDSMI_STATUS_API_FAILED

API call failed.

Definition: amdsmi.h:306

AMDSMI_STATUS_TIMEOUT

@ AMDSMI_STATUS_TIMEOUT

Timeout in API call.

Definition: amdsmi.h:307

AMDSMI_STATUS_NO_HSMP_MSG_SUP

@ AMDSMI_STATUS_NO_HSMP_MSG_SUP

HSMP message/feature not supported.

Definition: amdsmi.h:338

AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS

@ AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS

The provided input is out of allowable or safe range.

Definition: amdsmi.h:316

AMDSMI_STATUS_REFCOUNT_OVERFLOW

@ AMDSMI_STATUS_REFCOUNT_OVERFLOW

An internal reference counter exceeded INT32_MAX.

Definition: amdsmi.h:318

AMDSMI_MAX_NUM_JPEG

#define AMDSMI_MAX_NUM_JPEG

This should match AMDSMI_MAX_NUM_JPEG (8*4=32)

Definition: amdsmi.h:147

amdsmi_cpusocket_handle

void * amdsmi_cpusocket_handle

opaque handler point to underlying implementation

Definition: amdsmi.h:256

amdsmi_affinity_scope_t

amdsmi_affinity_scope_t

Scope for Numa affinity or Socket affinity.

Definition: amdsmi.h:2121

amdsmi_temperature_metric_t

amdsmi_temperature_metric_t

Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values ...

Definition: amdsmi.h:1355

AMDSMI_TEMP_CRITICAL_HYST

@ AMDSMI_TEMP_CRITICAL_HYST

Definition: amdsmi.h:1366

AMDSMI_TEMP_CRITICAL

@ AMDSMI_TEMP_CRITICAL

Definition: amdsmi.h:1364

AMDSMI_TEMP_OFFSET

@ AMDSMI_TEMP_OFFSET

Definition: amdsmi.h:1378

AMDSMI_TEMP_EMERGENCY

@ AMDSMI_TEMP_EMERGENCY

Definition: amdsmi.h:1368

AMDSMI_TEMP_LOWEST

@ AMDSMI_TEMP_LOWEST

Historical min temperature.

Definition: amdsmi.h:1380

AMDSMI_TEMP_CRIT_MIN

@ AMDSMI_TEMP_CRIT_MIN

Definition: amdsmi.h:1374

AMDSMI_TEMP_SHUTDOWN

@ AMDSMI_TEMP_SHUTDOWN

Shutdown temperature.

Definition: amdsmi.h:1382

AMDSMI_TEMP_EMERGENCY_HYST

@ AMDSMI_TEMP_EMERGENCY_HYST

Definition: amdsmi.h:1372

AMDSMI_TEMP_CURRENT

@ AMDSMI_TEMP_CURRENT

Current temperature.

Definition: amdsmi.h:1356

AMDSMI_TEMP_MIN

@ AMDSMI_TEMP_MIN

Min temperature.

Definition: amdsmi.h:1359

AMDSMI_TEMP_HIGHEST

@ AMDSMI_TEMP_HIGHEST

Historical max temperature.

Definition: amdsmi.h:1381

AMDSMI_TEMP_CRIT_MIN_HYST

@ AMDSMI_TEMP_CRIT_MIN_HYST

Definition: amdsmi.h:1376

AMDSMI_TEMP_MIN_HYST

@ AMDSMI_TEMP_MIN_HYST

Definition: amdsmi.h:1362

AMDSMI_TEMP_MAX_HYST

@ AMDSMI_TEMP_MAX_HYST

Definition: amdsmi.h:1360

AMDSMI_TEMP_MAX

@ AMDSMI_TEMP_MAX

Max temperature.

Definition: amdsmi.h:1358

amdsmi_cper_sev_t

amdsmi_cper_sev_t

Cper sev.

Definition: amdsmi.h:1492

AMDSMI_CPER_SEV_NUM

@ AMDSMI_CPER_SEV_NUM

CPER severity Number.

Definition: amdsmi.h:1496

AMDSMI_CPER_SEV_NON_FATAL_CORRECTED

@ AMDSMI_CPER_SEV_NON_FATAL_CORRECTED

CPER Non-Fatal Corrected severity.

Definition: amdsmi.h:1495

AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED

@ AMDSMI_CPER_SEV_NON_FATAL_UNCORRECTED

CPER Non-Fatal Uncorrected severity.

Definition: amdsmi.h:1493

AMDSMI_CPER_SEV_FATAL

@ AMDSMI_CPER_SEV_FATAL

CPER Fatal severity.

Definition: amdsmi.h:1494

AMDSMI_CPER_SEV_UNUSED

@ AMDSMI_CPER_SEV_UNUSED

CPER Unused severity.

Definition: amdsmi.h:1497

amdsmi_gpu_block_t

amdsmi_gpu_block_t

This enum is used to identify different GPU blocks.

Definition: amdsmi.h:1451

AMDSMI_GPU_BLOCK_XGMI_WAFL

@ AMDSMI_GPU_BLOCK_XGMI_WAFL

XGMI block.

Definition: amdsmi.h:1461

AMDSMI_GPU_BLOCK_GFX

@ AMDSMI_GPU_BLOCK_GFX

GFX block.

Definition: amdsmi.h:1456

AMDSMI_GPU_BLOCK_IH

@ AMDSMI_GPU_BLOCK_IH

IH block.

Definition: amdsmi.h:1471

AMDSMI_GPU_BLOCK_VCN

@ AMDSMI_GPU_BLOCK_VCN

VCN block.

Definition: amdsmi.h:1469

AMDSMI_GPU_BLOCK_INVALID

@ AMDSMI_GPU_BLOCK_INVALID

Invalid block.

Definition: amdsmi.h:1452

AMDSMI_GPU_BLOCK_MP0

@ AMDSMI_GPU_BLOCK_MP0

MP0 block.

Definition: amdsmi.h:1465

AMDSMI_GPU_BLOCK_HDP

@ AMDSMI_GPU_BLOCK_HDP

HDP block.

Definition: amdsmi.h:1460

AMDSMI_GPU_BLOCK_MPIO

@ AMDSMI_GPU_BLOCK_MPIO

MPIO block.

Definition: amdsmi.h:1472

AMDSMI_GPU_BLOCK_ATHUB

@ AMDSMI_GPU_BLOCK_ATHUB

ATHUB block.

Definition: amdsmi.h:1458

AMDSMI_GPU_BLOCK_MP1

@ AMDSMI_GPU_BLOCK_MP1

MP1 block.

Definition: amdsmi.h:1466

AMDSMI_GPU_BLOCK_PCIE_BIF

@ AMDSMI_GPU_BLOCK_PCIE_BIF

PCIE_BIF block.

Definition: amdsmi.h:1459

AMDSMI_GPU_BLOCK_SDMA

@ AMDSMI_GPU_BLOCK_SDMA

SDMA block.

Definition: amdsmi.h:1455

AMDSMI_GPU_BLOCK_JPEG

@ AMDSMI_GPU_BLOCK_JPEG

JPEG block.

Definition: amdsmi.h:1470

AMDSMI_GPU_BLOCK_UMC

@ AMDSMI_GPU_BLOCK_UMC

UMC block.

Definition: amdsmi.h:1454

AMDSMI_GPU_BLOCK_FUSE

@ AMDSMI_GPU_BLOCK_FUSE

Fuse block.

Definition: amdsmi.h:1467

AMDSMI_GPU_BLOCK_DF

@ AMDSMI_GPU_BLOCK_DF

DF block.

Definition: amdsmi.h:1462

AMDSMI_GPU_BLOCK_MMHUB

@ AMDSMI_GPU_BLOCK_MMHUB

MMHUB block.

Definition: amdsmi.h:1457

AMDSMI_GPU_BLOCK_SMN

@ AMDSMI_GPU_BLOCK_SMN

SMN block.

Definition: amdsmi.h:1463

AMDSMI_GPU_BLOCK_SEM

@ AMDSMI_GPU_BLOCK_SEM

SEM block.

Definition: amdsmi.h:1464

AMDSMI_GPU_BLOCK_MCA

@ AMDSMI_GPU_BLOCK_MCA

MCA block.

Definition: amdsmi.h:1468

amdsmi_temperature_type_t

amdsmi_temperature_type_t

This enumeration is used to indicate from which part of the processor a temperature reading should be...

Definition: amdsmi.h:456

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_D_VR

OAM X 0.4V HBM D voltage regulator temperature.

Definition: amdsmi.h:476

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD3

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD3

VDDCR VDD3 voltage regulator temperature.

Definition: amdsmi.h:485

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_HSC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_HSC

OAM 0-1 HSC temperature.

Definition: amdsmi.h:507

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_A

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_A

VDDCR SOC A voltage regulator temperature.

Definition: amdsmi.h:486

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_6_7_HSC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_6_7_HSC

OAM 6-7 HSC temperature.

Definition: amdsmi.h:510

AMDSMI_TEMPERATURE_TYPE_HBM_2

@ AMDSMI_TEMPERATURE_TYPE_HBM_2

High Bandwidth 2 temperature per stack.

Definition: amdsmi.h:464

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC_2

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC_2

OAM X IBC 2 temperature.

Definition: amdsmi.h:473

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_0V9_VR

Retimer 4-5 0.9V voltage regulator temperature.

Definition: amdsmi.h:516

AMDSMI_TEMPERATURE_TYPE_HOTSPOT

@ AMDSMI_TEMPERATURE_TYPE_HOTSPOT

Hottest temperature reported for entire die.

Definition: amdsmi.h:459

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_085_HBM

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_085_HBM

VDD 0.85V HBM voltage regulator temperature.

Definition: amdsmi.h:490

AMDSMI_TEMPERATURE_TYPE_HBM_0

@ AMDSMI_TEMPERATURE_TYPE_HBM_0

High Bandwidth 0 temperature per stack.

Definition: amdsmi.h:462

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD2

VDDCR VDD2 voltage regulator temperature.

Definition: amdsmi.h:484

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_IBC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_IBC

UBB IBC temperature.

Definition: amdsmi.h:504

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_D

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_D

VDDCR 1.1V HBM D voltage regulator temperature.

Definition: amdsmi.h:492

AMDSMI_TEMPERATURE_TYPE_JUNCTION

@ AMDSMI_TEMPERATURE_TYPE_JUNCTION

Synonymous with HOTSPOT.

Definition: amdsmi.h:460

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_4_5_6_7_1V2_VR

Retimer 4-5-6-7 1.2V voltage regulator temperature.

Definition: amdsmi.h:514

AMDSMI_TEMPERATURE_TYPE_HBM_3

@ AMDSMI_TEMPERATURE_TYPE_HBM_3

High Bandwidth 3 temperature per stack.

Definition: amdsmi.h:465

AMDSMI_TEMPERATURE_TYPE_VRAM

@ AMDSMI_TEMPERATURE_TYPE_VRAM

VRAM temperature on graphics card.

Definition: amdsmi.h:461

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_2_3_HSC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_2_3_HSC

OAM 2-3 HSC temperature.

Definition: amdsmi.h:508

AMDSMI_TEMPERATURE_TYPE_EDGE

@ AMDSMI_TEMPERATURE_TYPE_EDGE

Edge temperature.

Definition: amdsmi.h:457

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_UFPGA

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_UFPGA

UBB UFPGA temperature.

Definition: amdsmi.h:505

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_USR

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDD_USR

VDD USR voltage regulator temperature.

Definition: amdsmi.h:493

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_04_HBM_B_VR

OAM X 0.4V HBM B voltage regulator temperature.

Definition: amdsmi.h:475

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_C

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOC_C

VDDCR SOC C voltage regulator temperature.

Definition: amdsmi.h:487

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_A

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_A

VDDCR SOCIO A voltage regulator temperature.

Definition: amdsmi.h:488

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC_HSC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC_HSC

IBC HSC temperature.

Definition: amdsmi.h:521

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_HSC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_HSC

OAM 4-5 HSC temperature.

Definition: amdsmi.h:509

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_2_3_0V9_VR

Retimer 2-3 0.9V voltage regulator temperature.

Definition: amdsmi.h:517

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD1

VDDCR VDD1 voltage regulator temperature.

Definition: amdsmi.h:483

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_C

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_SOCIO_C

VDDCR SOCIO C voltage regulator temperature.

Definition: amdsmi.h:489

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_0V9_VR

Retimer 0-1 0.9V voltage regulator temperature.

Definition: amdsmi.h:515

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_VDD0

VDDCR VDD0 voltage regulator temperature.

Definition: amdsmi.h:481

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_0V72_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_0V72_VR

UBB FPGA 0.72V voltage regulator temperature.

Definition: amdsmi.h:511

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_3V3_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA_3V3_VR

UBB FPGA 3.3V voltage regulator temperature.

Definition: amdsmi.h:512

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDIO_11_E32

VDDIO 1.1V E32 voltage regulator temperature.

Definition: amdsmi.h:494

AMDSMI_TEMPERATURE_TYPE_PLX

@ AMDSMI_TEMPERATURE_TYPE_PLX

PCIe switch temperature.

Definition: amdsmi.h:466

AMDSMI_TEMPERATURE_TYPE_HBM_1

@ AMDSMI_TEMPERATURE_TYPE_HBM_1

High Bandwidth 1 temperature per stack.

Definition: amdsmi.h:463

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM7

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM7

UBB OAM7 temperature.

Definition: amdsmi.h:503

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_0_1_2_3_3V3_VR

OAM 0-1-2-3 3.3V voltage regulator temperature.

Definition: amdsmi.h:519

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_B

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_VDDCR_11_HBM_B

VDDCR 1.1V HBM B voltage regulator temperature.

Definition: amdsmi.h:491

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_BACK

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_BACK

UBB back temperature.

Definition: amdsmi.h:502

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FPGA

UBB FPGA temperature.

Definition: amdsmi.h:499

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_RETIMER_X

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_RETIMER_X

Retimer X temperature.

Definition: amdsmi.h:470

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_IBC

IBC temperature.

Definition: amdsmi.h:522

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_VDD18_VR

OAM X VDD 1.8V voltage regulator temperature.

Definition: amdsmi.h:474

AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC

@ AMDSMI_TEMPERATURE_TYPE_GPUBOARD_NODE_OAM_X_IBC

OAM X IBC temperature.

Definition: amdsmi.h:472

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_0_1_2_3_1V2_VR

Retimer 0-1-2-3 1.2V voltage regulator temperature.

Definition: amdsmi.h:513

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FRONT

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_FRONT

UBB front temperature.

Definition: amdsmi.h:501

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_RETIMER_6_7_0V9_VR

Retimer 6-7 0.9V voltage regulator temperature.

Definition: amdsmi.h:518

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_OAM_4_5_6_7_3V3_VR

OAM 4-5-6-7 3.3V voltage regulator temperature.

Definition: amdsmi.h:520

AMDSMI_TEMPERATURE_TYPE__MAX

@ AMDSMI_TEMPERATURE_TYPE__MAX

Maximum per GPU temperature type.

Definition: amdsmi.h:524

AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM1

@ AMDSMI_TEMPERATURE_TYPE_BASEBOARD_UBB_OAM1

UBB OAM1 temperature.

Definition: amdsmi.h:506

AMDSMI_MAX_NUM_FREQUENCIES

#define AMDSMI_MAX_NUM_FREQUENCIES

Definition: amdsmi.h:1179

amdsmi_counter_command_t

amdsmi_counter_command_t

Event counter commands.

Definition: amdsmi.h:1290

AMDSMI_CNTR_CMD_STOP

@ AMDSMI_CNTR_CMD_STOP

Definition: amdsmi.h:1292

AMDSMI_CNTR_CMD_START

@ AMDSMI_CNTR_CMD_START

Start the counter.

Definition: amdsmi.h:1291

amdsmi_xgmi_link_status_type_t

amdsmi_xgmi_link_status_type_t

XGMI Link Status Type.

Definition: amdsmi.h:2012

AMDSMI_XGMI_LINK_UP

@ AMDSMI_XGMI_LINK_UP

XGMI link status is up.

Definition: amdsmi.h:2014

AMDSMI_XGMI_LINK_DOWN

@ AMDSMI_XGMI_LINK_DOWN

XGMI link status is down.

Definition: amdsmi.h:2013

AMDSMI_XGMI_LINK_DISABLE

@ AMDSMI_XGMI_LINK_DISABLE

XGMI link status is disabled.

Definition: amdsmi.h:2015

amdsmi_power_profile_preset_masks_t

amdsmi_power_profile_preset_masks_t

Pre-set Profile Selections. These bitmasks can be AND'd with the amdsmi_power_profile_status_t....

Definition: amdsmi.h:1430

AMDSMI_PWR_PROF_PRST_COMPUTE_MASK

@ AMDSMI_PWR_PROF_PRST_COMPUTE_MASK

Compute Saving Profile.

Definition: amdsmi.h:1434

AMDSMI_PWR_PROF_PRST_POWER_SAVING_MASK

@ AMDSMI_PWR_PROF_PRST_POWER_SAVING_MASK

Power Saving Profile.

Definition: amdsmi.h:1433

AMDSMI_PWR_PROF_PRST_VIDEO_MASK

@ AMDSMI_PWR_PROF_PRST_VIDEO_MASK

Video Power Profile.

Definition: amdsmi.h:1432

AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT

@ AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT

Default Boot Up Profile.

Definition: amdsmi.h:1439

AMDSMI_PWR_PROF_PRST_INVALID

@ AMDSMI_PWR_PROF_PRST_INVALID

Invalid Power Profile.

Definition: amdsmi.h:1443

AMDSMI_PWR_PROF_PRST_CUSTOM_MASK

@ AMDSMI_PWR_PROF_PRST_CUSTOM_MASK

Custom Power Profile.

Definition: amdsmi.h:1431

AMDSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK

@ AMDSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK

3D Full Screen Profile

Definition: amdsmi.h:1438

AMDSMI_PWR_PROF_PRST_VR_MASK

@ AMDSMI_PWR_PROF_PRST_VR_MASK

VR Power Profile.

Definition: amdsmi.h:1435

AMDSMI_MAX_NUM_GFX_CLKS

#define AMDSMI_MAX_NUM_GFX_CLKS

This should match MAX_NUM_GFX_CLKS.

Definition: amdsmi.h:126

AMDSMI_NUM_VOLTAGE_CURVE_POINTS

#define AMDSMI_NUM_VOLTAGE_CURVE_POINTS

Definition: amdsmi.h:1188

amdsmi_compute_partition_type_t

amdsmi_compute_partition_type_t

Compute Partition. This enum is used to identify various compute partitioning settings.

Definition: amdsmi.h:414

AMDSMI_COMPUTE_PARTITION_QPX

@ AMDSMI_COMPUTE_PARTITION_QPX

Definition: amdsmi.h:422

AMDSMI_COMPUTE_PARTITION_TPX

@ AMDSMI_COMPUTE_PARTITION_TPX

Definition: amdsmi.h:420

AMDSMI_COMPUTE_PARTITION_CPX

@ AMDSMI_COMPUTE_PARTITION_CPX

Definition: amdsmi.h:424

AMDSMI_COMPUTE_PARTITION_SPX

@ AMDSMI_COMPUTE_PARTITION_SPX

Definition: amdsmi.h:416

AMDSMI_COMPUTE_PARTITION_DPX

@ AMDSMI_COMPUTE_PARTITION_DPX

Definition: amdsmi.h:418

AMDSMI_COMPUTE_PARTITION_INVALID

@ AMDSMI_COMPUTE_PARTITION_INVALID

Invalid compute partition type.

Definition: amdsmi.h:415

AMDSMI_MAX_NUM_VCN

#define AMDSMI_MAX_NUM_VCN

This should match MAX_NUM_VCN.

Definition: amdsmi.h:105

amdsmi_set_gpu_accelerator_partition_profile

amdsmi_status_t amdsmi_set_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, uint32_t profile_index)

Version 2.0: Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator...

amdsmi_get_gpu_accelerator_partition_profile_config

amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile_config(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_config_t *profile_config)

Version 2.0: Returns gpu accelerator partition caps as currently configured in the system User must u...

amdsmi_get_gpu_accelerator_partition_profile

amdsmi_status_t amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle, amdsmi_accelerator_partition_profile_t *profile, uint32_t *partition_id)

Version 2.0: Returns gpu accelerator partition caps as currently configured in the system User must u...

amdsmi_get_power_cap_info

amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info)

Returns the power caps as currently configured in the system. Power in units of uW....

amdsmi_get_pcie_info

amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info)

Returns the PCIe info for the GPU.

amdsmi_get_gpu_vram_info

amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info)

Returns vram info.

amdsmi_get_gpu_xcd_counter

amdsmi_status_t amdsmi_get_gpu_xcd_counter(amdsmi_processor_handle processor_handle, uint16_t *xcd_count)

Returns the 'xcd_counter' from the GPU metrics associated with the device.

amdsmi_get_gpu_kfd_info

amdsmi_status_t amdsmi_get_gpu_kfd_info(amdsmi_processor_handle processor_handle, amdsmi_kfd_info_t *info)

Returns the KFD (Kernel Fusion Driver) information for the device.

amdsmi_get_gpu_board_info

amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info)

Returns the board part number and board information for the requested device.

amdsmi_get_gpu_asic_info

amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info)

Returns the ASIC information for the device.

amdsmi_get_cpu_current_io_bandwidth

amdsmi_status_t amdsmi_get_cpu_current_io_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *io_bw)

Get current input output bandwidth.

amdsmi_get_cpu_current_xgmi_bw

amdsmi_status_t amdsmi_get_cpu_current_xgmi_bw(amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *xgmi_bw)

Get current input output bandwidth.

amdsmi_get_cpu_family

amdsmi_status_t amdsmi_get_cpu_family(uint32_t *cpu_family)

Get CPU family.

amdsmi_get_cpu_model_name

amdsmi_status_t amdsmi_get_cpu_model_name(amdsmi_processor_handle processor_handle, amdsmi_cpu_info_t *cpu_info)

Retrieve the CPU processor model name based on the processor index.

amdsmi_first_online_core_on_cpu_socket

amdsmi_status_t amdsmi_first_online_core_on_cpu_socket(amdsmi_processor_handle processor_handle, uint32_t *pcore_ind)

Get first online core on socket.

amdsmi_get_cpu_socket_count

amdsmi_status_t amdsmi_get_cpu_socket_count(uint32_t *sock_count)

Get CPU socket count from sys filesystem.

amdsmi_get_cpu_model

amdsmi_status_t amdsmi_get_cpu_model(uint32_t *cpu_model)

Get CPU model.

amdsmi_get_cpu_cores_per_socket

amdsmi_status_t amdsmi_get_cpu_cores_per_socket(uint32_t sock_count, amdsmi_sock_info_t *soc_info)

Get cpu cores per socket from sys filesystem.

amdsmi_get_esmi_err_msg

amdsmi_status_t amdsmi_get_esmi_err_msg(amdsmi_status_t status, const char **status_string)

Get a description of provided AMDSMI error status for esmi errors.

amdsmi_get_xgmi_plpd

amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd)

Get the xgmi per-link power down policy parameter for the processor.

amdsmi_set_xgmi_plpd

amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t policy_id)

Set the xgmi per-link power down policy parameter for the processor.

amdsmi_clean_gpu_local_data

amdsmi_status_t amdsmi_clean_gpu_local_data(amdsmi_processor_handle processor_handle)

Run the cleaner shader to clean up data in LDS/GPRs.

amdsmi_set_gpu_perf_level

amdsmi_status_t amdsmi_set_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t perf_lvl)

Set the PowerPlay performance level associated with the device with provided processor handle with th...

amdsmi_get_soc_pstate

amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy)

Get the soc pstate policy for the processor.

amdsmi_set_gpu_overdrive_level

amdsmi_status_t amdsmi_set_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t od)

Set the overdrive percent associated with the device with provided processor handle with the provided...

amdsmi_set_gpu_process_isolation

amdsmi_status_t amdsmi_set_gpu_process_isolation(amdsmi_processor_handle processor_handle, uint32_t pisolate)

Enable/disable the system Process Isolation.

amdsmi_set_soc_pstate

amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id)

Set the soc pstate policy for the processor.

amdsmi_get_gpu_process_isolation

amdsmi_status_t amdsmi_get_gpu_process_isolation(amdsmi_processor_handle processor_handle, uint32_t *pisolate)

Get the status of the Process Isolation.

amdsmi_set_clk_freq

amdsmi_status_t amdsmi_set_clk_freq(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, uint64_t freq_bitmask)

Control the set of allowed frequencies that can be used for the specified clock. It is not supported ...

amdsmi_get_gpu_metrics_info

amdsmi_status_t amdsmi_get_gpu_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics)

This function retrieves the gpu metrics information. It is not supported on virtual machine guest.

amdsmi_get_gpu_power_profile_presets

amdsmi_status_t amdsmi_get_gpu_power_profile_presets(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_profile_status_t *status)

Get the list of available preset power profiles and an indication of which profile is currently activ...

amdsmi_get_gpu_busy_percent

amdsmi_status_t amdsmi_get_gpu_busy_percent(amdsmi_processor_handle processor_handle, uint32_t *gpu_busy_percent)

Get GPU busy percent from gpu_busy_percent sysfs file.

amdsmi_set_gpu_clk_limit

amdsmi_status_t amdsmi_set_gpu_clk_limit(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_limit_type_t limit_type, uint64_t clk_value)

This function sets the clock sets the clock min/max level.

amdsmi_get_gpu_pm_metrics_info

amdsmi_status_t amdsmi_get_gpu_pm_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_name_value_t **pm_metrics, uint32_t *num_of_metrics)

Get the pm metrics table with provided device index.

amdsmi_get_utilization_count

amdsmi_status_t amdsmi_get_utilization_count(amdsmi_processor_handle processor_handle, amdsmi_utilization_counter_t utilization_counters[], uint32_t count, uint64_t *timestamp)

Get coarse grain utilization counter of the specified device.

amdsmi_get_gpu_metrics_header_info

amdsmi_status_t amdsmi_get_gpu_metrics_header_info(amdsmi_processor_handle processor_handle, amd_metrics_table_header_t *header_value)

Get the 'metrics_header_info' from the GPU metrics associated with the device.

amdsmi_reset_gpu

amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle)

Reset the gpu associated with the device with provided processor handle. It is not supported on virtu...

amdsmi_set_gpu_od_volt_info

amdsmi_status_t amdsmi_set_gpu_od_volt_info(amdsmi_processor_handle processor_handle, uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue)

This function sets 1 of the 3 voltage curve points. It is not supported on virtual machine guest.

amdsmi_set_gpu_clk_range

amdsmi_status_t amdsmi_set_gpu_clk_range(amdsmi_processor_handle processor_handle, uint64_t minclkvalue, uint64_t maxclkvalue, amdsmi_clk_type_t clkType)

This function sets the clock range information. It is not supported on virtual machine guest.

amdsmi_get_gpu_mem_overdrive_level

amdsmi_status_t amdsmi_get_gpu_mem_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od)

Get the GPU memory clock overdrive percent associated with the device with provided processor handle....

amdsmi_get_clk_freq

amdsmi_status_t amdsmi_get_clk_freq(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_frequencies_t *f)

Get the list of possible system clock speeds of device for a specified clock type....

amdsmi_get_gpu_perf_level

amdsmi_status_t amdsmi_get_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t *perf)

Get the performance level of the device. It is not supported on virtual machine guest.

amdsmi_set_gpu_perf_determinism_mode

amdsmi_status_t amdsmi_set_gpu_perf_determinism_mode(amdsmi_processor_handle processor_handle, uint64_t clkvalue)

Enter performance determinism mode with provided processor handle. It is not supported on virtual mac...

amdsmi_get_gpu_od_volt_info

amdsmi_status_t amdsmi_get_gpu_od_volt_info(amdsmi_processor_handle processor_handle, amdsmi_od_volt_freq_data_t *odv)

This function retrieves the overdrive GFX & MCLK information. If valid for the GPU it will also popul...

amdsmi_get_gpu_od_volt_curve_regions

amdsmi_status_t amdsmi_get_gpu_od_volt_curve_regions(amdsmi_processor_handle processor_handle, uint32_t *num_regions, amdsmi_freq_volt_region_t *buffer)

This function will retrieve the current valid regions in the frequency/voltage space....

amdsmi_get_gpu_reg_table_info

amdsmi_status_t amdsmi_get_gpu_reg_table_info(amdsmi_processor_handle processor_handle, amdsmi_reg_type_t reg_type, amdsmi_name_value_t **reg_metrics, uint32_t *num_of_metrics)

Get the register metrics table with provided device index and register type.

amdsmi_get_gpu_overdrive_level

amdsmi_status_t amdsmi_get_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od)

Get the overdrive percent associated with the device with provided processor handle....

amdsmi_set_gpu_od_clk_info

amdsmi_status_t amdsmi_set_gpu_od_clk_info(amdsmi_processor_handle processor_handle, amdsmi_freq_ind_t level, uint64_t clkvalue, amdsmi_clk_type_t clkType)

This function sets the clock frequency information. It is not supported on virtual machine guest.

amdsmi_set_gpu_compute_partition

amdsmi_status_t amdsmi_set_gpu_compute_partition(amdsmi_processor_handle processor_handle, amdsmi_compute_partition_type_t compute_partition)

Modifies a selected device's compute partition setting.

amdsmi_get_gpu_compute_partition

amdsmi_status_t amdsmi_get_gpu_compute_partition(amdsmi_processor_handle processor_handle, char *compute_partition, uint32_t len)

Retrieves the current compute partitioning for a desired device.

amdsmi_get_cpu_ddr_bw

amdsmi_status_t amdsmi_get_cpu_ddr_bw(amdsmi_processor_handle processor_handle, amdsmi_ddr_bw_metrics_t *ddr_bw)

Get the DDR bandwidth data.

amdsmi_get_cpu_dimm_power_consumption

amdsmi_status_t amdsmi_get_cpu_dimm_power_consumption(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_power_t *dimm_pow)

Get DIMM power consumption.

amdsmi_get_cpu_dimm_temp_range_and_refresh_rate

amdsmi_status_t amdsmi_get_cpu_dimm_temp_range_and_refresh_rate(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_temp_range_refresh_rate_t *rate)

Get DIMM temperature range and refresh rate.

amdsmi_get_cpu_dimm_thermal_sensor

amdsmi_status_t amdsmi_get_cpu_dimm_thermal_sensor(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_thermal_t *dimm_temp)

Get DIMM thermal sensor value.

amdsmi_gpu_driver_reload

amdsmi_status_t amdsmi_gpu_driver_reload(void)

Restart the device driver (kmod module) for all AMD GPUs on the system.

amdsmi_get_gpu_total_ecc_count

amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec)

Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU....

amdsmi_get_gpu_ecc_count

amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec)

Retrieve the error counts for a GPU block. It is not supported on virtual machine guest.

amdsmi_get_gpu_ecc_enabled

amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks)

Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest.

amdsmi_get_gpu_cper_entries

amdsmi_status_t amdsmi_get_gpu_cper_entries(amdsmi_processor_handle processor_handle, uint32_t severity_mask, char *cper_data, uint64_t *buf_size, amdsmi_cper_hdr_t **cper_hdrs, uint64_t *entry_count, uint64_t *cursor)

Retrieve CPER entries cached in the driver.

amdsmi_get_cpu_socket_energy

amdsmi_status_t amdsmi_get_cpu_socket_energy(amdsmi_processor_handle processor_handle, uint64_t *penergy)

Get the socket energy for a given socket.

amdsmi_get_cpu_core_energy

amdsmi_status_t amdsmi_get_cpu_core_energy(amdsmi_processor_handle processor_handle, uint64_t *penergy)

Get the core energy for a given core.

amdsmi_status_code_to_string

amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string)

Get a description of a provided AMDSMI error status.

amdsmi_get_gpu_ecc_status

amdsmi_status_t amdsmi_get_gpu_ecc_status(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state)

Retrieve the ECC status for a GPU block. It is not supported on virtual machine guest.

amdsmi_set_gpu_event_notification_mask

amdsmi_status_t amdsmi_set_gpu_event_notification_mask(amdsmi_processor_handle processor_handle, uint64_t mask)

Specify which events to collect for a device.

amdsmi_stop_gpu_event_notification

amdsmi_status_t amdsmi_stop_gpu_event_notification(amdsmi_processor_handle processor_handle)

Close any file handles and free any resources used by event notification for a GPU.

amdsmi_init_gpu_event_notification

amdsmi_status_t amdsmi_init_gpu_event_notification(amdsmi_processor_handle processor_handle)

Prepare to collect event notifications for a GPU.

amdsmi_get_gpu_event_notification

amdsmi_status_t amdsmi_get_gpu_event_notification(int timeout_ms, uint32_t *num_elem, amdsmi_evt_notification_data_t *data)

Collect event notifications, waiting a specified amount of time.

amdsmi_get_gpu_vbios_info

amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info)

Returns the static information for the vBIOS on the device.

amdsmi_get_fw_info

amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info)

Returns the firmware versions running on the device.

amdsmi_set_cpu_gmi3_link_width_range

amdsmi_status_t amdsmi_set_cpu_gmi3_link_width_range(amdsmi_processor_handle processor_handle, uint8_t min_link_width, uint8_t max_link_width)

Set gmi3 link width range.

amdsmi_get_power_info

amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info)

Returns the current power and voltage of the GPU.

amdsmi_get_gpu_vram_usage

amdsmi_status_t amdsmi_get_gpu_vram_usage(amdsmi_processor_handle processor_handle, amdsmi_vram_usage_t *info)

Returns the VRAM usage (both total and used memory) in MegaBytes.

amdsmi_get_gpu_activity

amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info)

Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentag...

amdsmi_get_clock_info

amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info)

Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory....

amdsmi_get_violation_status

amdsmi_status_t amdsmi_get_violation_status(amdsmi_processor_handle processor_handle, amdsmi_violation_status_t *info)

Returns the violations for a processor.

amdsmi_is_gpu_power_management_enabled

amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled)

Returns is power management enabled.

amdsmi_get_hsmp_metrics_table

amdsmi_status_t amdsmi_get_hsmp_metrics_table(amdsmi_processor_handle processor_handle, amdsmi_hsmp_metrics_table_t *metrics_table)

Get HSMP metrics table.

amdsmi_get_hsmp_metrics_table_version

amdsmi_status_t amdsmi_get_hsmp_metrics_table_version(amdsmi_processor_handle processor_handle, uint32_t *metrics_version)

Get HSMP metrics table version.

amdsmi_get_cpu_fclk_mclk

amdsmi_status_t amdsmi_get_cpu_fclk_mclk(amdsmi_processor_handle processor_handle, uint32_t *fclk, uint32_t *mclk)

Get Data fabric clock and Memory clock in MHz.

amdsmi_get_cpu_prochot_status

amdsmi_status_t amdsmi_get_cpu_prochot_status(amdsmi_processor_handle processor_handle, uint32_t *prochot)

Get normalized status of the processor's PROCHOT status.

amdsmi_get_cpu_hsmp_driver_version

amdsmi_status_t amdsmi_get_cpu_hsmp_driver_version(amdsmi_processor_handle processor_handle, amdsmi_hsmp_driver_version_t *amdsmi_hsmp_driver_ver)

Get HSMP Driver Version.

amdsmi_get_cpu_hsmp_proto_ver

amdsmi_status_t amdsmi_get_cpu_hsmp_proto_ver(amdsmi_processor_handle processor_handle, uint32_t *proto_ver)

Get HSMP protocol Version.

amdsmi_get_cpu_smu_fw_version

amdsmi_status_t amdsmi_get_cpu_smu_fw_version(amdsmi_processor_handle processor_handle, amdsmi_smu_fw_version_t *amdsmi_smu_fw)

Get SMU Firmware Version.

amdsmi_get_cpu_socket_current_active_freq_limit

amdsmi_status_t amdsmi_get_cpu_socket_current_active_freq_limit(amdsmi_processor_handle processor_handle, uint16_t *freq, char **src_type)

Get current active frequency limit of the socket.

amdsmi_get_cpu_core_current_freq_limit

amdsmi_status_t amdsmi_get_cpu_core_current_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *freq)

Get socket frequency limit of the core.

amdsmi_get_threads_per_core

amdsmi_status_t amdsmi_get_threads_per_core(uint32_t *threads_per_core)

Get Number of threads Per Core.

amdsmi_get_cpu_socket_freq_range

amdsmi_status_t amdsmi_get_cpu_socket_freq_range(amdsmi_processor_handle processor_handle, uint16_t *fmax, uint16_t *fmin)

Get socket frequency range.

amdsmi_get_cpu_cclk_limit

amdsmi_status_t amdsmi_get_cpu_cclk_limit(amdsmi_processor_handle processor_handle, uint32_t *cclk)

Get core clock in MHz.

amdsmi_topo_get_link_type

amdsmi_status_t amdsmi_topo_get_link_type(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *hops, amdsmi_link_type_t *type)

Retrieve the hops and the connection type between 2 GPUs.

amdsmi_topo_get_numa_node_number

amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node)

Retrieve the NUMA CPU node number for a device.

amdsmi_get_minmax_bandwidth_between_processors

amdsmi_status_t amdsmi_get_minmax_bandwidth_between_processors(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *min_bandwidth, uint64_t *max_bandwidth)

Retreive minimal and maximal io link bandwidth between 2 GPUs.

amdsmi_is_P2P_accessible

amdsmi_status_t amdsmi_is_P2P_accessible(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, bool *accessible)

Return P2P availability status between 2 GPUs.

amdsmi_get_link_metrics

amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics)

Return link metric information.

amdsmi_topo_get_p2p_status

amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_link_type_t *type, amdsmi_p2p_capability_t *cap)

Retrieve connection type and P2P capabilities between 2 GPUs.

amdsmi_topo_get_link_weight

amdsmi_status_t amdsmi_topo_get_link_weight(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *weight)

Retrieve the weight for a connection between 2 GPUs.

amdsmi_get_link_topology_nearest

amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info)

Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level.

amdsmi_get_gpu_subsystem_name

amdsmi_status_t amdsmi_get_gpu_subsystem_name(amdsmi_processor_handle processor_handle, char *name, size_t len)

Get the name string for the device subsytem.

amdsmi_get_gpu_revision

amdsmi_status_t amdsmi_get_gpu_revision(amdsmi_processor_handle processor_handle, uint16_t *revision)

Get the device revision associated with the device.

amdsmi_get_gpu_vendor_name

amdsmi_status_t amdsmi_get_gpu_vendor_name(amdsmi_processor_handle processor_handle, char *name, size_t len)

Get the name string for a give vendor ID.

amdsmi_get_gpu_id

amdsmi_status_t amdsmi_get_gpu_id(amdsmi_processor_handle processor_handle, uint16_t *id)

Get the device id associated with the device with provided device handler.

amdsmi_get_gpu_vram_vendor

amdsmi_status_t amdsmi_get_gpu_vram_vendor(amdsmi_processor_handle processor_handle, char *brand, uint32_t len)

Get the vram vendor string of a device.

amdsmi_get_gpu_subsystem_id

amdsmi_status_t amdsmi_get_gpu_subsystem_id(amdsmi_processor_handle processor_handle, uint16_t *id)

Get the subsystem device id associated with the device with provided processor handle.

amdsmi_shut_down

amdsmi_status_t amdsmi_shut_down(void)

Shutdown the AMD SMI library.

amdsmi_init

amdsmi_status_t amdsmi_init(uint64_t init_flags)

Initialize the AMD SMI library.

amdsmi_get_gpu_memory_partition_config

amdsmi_status_t amdsmi_get_gpu_memory_partition_config(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_config_t *config)

Version 2.0: Returns current gpu memory partition capabilities.

amdsmi_set_gpu_memory_partition_mode

amdsmi_status_t amdsmi_set_gpu_memory_partition_mode(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t mode)

Version 2.0: Set accelerator partition setting based on profile_index from amdsmi_get_gpu_accelerator...

amdsmi_get_gpu_memory_partition

amdsmi_status_t amdsmi_get_gpu_memory_partition(amdsmi_processor_handle processor_handle, char *memory_partition, uint32_t len)

Retrieves the current memory partition for a desired device.

amdsmi_set_gpu_memory_partition

amdsmi_status_t amdsmi_set_gpu_memory_partition(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t memory_partition)

Modifies a selected device's current memory partition setting.

amdsmi_get_gpu_bad_page_threshold

amdsmi_status_t amdsmi_get_gpu_bad_page_threshold(amdsmi_processor_handle processor_handle, uint32_t *threshold)

Get the bad pages threshold of a processor. It is not supported on virtual machine guest.

amdsmi_get_gpu_memory_total

amdsmi_status_t amdsmi_get_gpu_memory_total(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *total)

Get the total amount of memory that exists.

amdsmi_get_gpu_ras_block_features_enabled

amdsmi_status_t amdsmi_get_gpu_ras_block_features_enabled(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state)

Returns if RAS features are enabled or disabled for given block. It is not supported on virtual machi...

amdsmi_get_gpu_bad_page_info

amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *info)

Get the bad pages of a processor. It is not supported on virtual machine guest.

amdsmi_get_gpu_memory_reserved_pages

amdsmi_status_t amdsmi_get_gpu_memory_reserved_pages(amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *records)

Get information about reserved ("retired") memory pages. It is not supported on virtual machine guest...

amdsmi_get_gpu_memory_usage

amdsmi_status_t amdsmi_get_gpu_memory_usage(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *used)

Get the current memory usage.

amdsmi_gpu_validate_ras_eeprom

amdsmi_status_t amdsmi_gpu_validate_ras_eeprom(amdsmi_processor_handle processor_handle)

Verify the checksum of RAS EEPROM. It is not supported on virtual machine guest.

amdsmi_get_gpu_ras_feature_info

amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature)

Returns RAS features info.

amdsmi_set_gpu_pci_bandwidth

amdsmi_status_t amdsmi_set_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, uint64_t bw_bitmask)

Control the set of allowed PCIe bandwidths that can be used. It is not supported on virtual machine g...

amdsmi_get_gpu_topo_numa_affinity

amdsmi_status_t amdsmi_get_gpu_topo_numa_affinity(amdsmi_processor_handle processor_handle, int32_t *numa_node)

Get the NUMA node associated with a device.

amdsmi_get_gpu_pci_throughput

amdsmi_status_t amdsmi_get_gpu_pci_throughput(amdsmi_processor_handle processor_handle, uint64_t *sent, uint64_t *received, uint64_t *max_pkt_sz)

Get PCIe traffic information. It is not supported on virtual machine guest.

amdsmi_get_gpu_pci_bandwidth

amdsmi_status_t amdsmi_get_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth)

Get the list of possible PCIe bandwidths that are available. It is not supported on virtual machine g...

amdsmi_get_gpu_pci_replay_counter

amdsmi_status_t amdsmi_get_gpu_pci_replay_counter(amdsmi_processor_handle processor_handle, uint64_t *counter)

Get PCIe replay counter.

amdsmi_get_gpu_bdf_id

amdsmi_status_t amdsmi_get_gpu_bdf_id(amdsmi_processor_handle processor_handle, uint64_t *bdfid)

Get the unique PCI device identifier associated for a device.

amdsmi_set_cpu_core_boostlimit

amdsmi_status_t amdsmi_set_cpu_core_boostlimit(amdsmi_processor_handle processor_handle, uint32_t boostlimit)

Set the core boostlimit value.

amdsmi_get_cpu_socket_c0_residency

amdsmi_status_t amdsmi_get_cpu_socket_c0_residency(amdsmi_processor_handle processor_handle, uint32_t *pc0_residency)

Get the socket c0 residency.

amdsmi_set_cpu_socket_boostlimit

amdsmi_status_t amdsmi_set_cpu_socket_boostlimit(amdsmi_processor_handle processor_handle, uint32_t boostlimit)

Set the socket boostlimit value.

amdsmi_get_cpu_core_boostlimit

amdsmi_status_t amdsmi_get_cpu_core_boostlimit(amdsmi_processor_handle processor_handle, uint32_t *pboostlimit)

Get the core boost limit.

amdsmi_get_gpu_available_counters

amdsmi_status_t amdsmi_get_gpu_available_counters(amdsmi_processor_handle processor_handle, amdsmi_event_group_t grp, uint32_t *available)

Get the number of currently available counters. It is not supported on virtual machine guest.

amdsmi_gpu_read_counter

amdsmi_status_t amdsmi_gpu_read_counter(amdsmi_event_handle_t evt_handle, amdsmi_counter_value_t *value)

Read the current value of a performance counter.

amdsmi_gpu_control_counter

amdsmi_status_t amdsmi_gpu_control_counter(amdsmi_event_handle_t evt_handle, amdsmi_counter_command_t cmd, void *cmd_args)

Issue performance counter control commands. It is not supported on virtual machine guest.

amdsmi_gpu_counter_group_supported

amdsmi_status_t amdsmi_gpu_counter_group_supported(amdsmi_processor_handle processor_handle, amdsmi_event_group_t group)

Tell if an event group is supported by a given device. It is not supported on virtual machine guest.

amdsmi_gpu_destroy_counter

amdsmi_status_t amdsmi_gpu_destroy_counter(amdsmi_event_handle_t evnt_handle)

Deallocate a performance counter object.

amdsmi_gpu_create_counter

amdsmi_status_t amdsmi_gpu_create_counter(amdsmi_processor_handle processor_handle, amdsmi_event_type_t type, amdsmi_event_handle_t *evnt_handle)

Create a performance counter object.

amdsmi_set_gpu_fan_speed

amdsmi_status_t amdsmi_set_gpu_fan_speed(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t speed)

Set the fan speed for the specified device with the provided speed, in RPMs. It is not supported on v...

amdsmi_reset_gpu_fan

amdsmi_status_t amdsmi_reset_gpu_fan(amdsmi_processor_handle processor_handle, uint32_t sensor_ind)

Reset the fan to automatic driver control. It is not supported on virtual machine guest.

amdsmi_get_temp_metric

amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature)

Get the temperature metric value for the specified metric, from the specified temperature sensor on t...

amdsmi_get_gpu_fan_speed

amdsmi_status_t amdsmi_get_gpu_fan_speed(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed)

Get the fan speed for the specified device as a value relative to AMDSMI_MAX_FAN_SPEED....

amdsmi_get_gpu_fan_speed_max

amdsmi_status_t amdsmi_get_gpu_fan_speed_max(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t *max_speed)

Get the max. fan speed of the device with provided processor handle. It is not supported on virtual m...

amdsmi_get_gpu_cache_info

amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info)

Returns gpu cache info.

amdsmi_get_gpu_fan_rpms

amdsmi_status_t amdsmi_get_gpu_fan_rpms(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed)

Get the fan speed in RPMs of the device with the specified processor handle and 0-based sensor index....

amdsmi_get_gpu_volt_metric

amdsmi_status_t amdsmi_get_gpu_volt_metric(amdsmi_processor_handle processor_handle, amdsmi_voltage_type_t sensor_type, amdsmi_voltage_metric_t metric, int64_t *voltage)

Get the voltage metric value for the specified metric, from the specified voltage sensor on the speci...

amdsmi_get_cpu_socket_power_cap_max

amdsmi_status_t amdsmi_get_cpu_socket_power_cap_max(amdsmi_processor_handle processor_handle, uint32_t *pmax)

Get the maximum power cap value for a given socket.

amdsmi_set_gpu_power_profile

amdsmi_status_t amdsmi_set_gpu_power_profile(amdsmi_processor_handle processor_handle, uint32_t reserved, amdsmi_power_profile_preset_masks_t profile)

Set the power performance profile. It is not supported on virtual machine guest.

amdsmi_set_cpu_socket_power_cap

amdsmi_status_t amdsmi_set_cpu_socket_power_cap(amdsmi_processor_handle processor_handle, uint32_t pcap)

Set the power cap value for a given socket.

amdsmi_set_power_cap

amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap)

Set the maximum gpu power cap value. It is not supported on virtual machine guest.

amdsmi_get_cpu_socket_power

amdsmi_status_t amdsmi_get_cpu_socket_power(amdsmi_processor_handle processor_handle, uint32_t *ppower)

Get the socket power.

amdsmi_get_cpu_socket_power_cap

amdsmi_status_t amdsmi_get_cpu_socket_power_cap(amdsmi_processor_handle processor_handle, uint32_t *pcap)

Get the socket power cap.

amdsmi_get_cpu_pwr_svi_telemetry_all_rails

amdsmi_status_t amdsmi_get_cpu_pwr_svi_telemetry_all_rails(amdsmi_processor_handle processor_handle, uint32_t *power)

Get the SVI based power telemetry for all rails.

amdsmi_set_cpu_pwr_efficiency_mode

amdsmi_status_t amdsmi_set_cpu_pwr_efficiency_mode(amdsmi_processor_handle processor_handle, uint8_t mode)

Set the power efficiency profile policy.

amdsmi_get_energy_count

amdsmi_status_t amdsmi_get_energy_count(amdsmi_processor_handle processor_handle, uint64_t *energy_accumulator, float *counter_resolution, uint64_t *timestamp)

Get the energy accumulator counter of the processor with provided processor handle....

amdsmi_get_processor_info

amdsmi_status_t amdsmi_get_processor_info(amdsmi_processor_handle processor_handle, size_t len, char *name)

Get information about the given processor.

amdsmi_get_processor_handles

amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)

Get the list of the processor handles associated to a socket.

amdsmi_get_gpu_device_uuid

amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid)

Returns the UUID of the device.

amdsmi_get_processor_type

amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, processor_type_t *processor_type)

Get the processor type of the processor_handle.

amdsmi_get_socket_info

amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name)

Get information about the given socket.

amdsmi_get_gpu_virtualization_mode

amdsmi_status_t amdsmi_get_gpu_virtualization_mode(amdsmi_processor_handle processor_handle, amdsmi_virtualization_mode_t *mode)

Returns the virtualization mode for the target device.

amdsmi_get_cpu_handles

amdsmi_status_t amdsmi_get_cpu_handles(uint32_t *cpu_count, amdsmi_processor_handle *processor_handles)

Get the list of cpu handles in the system.

amdsmi_get_cpucore_handles

amdsmi_status_t amdsmi_get_cpucore_handles(uint32_t *cores_count, amdsmi_processor_handle *processor_handles)

Get the list of the cpu core handles in a system.

amdsmi_get_gpu_enumeration_info

amdsmi_status_t amdsmi_get_gpu_enumeration_info(amdsmi_processor_handle processor_handle, amdsmi_enumeration_info_t *info)

Returns the Enumeration information for the device.

amdsmi_get_socket_handles

amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles)

Get the list of socket handles in the system.

amdsmi_get_processor_handle_from_bdf

amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle)

Get processor handle with the matching bdf.

amdsmi_get_processor_handles_by_type

amdsmi_status_t amdsmi_get_processor_handles_by_type(amdsmi_socket_handle socket_handle, processor_type_t processor_type, amdsmi_processor_handle *processor_handles, uint32_t *processor_count)

Get processor list as per processor type.

amdsmi_get_gpu_device_bdf

amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)

Returns BDF of the given device.

amdsmi_get_cpu_affinity_with_scope

amdsmi_status_t amdsmi_get_cpu_affinity_with_scope(amdsmi_processor_handle processor_handle, uint32_t cpu_set_size, uint64_t *cpu_set, amdsmi_affinity_scope_t scope)

Retrieves an array of uint64_t (sized to cpu_set_size) of bitmasks with the affinity within numa node...

amdsmi_get_processor_count_from_handles

amdsmi_status_t amdsmi_get_processor_count_from_handles(amdsmi_processor_handle *processor_handles, uint32_t *processor_count, uint32_t *nr_cpusockets, uint32_t *nr_cpucores, uint32_t *nr_gpus)

Get respective processor counts from the processor handles.

amdsmi_get_gpu_process_list

amdsmi_status_t amdsmi_get_gpu_process_list(amdsmi_processor_handle processor_handle, uint32_t *max_processes, amdsmi_proc_info_t *list)

Returns the list of process information running on a given GPU. If pdh.dll is not present on the syst...

amdsmi_cpu_apb_disable

amdsmi_status_t amdsmi_cpu_apb_disable(amdsmi_processor_handle processor_handle, uint8_t pstate)

Disable APB.

amdsmi_set_cpu_socket_lclk_dpm_level

amdsmi_status_t amdsmi_set_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle, uint8_t nbio_id, uint8_t min, uint8_t max)

Set NBIO lclk dpm level value.

amdsmi_set_cpu_pcie_link_rate

amdsmi_status_t amdsmi_set_cpu_pcie_link_rate(amdsmi_processor_handle processor_handle, uint8_t rate_ctrl, uint8_t *prev_mode)

Set pcie link rate.

amdsmi_get_cpu_socket_lclk_dpm_level

amdsmi_status_t amdsmi_get_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle, uint8_t nbio_id, amdsmi_dpm_level_t *nbio)

Get NBIO LCLK dpm level.

amdsmi_set_cpu_df_pstate_range

amdsmi_status_t amdsmi_set_cpu_df_pstate_range(amdsmi_processor_handle processor_handle, uint8_t max_pstate, uint8_t min_pstate)

Set df pstate range.

amdsmi_cpu_apb_enable

amdsmi_status_t amdsmi_cpu_apb_enable(amdsmi_processor_handle processor_handle)

Enable APB.

amdsmi_get_afids_from_cper

amdsmi_status_t amdsmi_get_afids_from_cper(char *cper_buffer, uint32_t buf_size, uint64_t *afids, uint32_t *num_afids)

Get the AFIDs from CPER buffer.

amdsmi_get_gpu_driver_info

amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info)

Returns the driver version information.

amdsmi_get_gpu_compute_process_info

amdsmi_status_t amdsmi_get_gpu_compute_process_info(amdsmi_process_info_t *procs, uint32_t *num_items)

Get process information about processes currently using GPU.

amdsmi_get_gpu_compute_process_info_by_pid

amdsmi_status_t amdsmi_get_gpu_compute_process_info_by_pid(uint32_t pid, amdsmi_process_info_t *proc)

Get process information about a specific process.

amdsmi_get_gpu_compute_process_gpus

amdsmi_status_t amdsmi_get_gpu_compute_process_gpus(uint32_t pid, uint32_t *dv_indices, uint32_t *num_devices)

Get the device indices currently being used by a process.

amdsmi_get_cpu_socket_temperature

amdsmi_status_t amdsmi_get_cpu_socket_temperature(amdsmi_processor_handle processor_handle, uint32_t *ptmon)

Get socket temperature.

amdsmi_get_lib_version

amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version)

Get the build version information for the currently running build of AMDSMI.

amdsmi_set_cpu_xgmi_width

amdsmi_status_t amdsmi_set_cpu_xgmi_width(amdsmi_processor_handle processor_handle, uint8_t min, uint8_t max)

Set xgmi width.

amdsmi_get_gpu_xgmi_link_status

amdsmi_status_t amdsmi_get_gpu_xgmi_link_status(amdsmi_processor_handle processor_handle, amdsmi_xgmi_link_status_t *link_status)

Get the XGMI link status.

amdsmi_gpu_xgmi_error_status

amdsmi_status_t amdsmi_gpu_xgmi_error_status(amdsmi_processor_handle processor_handle, amdsmi_xgmi_status_t *status)

Retrieve the XGMI error status for a device. It is not supported on virtual machine guest.

amdsmi_reset_gpu_xgmi_error

amdsmi_status_t amdsmi_reset_gpu_xgmi_error(amdsmi_processor_handle processor_handle)

Reset the XGMI error status for a device. It is not supported on virtual machine guest.

amdsmi_get_xgmi_info

amdsmi_status_t amdsmi_get_xgmi_info(amdsmi_processor_handle processor_handle, amdsmi_xgmi_info_t *info)

Returns XGMI information for the GPU.

amd_metrics_table_header_t

Structure holds the gpu metrics table header for a device.

Definition: amdsmi.h:1770

amdsmi_accelerator_partition_profile_config_t

Accelerator Partition Profile Configurations.

Definition: amdsmi.h:994

amdsmi_accelerator_partition_profile_config_t::default_profile_index

uint32_t default_profile_index

The index of the default profile in the profiles array.

Definition: amdsmi.h:998

amdsmi_accelerator_partition_profile_config_t::num_profiles

uint32_t num_profiles

The length of profiles array.

Definition: amdsmi.h:995

amdsmi_accelerator_partition_profile_t

Accelerator Partition Resource Profile.

Definition: amdsmi.h:965

amdsmi_accelerator_partition_profile_t::profile_index

uint32_t profile_index

Index in the profiles array in amdsmi_accelerator_partition_profile_t.

Definition: amdsmi.h:969

amdsmi_accelerator_partition_profile_t::num_partitions

uint32_t num_partitions

On MI300X: SPX=>1, DPX=>2, QPX=>4, CPX=>8; length of resources.

Definition: amdsmi.h:967

amdsmi_accelerator_partition_profile_t::memory_caps

amdsmi_nps_caps_t memory_caps

Possible memory partition capabilities.

Definition: amdsmi.h:968

amdsmi_accelerator_partition_profile_t::profile_type

amdsmi_accelerator_partition_type_t profile_type

SPX, DPX, QPX, CPX and so on.

Definition: amdsmi.h:966

amdsmi_accelerator_partition_profile_t::num_resources

uint32_t num_resources

length of index_of_resources_profile

Definition: amdsmi.h:970

amdsmi_accelerator_partition_resource_profile_t

Accelerator Partition Resources. This struct is used to identify various partition resource profiles.

Definition: amdsmi.h:981

amdsmi_accelerator_partition_resource_profile_t::partition_resource

uint32_t partition_resource

Resources a partition can use, which may be shared.

Definition: amdsmi.h:984

amdsmi_accelerator_partition_resource_profile_t::num_partitions_share_resource

uint32_t num_partitions_share_resource

If it is greater than 1, then resource is shared.

Definition: amdsmi.h:985

amdsmi_asic_info_t

ASIC Information.

Definition: amdsmi.h:899

amdsmi_asic_info_t::target_graphics_version

uint64_t target_graphics_version

0xFFFFFFFFFFFFFFFF if not supported

Definition: amdsmi.h:909

amdsmi_asic_info_t::vendor_id

uint32_t vendor_id

Use 32 bit to be compatible with other platform.

Definition: amdsmi.h:901

amdsmi_asic_info_t::device_id

uint64_t device_id

The device ID of a GPU.

Definition: amdsmi.h:904

amdsmi_asic_info_t::oam_id

uint32_t oam_id

0xFFFFFFFF if not supported

Definition: amdsmi.h:907

amdsmi_asic_info_t::num_of_compute_units

uint32_t num_of_compute_units

0xFFFFFFFF if not supported

Definition: amdsmi.h:908

amdsmi_asic_info_t::subvendor_id

uint32_t subvendor_id

The subsystem vendor ID.

Definition: amdsmi.h:903

amdsmi_asic_info_t::rev_id

uint32_t rev_id

The revision ID of a GPU.

Definition: amdsmi.h:905

amdsmi_bdf_t::bdf_

Definition: amdsmi.h:752

amdsmi_board_info_t

Board Information.

Definition: amdsmi.h:1078

amdsmi_clk_info_t

Clock Information.

Definition: amdsmi.h:1107

amdsmi_clk_info_t::clk

uint32_t clk

In MHz.

Definition: amdsmi.h:1108

amdsmi_clk_info_t::clk_locked

uint8_t clk_locked

True/False.

Definition: amdsmi.h:1111

amdsmi_clk_info_t::clk_deep_sleep

uint8_t clk_deep_sleep

In MHz.

Definition: amdsmi.h:1112

amdsmi_clk_info_t::min_clk

uint32_t min_clk

In MHz.

Definition: amdsmi.h:1109

amdsmi_clk_info_t::max_clk

uint32_t max_clk

In MHz.

Definition: amdsmi.h:1110

amdsmi_counter_value_t

Counter value.

Definition: amdsmi.h:1301

amdsmi_counter_value_t::time_enabled

uint64_t time_enabled

Time that the counter was enabled in nanoseconds.

Definition: amdsmi.h:1303

amdsmi_counter_value_t::time_running

uint64_t time_running

Time that the counter was running in nanoseconds.

Definition: amdsmi.h:1304

amdsmi_counter_value_t::value

uint64_t value

Counter value.

Definition: amdsmi.h:1302

amdsmi_cper_guid_t

Cper.

Definition: amdsmi.h:4774

amdsmi_cper_hdr_t

Definition: amdsmi.h:4799

amdsmi_cper_timestamp_t

Definition: amdsmi.h:4778

amdsmi_cper_valid_bits_t::valid_bits_

Definition: amdsmi.h:4790

amdsmi_cpu_info_t

cpu info data

Definition: amdsmi.h:2316

amdsmi_cpu_info_t::frequency_boost

bool frequency_boost

boost frequency

Definition: amdsmi.h:2322

amdsmi_cpu_info_t::socket_count

uint32_t socket_count

count of cpu sockets

Definition: amdsmi.h:2332

amdsmi_cpu_info_t::num_of_cpu_cores

uint32_t num_of_cpu_cores

0xFFFFFFFF if not supported

Definition: amdsmi.h:2331

amdsmi_cpu_info_t::device_id

uint64_t device_id

The device id of a GPU.

Definition: amdsmi.h:2326

amdsmi_cpu_info_t::socket_id

uint32_t socket_id

0xFFFF if not supported

Definition: amdsmi.h:2329

amdsmi_cpu_info_t::threads_per_core

uint32_t threads_per_core

vitual processing units per cpu core

Definition: amdsmi.h:2320

amdsmi_cpu_info_t::core_id

uint32_t core_id

cpu core id

Definition: amdsmi.h:2330

amdsmi_cpu_info_t::vendor_id

uint32_t vendor_id

Use 32 bit to be compatible with other platform.

Definition: amdsmi.h:2323

amdsmi_cpu_info_t::cpu_family_id

uint32_t cpu_family_id

cpu family id

Definition: amdsmi.h:2318

amdsmi_cpu_info_t::model_id

uint32_t model_id

cpu model id

Definition: amdsmi.h:2319

amdsmi_cpu_info_t::subvendor_id

uint32_t subvendor_id

The subsystem vendor id.

Definition: amdsmi.h:2325

amdsmi_cpu_info_t::cores_per_socket

uint32_t cores_per_socket

cpu cores per socket

Definition: amdsmi.h:2321

amdsmi_cpu_info_t::rev_id

uint32_t rev_id

Revision.

Definition: amdsmi.h:2327

amdsmi_cpu_info_t::core_count

uint32_t core_count

cpu core count

Definition: amdsmi.h:2333

amdsmi_cpu_util_t

This structure holds CPU utilization information.

Definition: amdsmi.h:1021

amdsmi_ddr_bw_metrics_t

DDR bandwidth metrics.

Definition: amdsmi.h:2145

amdsmi_ddr_bw_metrics_t::max_bw

uint32_t max_bw

DDR Maximum theoritical bandwidth in GB/s.

Definition: amdsmi.h:2146

amdsmi_ddr_bw_metrics_t::utilized_bw

uint32_t utilized_bw

DDR bandwidth utilization in GB/s.

Definition: amdsmi.h:2147

amdsmi_ddr_bw_metrics_t::utilized_pct

uint32_t utilized_pct

DDR bandwidth utilization in % of theoritical max.

Definition: amdsmi.h:2148

amdsmi_dimm_power_t

DIMM Power(mW), power update rate(ms) and dimm address.

Definition: amdsmi.h:2166

amdsmi_dimm_power_t::dimm_addr

uint8_t dimm_addr

Dimm address[7:0](8 bit data)

Definition: amdsmi.h:2169

amdsmi_dimm_power_t::update_rate

uint16_t update_rate

Time since last update[16:8](9 bit data)

Definition: amdsmi.h:2168

amdsmi_dimm_power_t::power

uint16_t power

Dimm power consumption[31:17](15 bits data)

Definition: amdsmi.h:2167

amdsmi_dimm_thermal_t

DIMM temperature(°C) and update rate(ms) and dimm address.

Definition: amdsmi.h:2177

amdsmi_dimm_thermal_t::sensor

uint16_t sensor

Dimm thermal sensor[31:21](11 bit data)

Definition: amdsmi.h:2178

amdsmi_dimm_thermal_t::temp

float temp

temperature in degree celcius

Definition: amdsmi.h:2181

amdsmi_dimm_thermal_t::update_rate

uint16_t update_rate

Time since last update[16:8](9 bit data)

Definition: amdsmi.h:2179

amdsmi_dimm_thermal_t::dimm_addr

uint8_t dimm_addr

Dimm address[7:0](8 bit data)

Definition: amdsmi.h:2180

amdsmi_dpm_level_t

max and min LCLK DPM level on a given NBIO ID. Valid max and min DPM level values are 0 - 1.

Definition: amdsmi.h:2215

amdsmi_dpm_level_t::min_dpm_level

uint8_t min_dpm_level

Min LCLK DPM level[7:0](8 bit data)

Definition: amdsmi.h:2217

amdsmi_dpm_level_t::max_dpm_level

uint8_t max_dpm_level

Max LCLK DPM level[15:8](8 bit data)

Definition: amdsmi.h:2216

amdsmi_dpm_policy_entry_t

The dpm policy.

Definition: amdsmi.h:1671

amdsmi_dpm_policy_t

DPM Policy.

Definition: amdsmi.h:1685

amdsmi_dpm_policy_t::num_supported

uint32_t num_supported

The number of supported policies.

Definition: amdsmi.h:1686

amdsmi_dpm_policy_t::current

uint32_t current

The current policy index.

Definition: amdsmi.h:1687

amdsmi_driver_info_t

Driver Information.

Definition: amdsmi.h:1067

amdsmi_engine_usage_t

Engine Usage amdsmi_engine_usage_t: This structure holds common GPU activity values seen in both BM o...

Definition: amdsmi.h:1125

amdsmi_engine_usage_t::gfx_activity

uint32_t gfx_activity

In %.

Definition: amdsmi.h:1126

amdsmi_engine_usage_t::umc_activity

uint32_t umc_activity

In %.

Definition: amdsmi.h:1127

amdsmi_engine_usage_t::mm_activity

uint32_t mm_activity

In %.

Definition: amdsmi.h:1128

amdsmi_enumeration_info_t

Structure holds enumeration information.

Definition: amdsmi.h:772

amdsmi_enumeration_info_t::hip_id

uint32_t hip_id

the HIP enumeration ID

Definition: amdsmi.h:776

amdsmi_enumeration_info_t::drm_render

uint32_t drm_render

the render node under /sys/class/drm/renderD*

Definition: amdsmi.h:773

amdsmi_enumeration_info_t::hsa_id

uint32_t hsa_id

the HSA enumeration ID

Definition: amdsmi.h:775

amdsmi_enumeration_info_t::drm_card

uint32_t drm_card

the graphic card device under /sys/class/drm/card*

Definition: amdsmi.h:774

amdsmi_error_count_t

This structure holds error counts.

Definition: amdsmi.h:2069

amdsmi_error_count_t::uncorrectable_count

uint64_t uncorrectable_count

Accumulated uncorrectable errors.

Definition: amdsmi.h:2071

amdsmi_error_count_t::correctable_count

uint64_t correctable_count

Accumulated correctable errors.

Definition: amdsmi.h:2070

amdsmi_error_count_t::deferred_count

uint64_t deferred_count

Accumulated deferred errors.

Definition: amdsmi.h:2072

amdsmi_evt_notification_data_t

Event notification data returned from event notification API.

Definition: amdsmi.h:1343

amdsmi_evt_notification_data_t::processor_handle

amdsmi_processor_handle processor_handle

Handler of device that corresponds to the event.

Definition: amdsmi.h:1344

amdsmi_evt_notification_data_t::event

amdsmi_evt_notification_type_t event

Event type.

Definition: amdsmi.h:1345

amdsmi_freq_volt_region_t

This structure holds 2 amdsmi_range_t's, one for frequency and one for voltage. These 2 ranges indica...

Definition: amdsmi.h:1734

amdsmi_freq_volt_region_t::freq_range

amdsmi_range_t freq_range

The frequency range for this VDDC Curve point.

Definition: amdsmi.h:1735

amdsmi_freq_volt_region_t::volt_range

amdsmi_range_t volt_range

The voltage range for this VDDC Curve point.

Definition: amdsmi.h:1736

amdsmi_frequencies_t

This structure holds information about clock frequencies.

Definition: amdsmi.h:1658

amdsmi_frequencies_t::current

uint32_t current

The current frequency index in MHz.

Definition: amdsmi.h:1661

amdsmi_frequencies_t::num_supported

uint32_t num_supported

The number of supported frequencies.

Definition: amdsmi.h:1660

amdsmi_frequencies_t::has_deep_sleep

bool has_deep_sleep

Deep Sleep frequency is only supported by some GPUs.

Definition: amdsmi.h:1659

amdsmi_frequency_range_t

Frequency Range.

Definition: amdsmi.h:740

amdsmi_frequency_range_t::supported_freq_range

amdsmi_range_t supported_freq_range

In MHz.

Definition: amdsmi.h:741

amdsmi_frequency_range_t::current_freq_range

amdsmi_range_t current_freq_range

In MHz.

Definition: amdsmi.h:742

amdsmi_fw_info_t::fw_info_list_

Definition: amdsmi.h:886

amdsmi_fw_info_t

Firmware Information.

Definition: amdsmi.h:884

amdsmi_gpu_cache_info_t::cache_

Definition: amdsmi.h:868

amdsmi_gpu_cache_info_t::cache_::num_cache_instance

uint32_t num_cache_instance

total number of instance of this cache type

Definition: amdsmi.h:873

amdsmi_gpu_cache_info_t::cache_::cache_size

uint32_t cache_size

In KB.

Definition: amdsmi.h:870

amdsmi_gpu_cache_info_t::cache_::max_num_cu_shared

uint32_t max_num_cu_shared

Indicates how many Compute Units share this cache instance.

Definition: amdsmi.h:872

amdsmi_gpu_cache_info_t::cache_::cache_properties

uint32_t cache_properties

amdsmi_cache_property_type_t which is a bitmask

Definition: amdsmi.h:869

amdsmi_gpu_cache_info_t

GPU Cache Information.

Definition: amdsmi.h:866

amdsmi_gpu_metrics_t

Structure holds the gpu metrics values for a device.

Definition: amdsmi.h:1826

amdsmi_gpu_metrics_t::indep_throttle_status

uint64_t indep_throttle_status

Throttle status.

Definition: amdsmi.h:1908

amdsmi_gpu_metrics_t::vram_max_bandwidth

uint64_t vram_max_bandwidth

v1.7 additions

Definition: amdsmi.h:2002

amdsmi_gpu_metrics_t::gfx_activity_acc

uint32_t gfx_activity_acc

new in v1

Definition: amdsmi.h:1892

amdsmi_gpu_metrics_t::average_socket_power

uint16_t average_socket_power

Power (W) /Energy (15.259uJ per 1ns)

Definition: amdsmi.h:1851

amdsmi_gpu_metrics_t::gfxclk_lock_status

uint32_t gfxclk_lock_status

Clock Lock Status. Each bit corresponds to clock instance.

Definition: amdsmi.h:1917

amdsmi_gpu_metrics_t::temperature_edge

uint16_t temperature_edge

v1.0 Base

Definition: amdsmi.h:1834

amdsmi_gpu_metrics_t::average_mm_activity

uint16_t average_mm_activity

UVD or VCN.

Definition: amdsmi.h:1846

amdsmi_gpu_metrics_t::current_fan_speed

uint16_t current_fan_speed

Fans (RPM)

Definition: amdsmi.h:1881

amdsmi_gpu_metrics_t::firmware_timestamp

uint64_t firmware_timestamp

PMFW attached timestamp (10ns resolution)

Definition: amdsmi.h:1899

amdsmi_gpu_metrics_t::pcie_lc_perf_other_end_recovery

uint32_t pcie_lc_perf_other_end_recovery

PCIE other end recovery counter.

Definition: amdsmi.h:1997

amdsmi_gpu_metrics_t::current_socket_power

uint16_t current_socket_power

In Watts.

Definition: amdsmi.h:1913

amdsmi_gpu_metrics_t::system_clock_counter

uint64_t system_clock_counter

Driver attached timestamp (in ns)

Definition: amdsmi.h:1855

amdsmi_gpu_metrics_t::ppt_residency_acc

uint64_t ppt_residency_acc

Accumulated throttler residencies.

Definition: amdsmi.h:1973

amdsmi_gpu_metrics_t::average_umc_activity

uint16_t average_umc_activity

memory controller

Definition: amdsmi.h:1845

amdsmi_gpu_metrics_t::pcie_l0_to_recov_count_acc

uint64_t pcie_l0_to_recov_count_acc

PCIE L0 to recovery state transition accumulated count.

Definition: amdsmi.h:1924

amdsmi_gpu_metrics_t::pcie_link_width

uint16_t pcie_link_width

Link width (number of lanes) /speed (0.1 GT/s)

Definition: amdsmi.h:1886

amdsmi_gpu_metrics_t::average_gfxclk_frequency

uint16_t average_gfxclk_frequency

Average clocks (MHz)

Definition: amdsmi.h:1860

amdsmi_gpu_metrics_t::voltage_soc

uint16_t voltage_soc

In mV.

Definition: amdsmi.h:1904

amdsmi_gpu_metrics_t::mem_activity_acc

uint32_t mem_activity_acc

new in v1

Definition: amdsmi.h:1893

amdsmi_gpu_metrics_t::xgmi_link_speed

uint16_t xgmi_link_speed

XGMI bus bitrate in GB/s.

Definition: amdsmi.h:1920

amdsmi_gpu_metrics_t::voltage_gfx

uint16_t voltage_gfx

In mV.

Definition: amdsmi.h:1905

amdsmi_gpu_metrics_t::socket_thm_residency_acc

uint64_t socket_thm_residency_acc

Accumulated throttler residencies.

Definition: amdsmi.h:1989

amdsmi_gpu_metrics_t::throttle_status

uint32_t throttle_status

Throttle status.

Definition: amdsmi.h:1879

amdsmi_gpu_metrics_t::voltage_mem

uint16_t voltage_mem

In mV.

Definition: amdsmi.h:1906

amdsmi_gpu_metrics_t::pcie_link_speed

uint16_t pcie_link_speed

in 0.1 GT/s; v1 mod. (8->16)

Definition: amdsmi.h:1887

amdsmi_gpu_metrics_t::num_partition

uint16_t num_partition

Number of current partition.

Definition: amdsmi.h:1993

amdsmi_gpu_metrics_t::pcie_bandwidth_acc

uint64_t pcie_bandwidth_acc

PCIE accumulated bandwidth (GB/sec)

Definition: amdsmi.h:1922

amdsmi_gpu_metrics_t::accumulation_counter

uint64_t accumulation_counter

v1.6 additions

Definition: amdsmi.h:1952

amdsmi_gpu_metrics_t::xgmi_link_width

uint16_t xgmi_link_width

XGMI bus width in GB/s.

Definition: amdsmi.h:1919

amdsmi_gpu_metrics_t::prochot_residency_acc

uint64_t prochot_residency_acc

Accumulated throttler residencies.

Definition: amdsmi.h:1957

amdsmi_gpu_metrics_t::pcie_replay_rover_count_acc

uint64_t pcie_replay_rover_count_acc

PCIE replay rollover accumulated count.

Definition: amdsmi.h:1926

amdsmi_gpu_metrics_t::pcie_replay_count_acc

uint64_t pcie_replay_count_acc

PCIE replay accumulated count.

Definition: amdsmi.h:1925

amdsmi_gpu_metrics_t::current_gfxclk

uint16_t current_gfxclk

Current clocks (MHz)

Definition: amdsmi.h:1871

amdsmi_gpu_metrics_t::average_gfx_activity

uint16_t average_gfx_activity

Average Utilization (in %)

Definition: amdsmi.h:1844

amdsmi_gpu_metrics_t::pcie_nak_sent_count_acc

uint32_t pcie_nak_sent_count_acc

PCIE NAK sent accumulated count.

Definition: amdsmi.h:1946

amdsmi_gpu_metrics_t::energy_accumulator

uint64_t energy_accumulator

v1 mod. (32->64)

Definition: amdsmi.h:1852

amdsmi_gpu_metrics_t::pcie_nak_rcvd_count_acc

uint32_t pcie_nak_rcvd_count_acc

PCIE NAK received accumulated count.

Definition: amdsmi.h:1947

amdsmi_gpu_metrics_t::pcie_bandwidth_inst

uint64_t pcie_bandwidth_inst

PCIE instantaneous bandwidth (GB/sec)

Definition: amdsmi.h:1923

amdsmi_gpu_xcp_metrics_t

The following structures hold the gpu statistics for a device.

Definition: amdsmi.h:1785

amdsmi_hsmp_driver_version_t

This structure holds HSMP Driver version information.

Definition: amdsmi.h:263

amdsmi_hsmp_driver_version_t::major

uint32_t major

Major version number.

Definition: amdsmi.h:264

amdsmi_hsmp_driver_version_t::minor

uint32_t minor

Minor version number.

Definition: amdsmi.h:265

amdsmi_hsmp_metrics_table_t

HSMP Metrics table (supported only with hsmp proto version 6).

Definition: amdsmi.h:2225

amdsmi_hsmp_metrics_table_t::max_lclk_dpm_range

uint32_t max_lclk_dpm_range

Maximum LCLK DPM state constraint defined by the user.

Definition: amdsmi.h:2267

amdsmi_hsmp_metrics_table_t::xgmi_width

uint32_t xgmi_width

Current operating XGMI link width.

Definition: amdsmi.h:2270

amdsmi_hsmp_metrics_table_t::max_cclk_frequency

uint32_t max_cclk_frequency

Maximum CCLK frequency supported by the CPU.

Definition: amdsmi.h:2257

amdsmi_hsmp_metrics_table_t::timestamp

uint64_t timestamp

Timestamp corresponding to the energy accumulators in 10ns units.

Definition: amdsmi.h:2239

amdsmi_hsmp_metrics_table_t::socket_c0_residency

uint32_t socket_c0_residency

Average CPU C0 residency of all enabled cores in the socket.

Definition: amdsmi.h:2275

amdsmi_hsmp_metrics_table_t::gfxclk_frequency_limit

uint32_t gfxclk_frequency_limit

Minimum GFXCLK frequency limit enforced from the infrastructure controllers.

Definition: amdsmi.h:2247

amdsmi_hsmp_metrics_table_t::max_socket_power_limit

uint32_t max_socket_power_limit

Maximum power limit the power throttling controller is allowed to be configured to.

Definition: amdsmi.h:2236

amdsmi_hsmp_metrics_table_t::prochot_residency_acc

uint32_t prochot_residency_acc

Incremented every iteration PROCHOT is active.

Definition: amdsmi.h:2285

amdsmi_hsmp_metrics_table_t::max_vr_temperature

uint32_t max_vr_temperature

Maximum temperature reported by SVI3 telemetry for all slave addresses.

Definition: amdsmi.h:2229

amdsmi_hsmp_metrics_table_t::ccd_energy_acc

uint64_t ccd_energy_acc

Energy accumulator of VDDCR_VDD rails powering CCDs.

Definition: amdsmi.h:2241

amdsmi_hsmp_metrics_table_t::socket_gfx_busy_acc

uint64_t socket_gfx_busy_acc

Accumulated value of "socket_gfx_busy".

Definition: amdsmi.h:2279

amdsmi_hsmp_metrics_table_t::hbm_energy_acc

uint64_t hbm_energy_acc

Energy accumulator of all HBM stacks in the socket.

Definition: amdsmi.h:2244

amdsmi_hsmp_metrics_table_t::max_hbm_temperature

uint32_t max_hbm_temperature

Maximum temperature reported by all HBM stacks in the socket.

Definition: amdsmi.h:2230

amdsmi_hsmp_metrics_table_t::vr_thm_residency_acc

uint32_t vr_thm_residency_acc

Incremented every iteration the VR thermal throttling controller is active.

Definition: amdsmi.h:2288

amdsmi_hsmp_metrics_table_t::min_lclk_dpm_range

uint32_t min_lclk_dpm_range

Minimum LCLK DPM state constraint defined by the user.

Definition: amdsmi.h:2268

amdsmi_hsmp_metrics_table_t::max_hbm_temperature_acc

uint64_t max_hbm_temperature_acc

Accumulated version of "max_hbm_temperature".

Definition: amdsmi.h:2233

amdsmi_hsmp_metrics_table_t::socket_power

uint32_t socket_power

Power consumption of all die in the socket (AID+CCD+XCD+HBM)

Definition: amdsmi.h:2237

amdsmi_hsmp_metrics_table_t::fclk_frequency

uint32_t fclk_frequency

Effective FCLK frequency.

Definition: amdsmi.h:2248

amdsmi_hsmp_metrics_table_t::spare

uint32_t spare

spare

Definition: amdsmi.h:2290

amdsmi_hsmp_metrics_table_t::socket_c0_residency_acc

uint64_t socket_c0_residency_acc

Accumulated value of "socket_c0_residency".

Definition: amdsmi.h:2278

amdsmi_hsmp_metrics_table_t::xcd_energy_acc

uint64_t xcd_energy_acc

Energy accumulator of VDDCR_VDD rails powering XCDs.

Definition: amdsmi.h:2242

amdsmi_hsmp_metrics_table_t::accumulation_counter

uint32_t accumulation_counter

Incremented every time the accumulator values are updated in this table.

Definition: amdsmi.h:2226

amdsmi_hsmp_metrics_table_t::min_cclk_frequency

uint32_t min_cclk_frequency

Minimum CCLK frequency supported by the CPU.

Definition: amdsmi.h:2258

amdsmi_hsmp_metrics_table_t::dram_bandwidth_utilization_acc

uint64_t dram_bandwidth_utilization_acc

Accumulated value of "dram_bandwidth_utilization".

Definition: amdsmi.h:2282

amdsmi_hsmp_metrics_table_t::cclk_frequency_limit

uint32_t cclk_frequency_limit

Minimum CCLK frequency limit enforced from the infrastructure controllers.

Definition: amdsmi.h:2246

amdsmi_hsmp_metrics_table_t::max_gfxclk_frequency

uint32_t max_gfxclk_frequency

Maximum GFXCLK frequency supported by the accelerator.

Definition: amdsmi.h:2259

amdsmi_hsmp_metrics_table_t::socket_energy_acc

uint64_t socket_energy_acc

Energy accumulator of all die in the socket (AID+CCD+XCD+HBM)

Definition: amdsmi.h:2240

amdsmi_hsmp_metrics_table_t::socket_thm_residency_acc

uint32_t socket_thm_residency_acc

Incremented every iteration the socket thermal throttling controller is active.

Definition: amdsmi.h:2287

amdsmi_hsmp_metrics_table_t::max_dram_bandwidth

uint32_t max_dram_bandwidth

Maximum supported HBM bandwidth for all HBM stacks running at the maximum supported UCLK frequency.

Definition: amdsmi.h:2281

amdsmi_hsmp_metrics_table_t::aid_energy_acc

uint64_t aid_energy_acc

Energy accumulator of rails powering the AIDs.

Definition: amdsmi.h:2243

amdsmi_hsmp_metrics_table_t::socket_power_limit

uint32_t socket_power_limit

Power limit currently being enforced by the power throttling controller.

Definition: amdsmi.h:2235

amdsmi_hsmp_metrics_table_t::dram_bandwidth_utilization

uint32_t dram_bandwidth_utilization

HBM bandwidth utilization for all HBM stacks in the socket.

Definition: amdsmi.h:2277

amdsmi_hsmp_metrics_table_t::max_vr_temperature_acc

uint64_t max_vr_temperature_acc

Accumulated version of "max_vr_temperature".

Definition: amdsmi.h:2232

amdsmi_hsmp_metrics_table_t::max_socket_temperature_acc

uint64_t max_socket_temperature_acc

Accumulated version of "max_socket_temperature".

Definition: amdsmi.h:2231

amdsmi_hsmp_metrics_table_t::xgmi_bitrate

uint32_t xgmi_bitrate

Current operating XGMI link bitrate.

Definition: amdsmi.h:2271

amdsmi_hsmp_metrics_table_t::uclk_frequency

uint32_t uclk_frequency

Effective UCLK frequency.

Definition: amdsmi.h:2249

amdsmi_hsmp_metrics_table_t::max_socket_temperature

uint32_t max_socket_temperature

Maximum temperature reported by all on-die thermal sensors on all AIDs, CCDs, and XCDs in the socket.

Definition: amdsmi.h:2228

amdsmi_hsmp_metrics_table_t::socket_gfx_busy

uint32_t socket_gfx_busy

Average XCC busy for all enabled XCCs in the socket.

Definition: amdsmi.h:2276

amdsmi_hsmp_metrics_table_t::ppt_residency_acc

uint32_t ppt_residency_acc

Incremented every iteration the PPT controller is active.

Definition: amdsmi.h:2286

amdsmi_hsmp_metrics_table_t::hbm_thm_residency_acc

uint32_t hbm_thm_residency_acc

Incremented every iteration the HBM thermal throttling controller is active.

Definition: amdsmi.h:2289

amdsmi_hsmp_metrics_table_t::dram_bandwidth_acc

uint64_t dram_bandwidth_acc

HBM bandwidth for all HBM stacks in the socket.

Definition: amdsmi.h:2280

amdsmi_hsmp_metrics_table_t::min_gfxclk_frequency

uint32_t min_gfxclk_frequency

Minimum GFXCLK frequency supported by the accelerator.

Definition: amdsmi.h:2260

amdsmi_kfd_info_t

Structure holds kfd information.

Definition: amdsmi.h:919

amdsmi_kfd_info_t::current_partition_id

uint32_t current_partition_id

0xFFFFFFFF if not supported

Definition: amdsmi.h:922

amdsmi_kfd_info_t::node_id

uint32_t node_id

0xFFFFFFFF if not supported

Definition: amdsmi.h:921

amdsmi_kfd_info_t::kfd_id

uint64_t kfd_id

0xFFFFFFFFFFFFFFFF if not supported

Definition: amdsmi.h:920

amdsmi_link_id_bw_type_t

LINK name and Bandwidth type Information.It contains link names i.e valid link names are "P0",...

Definition: amdsmi.h:2204

amdsmi_link_id_bw_type_t::bw_type

amdsmi_io_bw_encoding_t bw_type

Bandwidth Type Information [1, 2, 4].

Definition: amdsmi.h:2205

amdsmi_link_id_bw_type_t::link_name

char * link_name

Link name [P0, P1, G0, G1 etc].

Definition: amdsmi.h:2206

amdsmi_link_metrics_t::_links

Definition: amdsmi.h:1036

amdsmi_link_metrics_t::_links::write

uint64_t write

total data transfered for each link in KB

Definition: amdsmi.h:1042

amdsmi_link_metrics_t::_links::read

uint64_t read

total data received for each link in KB

Definition: amdsmi.h:1041

amdsmi_link_metrics_t::_links::bit_rate

uint32_t bit_rate

current link speed in Gb/s

Definition: amdsmi.h:1038

amdsmi_link_metrics_t::_links::link_type

amdsmi_link_type_t link_type

type of the link

Definition: amdsmi.h:1040

amdsmi_link_metrics_t::_links::bdf

amdsmi_bdf_t bdf

bdf of the destination gpu

Definition: amdsmi.h:1037

amdsmi_link_metrics_t::_links::max_bandwidth

uint32_t max_bandwidth

max bandwidth of the link in Gb/s

Definition: amdsmi.h:1039

amdsmi_link_metrics_t

Link Metrics.

Definition: amdsmi.h:1034

amdsmi_link_metrics_t::num_links

uint32_t num_links

number of links

Definition: amdsmi.h:1035

amdsmi_memory_partition_config_t::numa_range_

Definition: amdsmi.h:952

amdsmi_memory_partition_config_t

Memory Partition Configuration. This structure is used to identify various memory partition configura...

Definition: amdsmi.h:948

amdsmi_name_value_t

This structure holds the name value pairs.

Definition: amdsmi.h:2034

amdsmi_name_value_t::value

uint64_t value

Use uint64_t to make it universal.

Definition: amdsmi.h:2036

amdsmi_nps_caps_t::nps_flags_

Definition: amdsmi.h:932

amdsmi_nps_caps_t::nps_flags_::nps8_cap

uint32_t nps8_cap

bool 1 = true; 0 = false

Definition: amdsmi.h:936

amdsmi_nps_caps_t::nps_flags_::nps4_cap

uint32_t nps4_cap

bool 1 = true; 0 = false

Definition: amdsmi.h:935

amdsmi_nps_caps_t::nps_flags_::nps2_cap

uint32_t nps2_cap

bool 1 = true; 0 = false

Definition: amdsmi.h:934

amdsmi_nps_caps_t::nps_flags_::nps1_cap

uint32_t nps1_cap

bool 1 = true; 0 = false

Definition: amdsmi.h:933

amdsmi_od_vddc_point_t

This structure represents a point on the frequency-voltage plane.

Definition: amdsmi.h:1722

amdsmi_od_vddc_point_t::frequency

uint64_t frequency

Frequency coordinate (in Hz)

Definition: amdsmi.h:1723

amdsmi_od_vddc_point_t::voltage

uint64_t voltage

Voltage coordinate (in mV)

Definition: amdsmi.h:1724

amdsmi_od_volt_curve_t

OD Vold Curve AMDSMI_NUM_VOLTAGE_CURVE_POINTS number of amdsmi_od_vddc_point_t's.

Definition: amdsmi.h:1745

amdsmi_od_volt_freq_data_t

This structure holds the frequency-voltage values for a device.

Definition: amdsmi.h:1754

amdsmi_od_volt_freq_data_t::curr_mclk_range

amdsmi_range_t curr_mclk_range

The current MCLK frequency range, upper bound only in MHz.

Definition: amdsmi.h:1756

amdsmi_od_volt_freq_data_t::mclk_freq_limits

amdsmi_range_t mclk_freq_limits

The range possible of MCLK values in MHz.

Definition: amdsmi.h:1758

amdsmi_od_volt_freq_data_t::num_regions

uint32_t num_regions

The number of voltage curve regions.

Definition: amdsmi.h:1760

amdsmi_od_volt_freq_data_t::curr_sclk_range

amdsmi_range_t curr_sclk_range

The current SCLK frequency range in MHz.

Definition: amdsmi.h:1755

amdsmi_od_volt_freq_data_t::sclk_freq_limits

amdsmi_range_t sclk_freq_limits

The range possible of SCLK values in MHz.

Definition: amdsmi.h:1757

amdsmi_od_volt_freq_data_t::curve

amdsmi_od_volt_curve_t curve

The current voltage curve.

Definition: amdsmi.h:1759

amdsmi_p2p_capability_t

IO Link P2P Capability.

Definition: amdsmi.h:1169

amdsmi_p2p_capability_t::is_iolink_atomics_64bit

uint8_t is_iolink_atomics_64bit

1 = true, 0 = false, UINT8_MAX = Not defined

Definition: amdsmi.h:1172

amdsmi_p2p_capability_t::is_iolink_atomics_32bit

uint8_t is_iolink_atomics_32bit

1 = true, 0 = false, UINT8_MAX = Not defined

Definition: amdsmi.h:1171

amdsmi_p2p_capability_t::is_iolink_bi_directional

uint8_t is_iolink_bi_directional

1 = true, 0 = false, UINT8_MAX = Not defined

Definition: amdsmi.h:1174

amdsmi_p2p_capability_t::is_iolink_coherent

uint8_t is_iolink_coherent

1 = true, 0 = false, UINT8_MAX = Not defined

Definition: amdsmi.h:1170

amdsmi_p2p_capability_t::is_iolink_dma

uint8_t is_iolink_dma

1 = true, 0 = false, UINT8_MAX = Not defined

Definition: amdsmi.h:1173

amdsmi_pcie_bandwidth_t

This structure holds information about the possible PCIe bandwidths. Specifically,...

Definition: amdsmi.h:1700

amdsmi_pcie_bandwidth_t::transfer_rate

amdsmi_frequencies_t transfer_rate

Transfer rates (T/s) that are possible.

Definition: amdsmi.h:1701

amdsmi_pcie_info_t::pcie_metric_

Definition: amdsmi.h:806

amdsmi_pcie_info_t::pcie_metric_::pcie_nak_received_count

uint64_t pcie_nak_received_count

total number of NAKs issued on the PCIe link by the receiver

Definition: amdsmi.h:814

amdsmi_pcie_info_t::pcie_metric_::pcie_replay_count

uint64_t pcie_replay_count

total number of the replays issued on the PCIe link

Definition: amdsmi.h:810

amdsmi_pcie_info_t::pcie_metric_::pcie_width

uint16_t pcie_width

current PCIe width

Definition: amdsmi.h:807

amdsmi_pcie_info_t::pcie_metric_::pcie_speed

uint32_t pcie_speed

current PCIe speed in MT/s

Definition: amdsmi.h:808

amdsmi_pcie_info_t::pcie_metric_::pcie_bandwidth

uint32_t pcie_bandwidth

current instantaneous PCIe bandwidth in Mb/s

Definition: amdsmi.h:809

amdsmi_pcie_info_t::pcie_metric_::pcie_l0_to_recovery_count

uint64_t pcie_l0_to_recovery_count

total number of times the PCIe link transitioned from L0 to the recovery state

Definition: amdsmi.h:811

amdsmi_pcie_info_t::pcie_metric_::pcie_nak_sent_count

uint64_t pcie_nak_sent_count

total number of NAKs issued on the PCIe link by the device

Definition: amdsmi.h:813

amdsmi_pcie_info_t::pcie_metric_::pcie_replay_roll_over_count

uint64_t pcie_replay_roll_over_count

total number of replay rollovers issued on the PCIe link

Definition: amdsmi.h:812

amdsmi_pcie_info_t::pcie_metric_::pcie_lc_perf_other_end_recovery_count

uint32_t pcie_lc_perf_other_end_recovery_count

PCIe other end recovery counter.

Definition: amdsmi.h:815

amdsmi_pcie_info_t::pcie_static_

Definition: amdsmi.h:798

amdsmi_pcie_info_t::pcie_static_::max_pcie_width

uint16_t max_pcie_width

maximum number of PCIe lanes

Definition: amdsmi.h:799

amdsmi_pcie_info_t::pcie_static_::max_pcie_interface_version

uint32_t max_pcie_interface_version

maximum PCIe link generation

Definition: amdsmi.h:803

amdsmi_pcie_info_t::pcie_static_::slot_type

amdsmi_card_form_factor_t slot_type

card form factor

Definition: amdsmi.h:802

amdsmi_pcie_info_t::pcie_static_::max_pcie_speed

uint32_t max_pcie_speed

maximum PCIe speed in GT/s

Definition: amdsmi.h:800

amdsmi_pcie_info_t::pcie_static_::pcie_interface_version

uint32_t pcie_interface_version

PCIe interface version.

Definition: amdsmi.h:801

amdsmi_pcie_info_t

pcie information

Definition: amdsmi.h:797

amdsmi_power_cap_info_t

Power Cap Information.

Definition: amdsmi.h:826

amdsmi_power_cap_info_t::power_cap

uint64_t power_cap

current power cap Units uW {@linux_bm} or W {@host}

Definition: amdsmi.h:827

amdsmi_power_cap_info_t::dpm_cap

uint64_t dpm_cap

dpm power cap Units MHz {@linux_bm} or Hz {@host}

Definition: amdsmi.h:829

amdsmi_power_cap_info_t::max_power_cap

uint64_t max_power_cap

maximum power cap Units uW {@linux_bm} or W {@host}

Definition: amdsmi.h:831

amdsmi_power_cap_info_t::default_power_cap

uint64_t default_power_cap

default power cap Units uW {@linux_bm} or W {@host}

Definition: amdsmi.h:828

amdsmi_power_cap_info_t::min_power_cap

uint64_t min_power_cap

minimum power cap Units uW {@linux_bm} or W {@host}

Definition: amdsmi.h:830

amdsmi_power_info_t

Power Information.

Definition: amdsmi.h:1092

amdsmi_power_info_t::soc_voltage

uint64_t soc_voltage

SOC voltage measurement in mV {@linux_bm} or V {@host}.

Definition: amdsmi.h:1097

amdsmi_power_info_t::socket_power

uint64_t socket_power

Socket power in W {@linux_bm}, uW {@host}.

Definition: amdsmi.h:1093

amdsmi_power_info_t::power_limit

uint32_t power_limit

The power limit in W {@linux_bm}, Linux only.

Definition: amdsmi.h:1099

amdsmi_power_info_t::mem_voltage

uint64_t mem_voltage

MEM voltage measurement in mV {@linux_bm} or V {@host}.

Definition: amdsmi.h:1098

amdsmi_power_info_t::current_socket_power

uint32_t current_socket_power

Current socket power in W {@linux_bm}, Linux only, Mi 300+ Series cards.

Definition: amdsmi.h:1094

amdsmi_power_info_t::average_socket_power

uint32_t average_socket_power

Average socket power in W {@linux_bm}, Linux only, Navi + Mi 200 and earlier Series cards.

Definition: amdsmi.h:1095

amdsmi_power_info_t::gfx_voltage

uint64_t gfx_voltage

GFX voltage measurement in mV {@linux_bm} or V {@host}.

Definition: amdsmi.h:1096

amdsmi_power_profile_status_t

This structure contains information about which power profiles are supported by the system for a give...

Definition: amdsmi.h:1647

amdsmi_power_profile_status_t::available_profiles

amdsmi_bit_field_t available_profiles

Which profiles are supported by this system.

Definition: amdsmi.h:1648

amdsmi_power_profile_status_t::current

amdsmi_power_profile_preset_masks_t current

Which power profile is currently active.

Definition: amdsmi.h:1649

amdsmi_power_profile_status_t::num_profiles

uint32_t num_profiles

How many power profiles are available.

Definition: amdsmi.h:1650

amdsmi_proc_info_t::engine_usage_

Definition: amdsmi.h:1148

amdsmi_proc_info_t::engine_usage_::enc

uint64_t enc

In nano-secs.

Definition: amdsmi.h:1150

amdsmi_proc_info_t::engine_usage_::gfx

uint64_t gfx

In nano-secs.

Definition: amdsmi.h:1149

amdsmi_proc_info_t::memory_usage_

Definition: amdsmi.h:1153

amdsmi_proc_info_t::memory_usage_::vram_mem

uint64_t vram_mem

In Bytes.

Definition: amdsmi.h:1156

amdsmi_proc_info_t::memory_usage_::cpu_mem

uint64_t cpu_mem

In Bytes.

Definition: amdsmi.h:1155

amdsmi_proc_info_t::memory_usage_::gtt_mem

uint64_t gtt_mem

In Bytes.

Definition: amdsmi.h:1154

amdsmi_proc_info_t

Process Information.

Definition: amdsmi.h:1144

amdsmi_proc_info_t::cu_occupancy

uint32_t cu_occupancy

Num CUs utilized.

Definition: amdsmi.h:1160

amdsmi_proc_info_t::mem

uint64_t mem

In Bytes.

Definition: amdsmi.h:1147

amdsmi_process_info_t

This structure contains information specific to a process.

Definition: amdsmi.h:2081

amdsmi_process_info_t::sdma_usage

uint64_t sdma_usage

SDMA usage in microseconds.

Definition: amdsmi.h:2084

amdsmi_process_info_t::process_id

uint32_t process_id

Process ID.

Definition: amdsmi.h:2082

amdsmi_process_info_t::cu_occupancy

uint32_t cu_occupancy

Compute Unit usage in percent.

Definition: amdsmi.h:2085

amdsmi_process_info_t::vram_usage

uint64_t vram_usage

VRAM usage in MB.

Definition: amdsmi.h:2083

amdsmi_range_t

This structure represents a range (e.g., frequencies or voltages).

Definition: amdsmi.h:652

amdsmi_range_t::lower_bound

uint64_t lower_bound

Lower bound of range.

Definition: amdsmi.h:653

amdsmi_range_t::upper_bound

uint64_t upper_bound

Upper bound of range.

Definition: amdsmi.h:654

amdsmi_ras_feature_t

This structure holds ras feature.

Definition: amdsmi.h:2057

amdsmi_ras_feature_t::ecc_correction_schema_flag

uint32_t ecc_correction_schema_flag

Definition: amdsmi.h:2059

amdsmi_retired_page_record_t

Reserved Memory Page Record.

Definition: amdsmi.h:1634

amdsmi_retired_page_record_t::page_size

uint64_t page_size

Page size.

Definition: amdsmi.h:1636

amdsmi_retired_page_record_t::status

amdsmi_memory_page_status_t status

Page "reserved" status.

Definition: amdsmi.h:1637

amdsmi_retired_page_record_t::page_address

uint64_t page_address

Start address of page.

Definition: amdsmi.h:1635

amdsmi_smu_fw_version_t

This structure holds SMU Firmware version information.

Definition: amdsmi.h:2133

amdsmi_smu_fw_version_t::debug

uint8_t debug

SMU fw Debug version number.

Definition: amdsmi.h:2134

amdsmi_smu_fw_version_t::major

uint8_t major

SMU fw Major version number.

Definition: amdsmi.h:2136

amdsmi_smu_fw_version_t::unused

uint8_t unused

reserved fields

Definition: amdsmi.h:2137

amdsmi_smu_fw_version_t::minor

uint8_t minor

SMU fw Minor version number.

Definition: amdsmi.h:2135

amdsmi_sock_info_t

cpu socket info data

Definition: amdsmi.h:2344

amdsmi_temp_range_refresh_rate_t

temperature range and refresh rate metrics of a DIMM

Definition: amdsmi.h:2156

amdsmi_temp_range_refresh_rate_t::range

uint8_t range

temp range[2:0](3 bit data)

Definition: amdsmi.h:2157

amdsmi_temp_range_refresh_rate_t::ref_rate

uint8_t ref_rate

DDR refresh rate mode[3](1 bit data)

Definition: amdsmi.h:2158

amdsmi_topology_nearest_t

Topology Nearest.

Definition: amdsmi.h:2093

amdsmi_utilization_counter_t

The utilization counter data.

Definition: amdsmi.h:1622

amdsmi_utilization_counter_t::type

amdsmi_utilization_counter_type_t type

Utilization counter type.

Definition: amdsmi.h:1623

amdsmi_utilization_counter_t::value

uint64_t value

Coarse grain activity counter value (average)

Definition: amdsmi.h:1624

amdsmi_vbios_info_t

VBios Information.

Definition: amdsmi.h:840

amdsmi_version_t

This structure holds version information.

Definition: amdsmi.h:1710

amdsmi_version_t::minor

uint32_t minor

Minor version.

Definition: amdsmi.h:1712

amdsmi_version_t::major

uint32_t major

Major version.

Definition: amdsmi.h:1711

amdsmi_version_t::build

const char * build

Full Build version string.

Definition: amdsmi.h:1714

amdsmi_version_t::release

uint32_t release

Patch, build or stepping version.

Definition: amdsmi.h:1713

amdsmi_violation_status_t

This structure hold violation status information. Note: for MI3x asics and higher,...

Definition: amdsmi.h:688

amdsmi_violation_status_t::active_hbm_thrm

uint8_t active_hbm_thrm

High Bandwidth Memory (HBM) thermal violation; 1 = active 0 = not active; Max uint8 means unsupported...

Definition: amdsmi.h:712

amdsmi_violation_status_t::active_socket_thrm

uint8_t active_socket_thrm

Socket thermal violation; 1 = active 0 = not active; Max uint8 means unsupported.

Definition: amdsmi.h:710

amdsmi_violation_status_t::acc_ppt_pwr

uint64_t acc_ppt_pwr

PVIOL; Current accumulated Package Power Tracking (PPT) count; Max uint64 means unsupported.

Definition: amdsmi.h:693

amdsmi_violation_status_t::acc_hbm_thrm

uint64_t acc_hbm_thrm

Current accumulated High Bandwidth Memory (HBM) thermal count; Max uint64 means unsupported.

Definition: amdsmi.h:696

amdsmi_violation_status_t::acc_gfx_clk_below_host_limit

uint64_t acc_gfx_clk_below_host_limit

Definition: amdsmi.h:697

amdsmi_violation_status_t::active_gfx_clk_below_host_limit

uint8_t active_gfx_clk_below_host_limit

Definition: amdsmi.h:713

amdsmi_violation_status_t::per_hbm_thrm

uint64_t per_hbm_thrm

High Bandwidth Memory (HBM) thermal violation % (greater than 0% is a violation); Max uint64 means un...

Definition: amdsmi.h:704

amdsmi_violation_status_t::per_prochot_thrm

uint64_t per_prochot_thrm

Processor hot violation % (greater than 0% is a violation); Max uint64 means unsupported.

Definition: amdsmi.h:700

amdsmi_violation_status_t::active_vr_thrm

uint8_t active_vr_thrm

Voltage regulator violation; 1 = active 0 = not active; Max uint8 means unsupported.

Definition: amdsmi.h:711

amdsmi_violation_status_t::per_ppt_pwr

uint64_t per_ppt_pwr

PVIOL; Package Power Tracking (PPT) violation % (greater than 0% is a violation); Max uint64 means un...

Definition: amdsmi.h:701

amdsmi_violation_status_t::acc_vr_thrm

uint64_t acc_vr_thrm

Current accumulated voltage regulator count; Max uint64 means unsupported.

Definition: amdsmi.h:695

amdsmi_violation_status_t::per_gfx_clk_below_host_limit

uint64_t per_gfx_clk_below_host_limit

Definition: amdsmi.h:705

amdsmi_violation_status_t::per_socket_thrm

uint64_t per_socket_thrm

TVIOL; Socket thermal violation % (greater than 0% is a violation); Max uint64 means unsupported.

Definition: amdsmi.h:702

amdsmi_violation_status_t::per_vr_thrm

uint64_t per_vr_thrm

Voltage regulator violation % (greater than 0% is a violation); Max uint64 means unsupported.

Definition: amdsmi.h:703

amdsmi_violation_status_t::active_prochot_thrm

uint8_t active_prochot_thrm

Processor hot violation; 1 = active 0 = not active; Max uint8 means unsupported.

Definition: amdsmi.h:708

amdsmi_violation_status_t::acc_counter

uint64_t acc_counter

Current accumulated counter; Max uint64 means unsupported.

Definition: amdsmi.h:691

amdsmi_violation_status_t::reference_timestamp

uint64_t reference_timestamp

Represents CPU timestamp in microseconds (uS)

Definition: amdsmi.h:689

amdsmi_violation_status_t::active_ppt_pwr

uint8_t active_ppt_pwr

Package Power Tracking (PPT) violation; 1 = active 0 = not active; Max uint8 means unsupported.

Definition: amdsmi.h:709

amdsmi_violation_status_t::acc_socket_thrm

uint64_t acc_socket_thrm

TVIOL; Current accumulated Socket thermal count; Max uint64 means unsupported.

Definition: amdsmi.h:694

amdsmi_violation_status_t::violation_timestamp

uint64_t violation_timestamp

Violation time. Units in nanoseconds (ns) {@linux_bm}, in milliseconds (ms) {@host}.

Definition: amdsmi.h:690

amdsmi_violation_status_t::acc_prochot_thrm

uint64_t acc_prochot_thrm

Current accumulated processor hot violation count; Max uint64 means unsupported.

Definition: amdsmi.h:692

amdsmi_vram_info_t

VRam Information.

Definition: amdsmi.h:1053

amdsmi_vram_info_t::vram_bit_width

uint32_t vram_bit_width

In bits.

Definition: amdsmi.h:1057

amdsmi_vram_info_t::vram_size

uint64_t vram_size

vram size in MB

Definition: amdsmi.h:1056

amdsmi_vram_info_t::vram_max_bandwidth

uint64_t vram_max_bandwidth

The VRAM max bandwidth at current memory clock (GB/s)

Definition: amdsmi.h:1058

amdsmi_vram_usage_t

VRam Usage.

Definition: amdsmi.h:676

amdsmi_vram_usage_t::vram_total

uint32_t vram_total

In MB.

Definition: amdsmi.h:677

amdsmi_vram_usage_t::vram_used

uint32_t vram_used

In MB.

Definition: amdsmi.h:678

amdsmi_xgmi_info_t

XGMI Information.

Definition: amdsmi.h:663

amdsmi_xgmi_link_status_t

XGMI Link Status.

Definition: amdsmi.h:2023

amdsmi_xgmi_link_status_t::total_links

uint32_t total_links

The total links in the status array.

Definition: amdsmi.h:2024

amdsmi_bdf_t

bdf types

Definition: amdsmi.h:751

amdsmi_cper_valid_bits_t

Definition: amdsmi.h:4789

amdsmi_nps_caps_t

This union holds memory partition bitmask.

Definition: amdsmi.h:931