amdsmi.h Source File

amdsmi.h Source File#

AMD SMI: amdsmi.h Source File
amdsmi.h
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1 /*
2  * =============================================================================
3  * The University of Illinois/NCSA
4  * Open Source License (NCSA)
5  *
6  * Copyright (c) 2024, Advanced Micro Devices, Inc.
7  * All rights reserved.
8  *
9  * Developed by:
10  *
11  * AMD Research and AMD ROC Software Development
12  *
13  * Advanced Micro Devices, Inc.
14  *
15  * www.amd.com
16  *
17  * Permission is hereby granted, free of charge, to any person obtaining a copy
18  * of this software and associated documentation files (the "Software"), to
19  * deal with the Software without restriction, including without limitation
20  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
21  * and/or sell copies of the Software, and to permit persons to whom the
22  * Software is furnished to do so, subject to the following conditions:
23  *
24  * - Redistributions of source code must retain the above copyright notice,
25  * this list of conditions and the following disclaimers.
26  * - Redistributions in binary form must reproduce the above copyright
27  * notice, this list of conditions and the following disclaimers in
28  * the documentation and/or other materials provided with the distribution.
29  * - Neither the names of <Name of Development Group, Name of Institution>,
30  * nor the names of its contributors may be used to endorse or promote
31  * products derived from this Software without specific prior written
32  * permission.
33  *
34  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37  * THE CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
38  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
39  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
40  * DEALINGS WITH THE SOFTWARE.
41  *
42  */
43 #ifndef INCLUDE_AMDSMI_H_
44 #define INCLUDE_AMDSMI_H_
45 
51 #include <stdlib.h>
52 #include <stdbool.h>
53 #ifdef __cplusplus
54 extern "C" {
55 #include <cstdint>
56 #ifdef ENABLE_ESMI_LIB
57  #include <e_smi/e_smi.h>
58 #endif
59 
60 #else
61 #include <stdint.h>
62 #endif // __cplusplus
63 
69 typedef enum {
71  AMDSMI_INIT_AMD_CPUS = (1 << 0),
72  AMDSMI_INIT_AMD_GPUS = (1 << 1),
73  AMDSMI_INIT_NON_AMD_CPUS = (1 << 2),
74  AMDSMI_INIT_NON_AMD_GPUS = (1 << 3),
75  AMDSMI_INIT_AMD_APUS = (AMDSMI_INIT_AMD_CPUS | AMDSMI_INIT_AMD_GPUS) // Default option
77 
78 /* Maximum size definitions AMDSMI */
79 #define AMDSMI_MAX_MM_IP_COUNT 8
80 #define AMDSMI_MAX_DATE_LENGTH 32
81 #define AMDSMI_MAX_STRING_LENGTH 64
82 #define AMDSMI_NORMAL_STRING_LENGTH 32
83 #define AMDSMI_MAX_DEVICES 32
84 #define AMDSMI_MAX_NAME 32
85 #define AMDSMI_MAX_DRIVER_VERSION_LENGTH 80
86 #define AMDSMI_256_LENGTH 256
87 #define AMDSMI_MAX_CONTAINER_TYPE 2
88 #define AMDSMI_MAX_CACHE_TYPES 10
89 #define AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK 64
90 #define AMDSMI_MAX_ACCELERATOR_PROFILE 32
91 #define AMDSMI_MAX_CP_PROFILE_RESOURCES 32
92 #define AMDSMI_MAX_ACCELERATOR_PARTITIONS 8
93 
94 #define AMDSMI_GPU_UUID_SIZE 38
95 
103 #define CENTRIGRADE_TO_MILLI_CENTIGRADE 1000
104 
108 #define AMDSMI_NUM_HBM_INSTANCES 4
109 
113 #define AMDSMI_MAX_NUM_VCN 4
114 
118 #define AMDSMI_MAX_NUM_CLKS 4
119 
123 #define AMDSMI_MAX_NUM_XGMI_LINKS 8
124 
128 #define AMDSMI_MAX_NUM_GFX_CLKS 8
129 
133 #define AMDSMI_MAX_AID 4
134 
138 #define AMDSMI_MAX_ENGINES 8
139 
143 #define AMDSMI_MAX_NUM_JPEG 32
144 
154 #define AMDSMI_MAX_NUM_XCC 8
155 
166 #define AMDSMI_MAX_NUM_XCP 8
167 
168 /* string format */
169 #define AMDSMI_TIME_FORMAT "%02d:%02d:%02d.%03d"
170 #define AMDSMI_DATE_FORMAT "%04d-%02d-%02d:%02d:%02d:%02d.%03d"
171 
177 #define AMDSMI_LIB_VERSION_YEAR 24
178 
180 #define AMDSMI_LIB_VERSION_MAJOR 7
181 
183 #define AMDSMI_LIB_VERSION_MINOR 1
184 
186 #define AMDSMI_LIB_VERSION_RELEASE 0
187 
188 #define AMDSMI_LIB_VERSION_CREATE_STRING(YEAR, MAJOR, MINOR, RELEASE) (#YEAR "." #MAJOR "." #MINOR "." #RELEASE)
189 #define AMDSMI_LIB_VERSION_EXPAND_PARTS(YEAR_STR, MAJOR_STR, MINOR_STR, RELEASE_STR) AMDSMI_LIB_VERSION_CREATE_STRING(YEAR_STR, MAJOR_STR, MINOR_STR, RELEASE_STR)
190 #define AMDSMI_LIB_VERSION_STRING AMDSMI_LIB_VERSION_EXPAND_PARTS(AMDSMI_LIB_VERSION_YEAR, AMDSMI_LIB_VERSION_MAJOR, AMDSMI_LIB_VERSION_MINOR, AMDSMI_LIB_VERSION_RELEASE)
191 
192 typedef enum {
193  AMDSMI_MM_UVD,
194  AMDSMI_MM_VCE,
195  AMDSMI_MM_VCN,
196  AMDSMI_MM__MAX
197 } amdsmi_mm_ip_t;
198 
199 typedef enum {
200  AMDSMI_CONTAINER_LXC,
201  AMDSMI_CONTAINER_DOCKER,
202 } amdsmi_container_types_t;
203 
206 typedef void *amdsmi_socket_handle;
207 #ifdef ENABLE_ESMI_LIB
208 typedef void *amdsmi_cpusocket_handle;
209 #endif
210 
217 typedef enum {
218  AMDSMI_PROCESSOR_TYPE_UNKNOWN = 0,
219  AMDSMI_PROCESSOR_TYPE_AMD_GPU,
220  AMDSMI_PROCESSOR_TYPE_AMD_CPU,
221  AMDSMI_PROCESSOR_TYPE_NON_AMD_GPU,
222  AMDSMI_PROCESSOR_TYPE_NON_AMD_CPU,
223  AMDSMI_PROCESSOR_TYPE_AMD_CPU_CORE,
224  AMDSMI_PROCESSOR_TYPE_AMD_APU
226 
230 // Please avoid status codes that are multiples of 256 (256, 512, etc..)
231 // Return values in the shell get modulo 256 applied, meaning any multiple of 256 ends up as 0
232 typedef enum {
234  // Library usage errors
254  // Device related errors
260  // Data and size errors
265  //esmi errors
278 
279  // General errors
280  AMDSMI_STATUS_MAP_ERROR = 0xFFFFFFFE,
283 
287 typedef enum {
289  AMDSMI_CLK_TYPE_FIRST = AMDSMI_CLK_TYPE_SYS,
290  AMDSMI_CLK_TYPE_GFX = AMDSMI_CLK_TYPE_SYS,
294  AMDSMI_CLK_TYPE_SOC,
295  AMDSMI_CLK_TYPE_MEM,
296  AMDSMI_CLK_TYPE_PCIE,
297  AMDSMI_CLK_TYPE_VCLK0,
298  AMDSMI_CLK_TYPE_VCLK1,
299  AMDSMI_CLK_TYPE_DCLK0,
300  AMDSMI_CLK_TYPE_DCLK1,
301  AMDSMI_CLK_TYPE__MAX = AMDSMI_CLK_TYPE_DCLK1
303 
308 typedef enum {
309  AMDSMI_ACCELERATOR_PARTITION_INVALID = 0,
321 
326 typedef enum {
327  AMDSMI_COMPUTE_PARTITION_INVALID = 0,
339 
344 typedef enum {
345  AMDSMI_MEMORY_PARTITION_UNKNOWN = 0,
360 
365 typedef enum {
366  AMDSMI_TEMPERATURE_TYPE_EDGE,
367  AMDSMI_TEMPERATURE_TYPE_FIRST = AMDSMI_TEMPERATURE_TYPE_EDGE,
368  AMDSMI_TEMPERATURE_TYPE_HOTSPOT,
369  AMDSMI_TEMPERATURE_TYPE_JUNCTION = AMDSMI_TEMPERATURE_TYPE_HOTSPOT,
370  AMDSMI_TEMPERATURE_TYPE_VRAM,
371  AMDSMI_TEMPERATURE_TYPE_HBM_0,
372  AMDSMI_TEMPERATURE_TYPE_HBM_1,
373  AMDSMI_TEMPERATURE_TYPE_HBM_2,
374  AMDSMI_TEMPERATURE_TYPE_HBM_3,
375  AMDSMI_TEMPERATURE_TYPE_PLX,
376  AMDSMI_TEMPERATURE_TYPE__MAX = AMDSMI_TEMPERATURE_TYPE_PLX
378 
383 typedef enum {
384  AMDSMI_FW_ID_SMU = 1,
385  AMDSMI_FW_ID_FIRST = AMDSMI_FW_ID_SMU,
386  AMDSMI_FW_ID_CP_CE,
387  AMDSMI_FW_ID_CP_PFP,
388  AMDSMI_FW_ID_CP_ME,
389  AMDSMI_FW_ID_CP_MEC_JT1,
390  AMDSMI_FW_ID_CP_MEC_JT2,
391  AMDSMI_FW_ID_CP_MEC1,
392  AMDSMI_FW_ID_CP_MEC2,
393  AMDSMI_FW_ID_RLC,
394  AMDSMI_FW_ID_SDMA0,
395  AMDSMI_FW_ID_SDMA1,
396  AMDSMI_FW_ID_SDMA2,
397  AMDSMI_FW_ID_SDMA3,
398  AMDSMI_FW_ID_SDMA4,
399  AMDSMI_FW_ID_SDMA5,
400  AMDSMI_FW_ID_SDMA6,
401  AMDSMI_FW_ID_SDMA7,
402  AMDSMI_FW_ID_VCN,
403  AMDSMI_FW_ID_UVD,
404  AMDSMI_FW_ID_VCE,
405  AMDSMI_FW_ID_ISP,
406  AMDSMI_FW_ID_DMCU_ERAM, /*eRAM*/
407  AMDSMI_FW_ID_DMCU_ISR, /*ISR*/
408  AMDSMI_FW_ID_RLC_RESTORE_LIST_GPM_MEM,
409  AMDSMI_FW_ID_RLC_RESTORE_LIST_SRM_MEM,
410  AMDSMI_FW_ID_RLC_RESTORE_LIST_CNTL,
411  AMDSMI_FW_ID_RLC_V,
412  AMDSMI_FW_ID_MMSCH,
413  AMDSMI_FW_ID_PSP_SYSDRV,
414  AMDSMI_FW_ID_PSP_SOSDRV,
415  AMDSMI_FW_ID_PSP_TOC,
416  AMDSMI_FW_ID_PSP_KEYDB,
417  AMDSMI_FW_ID_DFC,
418  AMDSMI_FW_ID_PSP_SPL,
419  AMDSMI_FW_ID_DRV_CAP,
420  AMDSMI_FW_ID_MC,
421  AMDSMI_FW_ID_PSP_BL,
422  AMDSMI_FW_ID_CP_PM4,
423  AMDSMI_FW_ID_RLC_P,
424  AMDSMI_FW_ID_SEC_POLICY_STAGE2,
425  AMDSMI_FW_ID_REG_ACCESS_WHITELIST,
426  AMDSMI_FW_ID_IMU_DRAM,
427  AMDSMI_FW_ID_IMU_IRAM,
428  AMDSMI_FW_ID_SDMA_TH0,
429  AMDSMI_FW_ID_SDMA_TH1,
430  AMDSMI_FW_ID_CP_MES,
431  AMDSMI_FW_ID_MES_KIQ,
432  AMDSMI_FW_ID_MES_STACK,
433  AMDSMI_FW_ID_MES_THREAD1,
434  AMDSMI_FW_ID_MES_THREAD1_STACK,
435  AMDSMI_FW_ID_RLX6,
436  AMDSMI_FW_ID_RLX6_DRAM_BOOT,
437  AMDSMI_FW_ID_RS64_ME,
438  AMDSMI_FW_ID_RS64_ME_P0_DATA,
439  AMDSMI_FW_ID_RS64_ME_P1_DATA,
440  AMDSMI_FW_ID_RS64_PFP,
441  AMDSMI_FW_ID_RS64_PFP_P0_DATA,
442  AMDSMI_FW_ID_RS64_PFP_P1_DATA,
443  AMDSMI_FW_ID_RS64_MEC,
444  AMDSMI_FW_ID_RS64_MEC_P0_DATA,
445  AMDSMI_FW_ID_RS64_MEC_P1_DATA,
446  AMDSMI_FW_ID_RS64_MEC_P2_DATA,
447  AMDSMI_FW_ID_RS64_MEC_P3_DATA,
448  AMDSMI_FW_ID_PPTABLE,
449  AMDSMI_FW_ID_PSP_SOC,
450  AMDSMI_FW_ID_PSP_DBG,
451  AMDSMI_FW_ID_PSP_INTF,
452  AMDSMI_FW_ID_RLX6_CORE1,
453  AMDSMI_FW_ID_RLX6_DRAM_BOOT_CORE1,
454  AMDSMI_FW_ID_RLCV_LX7,
455  AMDSMI_FW_ID_RLC_SAVE_RESTORE_LIST,
456  AMDSMI_FW_ID_ASD,
457  AMDSMI_FW_ID_TA_RAS,
458  AMDSMI_FW_ID_TA_XGMI,
459  AMDSMI_FW_ID_RLC_SRLG,
460  AMDSMI_FW_ID_RLC_SRLS,
461  AMDSMI_FW_ID_PM,
462  AMDSMI_FW_ID_DMCU,
463  AMDSMI_FW_ID__MAX
465 
466 typedef enum {
467  AMDSMI_VRAM_TYPE_UNKNOWN = 0,
468  // HBM
469  AMDSMI_VRAM_TYPE_HBM = 1,
470  AMDSMI_VRAM_TYPE_HBM2 = 2,
471  AMDSMI_VRAM_TYPE_HBM2E = 3,
472  AMDSMI_VRAM_TYPE_HBM3 = 4,
473  // DDR
474  AMDSMI_VRAM_TYPE_DDR2 = 10,
475  AMDSMI_VRAM_TYPE_DDR3 = 11,
476  AMDSMI_VRAM_TYPE_DDR4 = 12,
477  // GDDR
478  AMDSMI_VRAM_TYPE_GDDR1 = 17,
479  AMDSMI_VRAM_TYPE_GDDR2 = 18,
480  AMDSMI_VRAM_TYPE_GDDR3 = 19,
481  AMDSMI_VRAM_TYPE_GDDR4 = 20,
482  AMDSMI_VRAM_TYPE_GDDR5 = 21,
483  AMDSMI_VRAM_TYPE_GDDR6 = 22,
484  AMDSMI_VRAM_TYPE_GDDR7 = 23,
485  AMDSMI_VRAM_TYPE__MAX = AMDSMI_VRAM_TYPE_GDDR7
486 } amdsmi_vram_type_t;
487 
488 typedef enum {
489  AMDSMI_VRAM_VENDOR__PLACEHOLDER0,
490  AMDSMI_VRAM_VENDOR__SAMSUNG,
491  AMDSMI_VRAM_VENDOR__INFINEON,
492  AMDSMI_VRAM_VENDOR__ELPIDA,
493  AMDSMI_VRAM_VENDOR__ETRON,
494  AMDSMI_VRAM_VENDOR__NANYA,
495  AMDSMI_VRAM_VENDOR__HYNIX,
496  AMDSMI_VRAM_VENDOR__MOSEL,
497  AMDSMI_VRAM_VENDOR__WINBOND,
498  AMDSMI_VRAM_VENDOR__ESMT,
499  AMDSMI_VRAM_VENDOR__PLACEHOLDER1,
500  AMDSMI_VRAM_VENDOR__PLACEHOLDER2,
501  AMDSMI_VRAM_VENDOR__PLACEHOLDER3,
502  AMDSMI_VRAM_VENDOR__PLACEHOLDER4,
503  AMDSMI_VRAM_VENDOR__PLACEHOLDER5,
504  AMDSMI_VRAM_VENDOR__MICRON,
505 } amdsmi_vram_vendor_type_t;
506 
510 typedef struct {
511  uint64_t lower_bound;
512  uint64_t upper_bound;
513  uint64_t reserved[2];
515 
516 typedef struct {
517  uint8_t xgmi_lanes;
518  uint64_t xgmi_hive_id;
519  uint64_t xgmi_node_id;
520  uint32_t index;
521  uint32_t reserved[9];
523 
524 typedef struct {
525  uint32_t vram_total;
526  uint32_t vram_used;
527  uint32_t reserved[2];
532 typedef struct {
535  uint64_t acc_counter;
536  uint64_t acc_prochot_thrm;
537  uint64_t acc_ppt_pwr;
538  uint64_t acc_socket_thrm;
539  uint64_t acc_vr_thrm;
540  uint64_t acc_hbm_thrm;
541  uint64_t per_prochot_thrm;
542  uint64_t per_ppt_pwr;
543  uint64_t per_socket_thrm;
544  uint64_t per_vr_thrm;
545  uint64_t per_hbm_thrm;
547  uint8_t active_ppt_pwr;
549  uint8_t active_vr_thrm;
550  uint8_t active_hbm_thrm;
551  uint64_t reserved[30]; // Reserved for new violation info
553 typedef struct {
554  amdsmi_range_t supported_freq_range;
555  amdsmi_range_t current_freq_range;
556  uint32_t reserved[8];
558 
559 typedef union {
560  struct {
561  uint64_t function_number : 3;
562  uint64_t device_number : 5;
563  uint64_t bus_number : 8;
564  uint64_t domain_number : 48;
565  };
566  uint64_t as_uint;
567 } amdsmi_bdf_t;
568 
569 typedef enum {
570  AMDSMI_CARD_FORM_FACTOR_PCIE,
571  AMDSMI_CARD_FORM_FACTOR_OAM,
572  AMDSMI_CARD_FORM_FACTOR_CEM,
573  AMDSMI_CARD_FORM_FACTOR_UNKNOWN
574 } amdsmi_card_form_factor_t;
575 
576 typedef struct {
577  struct pcie_static_ {
578  uint16_t max_pcie_width;
579  uint32_t max_pcie_speed;
581  amdsmi_card_form_factor_t slot_type;
582  uint64_t reserved[10];
583  } pcie_static;
584  struct pcie_metric_ {
585  uint16_t pcie_width;
586  uint32_t pcie_speed;
587  uint32_t pcie_bandwidth;
588  uint64_t pcie_replay_count;
594  uint64_t reserved[12];
595  } pcie_metric;
596  uint64_t reserved[32];
598 
599 typedef struct {
600  uint64_t power_cap;
601  uint64_t default_power_cap;
602  uint64_t dpm_cap;
603  uint64_t min_power_cap;
604  uint64_t max_power_cap;
605  uint64_t reserved[3];
607 
608 typedef struct {
609  char name[AMDSMI_MAX_STRING_LENGTH];
610  char build_date[AMDSMI_MAX_DATE_LENGTH];
611  char part_number[AMDSMI_MAX_STRING_LENGTH];
612  char version[AMDSMI_NORMAL_STRING_LENGTH];
613  uint32_t reserved[16];
615 
619 typedef enum {
620  AMDSMI_CACHE_PROPERTY_ENABLED = 0x00000001,
621  AMDSMI_CACHE_PROPERTY_DATA_CACHE = 0x00000002,
622  AMDSMI_CACHE_PROPERTY_INST_CACHE = 0x00000004,
623  AMDSMI_CACHE_PROPERTY_CPU_CACHE = 0x00000008,
624  AMDSMI_CACHE_PROPERTY_SIMD_CACHE = 0x00000010,
626 
627 typedef struct {
628  uint32_t num_cache_types;
629  struct cache_ {
630  uint32_t cache_properties; // amdsmi_cache_property_type_t which is a bitmask
631  uint32_t cache_size; /* In KB */
632  uint32_t cache_level;
633  uint32_t max_num_cu_shared; /* Indicates how many Compute Units share this cache instance */
634  uint32_t num_cache_instance; /* total number of instance of this cache type */
635  uint32_t reserved[3];
636  } cache[AMDSMI_MAX_CACHE_TYPES];
637  uint32_t reserved[15];
639 
640 typedef struct {
641  uint8_t num_fw_info;
642  struct fw_info_list_ {
643  amdsmi_fw_block_t fw_id;
644  uint64_t fw_version;
645  uint64_t reserved[2];
646  } fw_info_list[AMDSMI_FW_ID__MAX];
647  uint32_t reserved[7];
649 
650 typedef struct {
651  char market_name[AMDSMI_256_LENGTH];
652  uint32_t vendor_id; //< Use 32 bit to be compatible with other platform.
653  char vendor_name[AMDSMI_MAX_STRING_LENGTH];
654  uint32_t subvendor_id; //< The subsystem vendor id
655  uint64_t device_id; //< The device id of a GPU
656  uint32_t rev_id;
657  char asic_serial[AMDSMI_NORMAL_STRING_LENGTH];
658  uint32_t oam_id; //< 0xFFFF if not supported
659  uint32_t num_of_compute_units; //< 0xFFFFFFFF if not supported
660  uint64_t target_graphics_version; //< 0xFFFFFFFFFFFFFFFF if not supported
661  uint32_t reserved[15];
663 
664 typedef struct {
665  uint64_t kfd_id; //< 0xFFFFFFFFFFFFFFFF if not supported
666  uint32_t node_id; //< 0xFFFFFFFF if not supported
667  uint32_t current_partition_id; //< 0xFFFFFFFF if not supported
668  uint32_t reserved[12];
670 
675 typedef union {
676  struct nps_flags_ {
677  uint32_t nps1_cap :1; // bool 1 = true; 0 = false; Max uint32 means unsupported
678  uint32_t nps2_cap :1; // bool 1 = true; 0 = false; Max uint32 means unsupported
679  uint32_t nps4_cap :1; // bool 1 = true; 0 = false; Max uint32 means unsupported
680  uint32_t nps8_cap :1; // bool 1 = true; 0 = false; Max uint32 means unsupported
681  uint32_t reserved :28;
682  } amdsmi_nps_flags_t;
683 
684  uint32_t nps_cap_mask;
686 
691 typedef struct {
692  amdsmi_accelerator_partition_type_t profile_type; // SPX, DPX, QPX, CPX and so on
693  uint32_t num_partitions; // On MI300X, SPX: 1, DPX: 2, QPX: 4, CPX: 8, length of resources array
694  amdsmi_nps_caps_t memory_caps; // Possible memory partition capabilities
695  uint32_t profile_index;
696  uint32_t num_resources; // length of index_of_resources_profile
697  uint32_t resources[AMDSMI_MAX_ACCELERATOR_PARTITIONS][AMDSMI_MAX_CP_PROFILE_RESOURCES];
698  uint64_t reserved[13];
700 
701 typedef enum {
702  AMDSMI_LINK_TYPE_INTERNAL,
703  AMDSMI_LINK_TYPE_XGMI,
704  AMDSMI_LINK_TYPE_PCIE,
705  AMDSMI_LINK_TYPE_NOT_APPLICABLE,
706  AMDSMI_LINK_TYPE_UNKNOWN
707 } amdsmi_link_type_t;
708 
709 typedef struct {
710  uint32_t num_links;
711  struct _links {
712  amdsmi_bdf_t bdf;
713  uint32_t bit_rate;
714  uint32_t max_bandwidth;
715  amdsmi_link_type_t link_type;
716  uint64_t read;
717  uint64_t write;
718  uint64_t reserved[2];
719  } links[AMDSMI_MAX_NUM_XGMI_PHYSICAL_LINK];
720  uint64_t reserved[7];
722 
723 typedef struct {
724  amdsmi_vram_type_t vram_type;
725  amdsmi_vram_vendor_type_t vram_vendor;
726  uint64_t vram_size;
727  uint32_t vram_bit_width;
728  uint64_t reserved[5];
730 
731 
732 typedef struct {
733  char driver_version[AMDSMI_MAX_STRING_LENGTH];
734  char driver_date[AMDSMI_MAX_STRING_LENGTH];
735  char driver_name[AMDSMI_MAX_STRING_LENGTH];
737 
738 typedef struct {
739  char model_number[AMDSMI_256_LENGTH];
740  char product_serial[AMDSMI_NORMAL_STRING_LENGTH];
741  char fru_id[AMDSMI_NORMAL_STRING_LENGTH];
742  char product_name[AMDSMI_256_LENGTH];
743  char manufacturer_name[AMDSMI_MAX_STRING_LENGTH];
744  uint32_t reserved[32];
746 
747 typedef struct {
748  uint32_t current_socket_power;
749  uint32_t average_socket_power;
750  uint32_t gfx_voltage; // GFX voltage measurement in mV
751  uint32_t soc_voltage; // SOC voltage measurement in mV
752  uint32_t mem_voltage; // MEM voltage measurement in mV
753  uint32_t power_limit; // The power limit;
754  uint32_t reserved[11];
756 
757 typedef struct {
758  uint32_t clk;
759  uint32_t min_clk;
760  uint32_t max_clk;
761  uint8_t clk_locked;
762  uint8_t clk_deep_sleep;
763  uint32_t reserved[4];
765 
772 typedef struct {
773  uint32_t gfx_activity;
774  uint32_t umc_activity;
775  uint32_t mm_activity;
776  uint32_t reserved[13];
778 typedef uint32_t amdsmi_process_handle_t;
779 
780 
781 typedef struct {
782  char name[AMDSMI_NORMAL_STRING_LENGTH];
783  amdsmi_process_handle_t pid;
784  uint64_t mem;
785  struct engine_usage_ {
786  uint64_t gfx;
787  uint64_t enc;
788  uint32_t reserved[12];
789  } engine_usage;
790  struct memory_usage_ {
791  uint64_t gtt_mem;
792  uint64_t cpu_mem;
793  uint64_t vram_mem;
794  uint32_t reserved[10];
795  } memory_usage;
796  char container_name[AMDSMI_NORMAL_STRING_LENGTH];
797  uint32_t reserved[4];
799 
803 typedef struct {
804  uint8_t is_iolink_coherent; // 1 = true, 0 = false, UINT8_MAX = Not defined.
805  uint8_t is_iolink_atomics_32bit;
806  uint8_t is_iolink_atomics_64bit;
807  uint8_t is_iolink_dma;
808  uint8_t is_iolink_bi_directional;
810 
811 
813 #define AMDSMI_MAX_NUM_FREQUENCIES 33
814 
817 #define AMDSMI_MAX_FAN_SPEED 255
818 
820 #define AMDSMI_NUM_VOLTAGE_CURVE_POINTS 3
824 typedef enum {
826  AMDSMI_DEV_PERF_LEVEL_FIRST = AMDSMI_DEV_PERF_LEVEL_AUTO,
827 
842 
843  AMDSMI_DEV_PERF_LEVEL_LAST = AMDSMI_DEV_PERF_LEVEL_DETERMINISM,
844 
847 
860 typedef uintptr_t amdsmi_event_handle_t;
861 
868 typedef enum {
871  AMDSMI_EVNT_GRP_INVALID = 0xFFFFFFFF
873 
880 typedef enum {
881  AMDSMI_EVNT_FIRST = AMDSMI_EVNT_GRP_XGMI,
882 
883  AMDSMI_EVNT_XGMI_FIRST = AMDSMI_EVNT_GRP_XGMI,
884  AMDSMI_EVNT_XGMI_0_NOP_TX = AMDSMI_EVNT_XGMI_FIRST,
889 
902  // ie, Throughput = BEATS/time_running 10^9 bytes/sec
912 
913  AMDSMI_EVNT_XGMI_LAST = AMDSMI_EVNT_XGMI_1_BEATS_TX, // 5
914 
915  AMDSMI_EVNT_XGMI_DATA_OUT_FIRST = AMDSMI_EVNT_GRP_XGMI_DATA_OUT, // 10
916 
917  /*
918  * @brief Events in the AMDSMI_EVNT_GRP_XGMI_DATA_OUT group measure
919  * the number of beats sent on an XGMI link. Each beat represents
920  * 32 bytes. AMDSMI_EVNT_XGMI_DATA_OUT_n represents the number of
921  * outbound beats (each representing 32 bytes) on link n.<br><br>
922  *
923  * XGMI throughput can be calculated by multiplying a event
924  * such as ::AMDSMI_EVNT_XGMI_DATA_OUT_n by 32 and dividing by
925  * the time for which event collection occurred,
926  * ::amdsmi_counter_value_t.time_running (which is in nanoseconds). To get
927  * bytes per second, multiply this value by 10<sup>9</sup>.<br>
928  * <br>
929  * Throughput = BEATS/time_running * 10<sup>9</sup> (bytes/second)<br>
930  */
931  // ie, Throughput = BEATS/time_running 10^9 bytes/sec
932  AMDSMI_EVNT_XGMI_DATA_OUT_0 = AMDSMI_EVNT_XGMI_DATA_OUT_FIRST,
938  AMDSMI_EVNT_XGMI_DATA_OUT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_5,
939 
940  AMDSMI_EVNT_LAST = AMDSMI_EVNT_XGMI_DATA_OUT_LAST,
942 
946 typedef enum {
951 
955 typedef struct {
956  uint64_t value;
957  uint64_t time_enabled;
959  uint64_t time_running;
962 
966 typedef enum {
969  AMDSMI_EVT_NOTIF_FIRST = AMDSMI_EVT_NOTIF_VMFAULT,
970  AMDSMI_EVT_NOTIF_THERMAL_THROTTLE = 2,
971  AMDSMI_EVT_NOTIF_GPU_PRE_RESET = 3,
972  AMDSMI_EVT_NOTIF_GPU_POST_RESET = 4,
973  AMDSMI_EVT_NOTIF_RING_HANG = 5,
974 
975  AMDSMI_EVT_NOTIF_LAST = AMDSMI_EVT_NOTIF_RING_HANG
977 
981 #define AMDSMI_EVENT_MASK_FROM_INDEX(i) (1ULL << ((i) - 1))
982 
984 #define MAX_EVENT_NOTIFICATION_MSG_SIZE 64
985 
989 typedef struct {
994 
1000 typedef enum {
1002  AMDSMI_TEMP_FIRST = AMDSMI_TEMP_CURRENT,
1003 
1034 
1035  AMDSMI_TEMP_LAST = AMDSMI_TEMP_HIGHEST
1037 
1043 typedef enum {
1045 
1046  AMDSMI_VOLT_FIRST = AMDSMI_VOLT_CURRENT,
1054 
1055  AMDSMI_VOLT_LAST = AMDSMI_VOLT_HIGHEST
1057 
1062 typedef enum {
1063  AMDSMI_VOLT_TYPE_FIRST = 0,
1064 
1065  AMDSMI_VOLT_TYPE_VDDGFX = AMDSMI_VOLT_TYPE_FIRST,
1067  AMDSMI_VOLT_TYPE_LAST = AMDSMI_VOLT_TYPE_VDDGFX,
1068  AMDSMI_VOLT_TYPE_INVALID = 0xFFFFFFFF
1070 
1077 typedef enum {
1083 
1085  AMDSMI_PWR_PROF_PRST_3D_FULL_SCR_MASK = 0x20,
1088 
1090  AMDSMI_PWR_PROF_PRST_INVALID = 0xFFFFFFFFFFFFFFFF
1092 
1096 typedef enum {
1097  AMDSMI_GPU_BLOCK_INVALID = 0x0000000000000000,
1099  AMDSMI_GPU_BLOCK_FIRST = 0x0000000000000001,
1100 
1101  AMDSMI_GPU_BLOCK_UMC = AMDSMI_GPU_BLOCK_FIRST,
1102  AMDSMI_GPU_BLOCK_SDMA = 0x0000000000000002,
1103  AMDSMI_GPU_BLOCK_GFX = 0x0000000000000004,
1104  AMDSMI_GPU_BLOCK_MMHUB = 0x0000000000000008,
1105  AMDSMI_GPU_BLOCK_ATHUB = 0x0000000000000010,
1106  AMDSMI_GPU_BLOCK_PCIE_BIF = 0x0000000000000020,
1107  AMDSMI_GPU_BLOCK_HDP = 0x0000000000000040,
1108  AMDSMI_GPU_BLOCK_XGMI_WAFL = 0x0000000000000080,
1109  AMDSMI_GPU_BLOCK_DF = 0x0000000000000100,
1110  AMDSMI_GPU_BLOCK_SMN = 0x0000000000000200,
1111  AMDSMI_GPU_BLOCK_SEM = 0x0000000000000400,
1112  AMDSMI_GPU_BLOCK_MP0 = 0x0000000000000800,
1113  AMDSMI_GPU_BLOCK_MP1 = 0x0000000000001000,
1114  AMDSMI_GPU_BLOCK_FUSE = 0x0000000000002000,
1115  AMDSMI_GPU_BLOCK_MCA = 0x0000000000004000,
1116  AMDSMI_GPU_BLOCK_VCN = 0x0000000000008000,
1117  AMDSMI_GPU_BLOCK_JPEG = 0x0000000000010000,
1118  AMDSMI_GPU_BLOCK_IH = 0x0000000000020000,
1119  AMDSMI_GPU_BLOCK_MPIO = 0x0000000000040000,
1120 
1123  AMDSMI_GPU_BLOCK_RESERVED = 0x8000000000000000
1125 
1126 
1130 typedef enum {
1131  CLK_LIMIT_MIN,
1132  CLK_LIMIT_MAX
1134 
1138 typedef enum {
1147 
1148  AMDSMI_RAS_ERR_STATE_LAST = AMDSMI_RAS_ERR_STATE_ENABLED,
1149  AMDSMI_RAS_ERR_STATE_INVALID = 0xFFFFFFFF
1151 
1155 typedef enum {
1156  AMDSMI_MEM_TYPE_FIRST = 0,
1157 
1158  AMDSMI_MEM_TYPE_VRAM = AMDSMI_MEM_TYPE_FIRST,
1161 
1162  AMDSMI_MEM_TYPE_LAST = AMDSMI_MEM_TYPE_GTT
1164 
1168 typedef enum {
1171  AMDSMI_FREQ_IND_INVALID = 0xFFFFFFFF
1173 
1177 typedef enum {
1178  AMDSMI_XGMI_STATUS_NO_ERRORS = 0,
1179  AMDSMI_XGMI_STATUS_ERROR,
1180  AMDSMI_XGMI_STATUS_MULTIPLE_ERRORS,
1182 
1186 typedef uint64_t amdsmi_bit_field_t;
1187 
1191 typedef enum {
1199 
1203 typedef enum {
1208  AMDSMI_IOLINK_TYPE_SIZE = 0xFFFFFFFF
1210 
1214 typedef enum {
1217  AMDSMI_COARSE_GRAIN_GFX_ACTIVITY = AMDSMI_UTILIZATION_COUNTER_FIRST,
1221  AMDSMI_FINE_GRAIN_GFX_ACTIVITY = 100,
1222  AMDSMI_FINE_GRAIN_MEM_ACTIVITY = 101,
1223  AMDSMI_FINE_DECODER_ACTIVITY = 102,
1224  AMDSMI_UTILIZATION_COUNTER_LAST = AMDSMI_FINE_DECODER_ACTIVITY
1226 
1230 typedef enum {
1233  AMDSMI_INVALID_POWER = 0xFFFFFFFF
1235 
1240 #define AMDSMI_MAX_UTILIZATION_VALUES 4
1241 typedef struct {
1243  uint64_t value;
1244  uint64_t fine_value[AMDSMI_MAX_UTILIZATION_VALUES];
1245  uint16_t fine_value_count;
1247 
1248 
1252 typedef struct {
1253  uint64_t page_address;
1254  uint64_t page_size;
1257 
1261 #define AMDSMI_MAX_NUM_POWER_PROFILES (sizeof(amdsmi_bit_field_t) * 8)
1262 
1268 typedef struct {
1273 
1278 
1282  uint32_t num_profiles;
1284 
1288 typedef struct {
1293 
1297  uint32_t num_supported;
1298 
1302  uint32_t current;
1303 
1308  uint64_t frequency[AMDSMI_MAX_NUM_FREQUENCIES];
1310 
1314 typedef struct {
1315  uint32_t policy_id;
1316  char policy_description[AMDSMI_MAX_NAME];
1318 
1319 #define AMDSMI_MAX_NUM_PM_POLICIES 32
1320 
1324 typedef struct {
1328  uint32_t num_supported;
1329 
1333  uint32_t current;
1334 
1339  amdsmi_dpm_policy_entry_t policies[AMDSMI_MAX_NUM_PM_POLICIES];
1341 
1347 typedef struct {
1352 
1359 
1363 typedef struct {
1364  uint32_t year;
1365  uint32_t major;
1366  uint32_t minor;
1367  uint32_t release;
1368  const char *build;
1370 
1374 typedef struct {
1375  uint64_t frequency;
1376  uint64_t voltage;
1378 
1384 typedef struct {
1388 
1392 typedef struct {
1399 
1403 typedef struct {
1409 
1414  uint32_t num_regions;
1416 
1424 typedef struct {
1425  // TODO(amd) Doxygen documents
1426  // Note: This should match: AMDGpuMetricsHeader_v1_t
1428  uint16_t structure_size;
1429  uint8_t format_revision;
1430  uint8_t content_revision;
1433 
1434 
1439  /* Utilization Instantaneous (%) */
1440  uint32_t gfx_busy_inst[AMDSMI_MAX_NUM_XCC];
1441  uint16_t jpeg_busy[AMDSMI_MAX_NUM_JPEG];
1442  uint16_t vcn_busy[AMDSMI_MAX_NUM_VCN];
1443 
1444  /* Utilization Accumulated (%) */
1445  uint64_t gfx_busy_acc[AMDSMI_MAX_NUM_XCC];
1446 };
1447 
1448 
1449 typedef struct {
1450  // TODO(amd) Doxygen documents
1451  // Note: This structure is extended to fit the needs of different GPU metric
1452  // versions when exposing data through the structure.
1453  // Depending on the version, some data members will hold data, and
1454  // some will not. A good example is the set of 'current clocks':
1455  // - current_gfxclk, current_socclk, current_vclk0, current_dclk0
1456  // These are single-valued data members, up to version 1.3.
1457  // For version 1.4 and up these are multi-valued data members (arrays)
1458  // and their counterparts;
1459  // - current_gfxclks[], current_socclks[], current_vclk0s[],
1460  // current_dclk0s[]
1461  // will hold the data
1463  amd_metrics_table_header_t common_header;
1464 
1465  /*
1466  * v1.0 Base
1467  */
1468 
1469  // Temperature (C)
1470  uint16_t temperature_edge;
1471  uint16_t temperature_hotspot;
1472  uint16_t temperature_mem;
1473  uint16_t temperature_vrgfx;
1474  uint16_t temperature_vrsoc;
1475  uint16_t temperature_vrmem;
1476 
1477  // Utilization (%)
1478  uint16_t average_gfx_activity;
1479  uint16_t average_umc_activity; // memory controller
1480  uint16_t average_mm_activity; // UVD or VCN
1481 
1482  // Power (W) /Energy (15.259uJ per 1ns)
1483  uint16_t average_socket_power;
1484  uint64_t energy_accumulator; // v1 mod. (32->64)
1485 
1486  // Driver attached timestamp (in ns)
1487  uint64_t system_clock_counter; // v1 mod. (moved from top of struct)
1488 
1489  // Average clocks (MHz)
1490  uint16_t average_gfxclk_frequency;
1491  uint16_t average_socclk_frequency;
1492  uint16_t average_uclk_frequency;
1493  uint16_t average_vclk0_frequency;
1494  uint16_t average_dclk0_frequency;
1495  uint16_t average_vclk1_frequency;
1496  uint16_t average_dclk1_frequency;
1497 
1498  // Current clocks (MHz)
1499  uint16_t current_gfxclk;
1500  uint16_t current_socclk;
1501  uint16_t current_uclk;
1502  uint16_t current_vclk0;
1503  uint16_t current_dclk0;
1504  uint16_t current_vclk1;
1505  uint16_t current_dclk1;
1506 
1507  // Throttle status
1508  uint32_t throttle_status;
1509 
1510  // Fans (RPM)
1511  uint16_t current_fan_speed;
1512 
1513  // Link width (number of lanes) /speed (0.1 GT/s)
1514  uint16_t pcie_link_width; // v1 mod.(8->16)
1515  uint16_t pcie_link_speed; // in 0.1 GT/s; v1 mod. (8->16)
1516 
1517 
1518  /*
1519  * v1.1 additions
1520  */
1521  uint32_t gfx_activity_acc; // new in v1
1522  uint32_t mem_activity_acc; // new in v1
1523  uint16_t temperature_hbm[AMDSMI_NUM_HBM_INSTANCES]; // new in v1
1524 
1525 
1526  /*
1527  * v1.2 additions
1528  */
1529  // PMFW attached timestamp (10ns resolution)
1530  uint64_t firmware_timestamp;
1531 
1532 
1533  /*
1534  * v1.3 additions
1535  */
1536  // Voltage (mV)
1537  uint16_t voltage_soc;
1538  uint16_t voltage_gfx;
1539  uint16_t voltage_mem;
1540 
1541  // Throttle status
1542  uint64_t indep_throttle_status;
1543 
1544 
1545  /*
1546  * v1.4 additions
1547  */
1548  // Power (Watts)
1549  uint16_t current_socket_power;
1550 
1551  // Utilization (%)
1552  uint16_t vcn_activity[AMDSMI_MAX_NUM_VCN];
1553 
1554  // Clock Lock Status. Each bit corresponds to clock instance
1555  uint32_t gfxclk_lock_status;
1556 
1557  // XGMI bus width and bitrate (in GB/s)
1558  uint16_t xgmi_link_width;
1559  uint16_t xgmi_link_speed;
1560 
1561  // PCIE accumulated bandwidth (GB/sec)
1562  uint64_t pcie_bandwidth_acc;
1563 
1564  // PCIE instantaneous bandwidth (GB/sec)
1565  uint64_t pcie_bandwidth_inst;
1566 
1567  // PCIE L0 to recovery state transition accumulated count
1568  uint64_t pcie_l0_to_recov_count_acc;
1569 
1570  // PCIE replay accumulated count
1571  uint64_t pcie_replay_count_acc;
1572 
1573  // PCIE replay rollover accumulated count
1574  uint64_t pcie_replay_rover_count_acc;
1575 
1576  // XGMI accumulated data transfer size(KiloBytes)
1577  uint64_t xgmi_read_data_acc[AMDSMI_MAX_NUM_XGMI_LINKS];
1578  uint64_t xgmi_write_data_acc[AMDSMI_MAX_NUM_XGMI_LINKS];
1579 
1580  // XGMI accumulated data transfer size(KiloBytes)
1581  uint16_t current_gfxclks[AMDSMI_MAX_NUM_GFX_CLKS];
1582  uint16_t current_socclks[AMDSMI_MAX_NUM_CLKS];
1583  uint16_t current_vclk0s[AMDSMI_MAX_NUM_CLKS];
1584  uint16_t current_dclk0s[AMDSMI_MAX_NUM_CLKS];
1585 
1586  /*
1587  * v1.5 additions
1588  */
1589  // JPEG activity percent (encode/decode)
1590  uint16_t jpeg_activity[AMDSMI_MAX_NUM_JPEG];
1591 
1592  // PCIE NAK sent accumulated count
1593  uint32_t pcie_nak_sent_count_acc;
1594 
1595  // PCIE NAK received accumulated count
1596  uint32_t pcie_nak_rcvd_count_acc;
1597 
1598  /*
1599  * v1.6 additions
1600  */
1601  /* Accumulation cycle counter */
1602  uint64_t accumulation_counter;
1603 
1607  uint64_t prochot_residency_acc;
1622  uint64_t ppt_residency_acc;
1637  uint64_t socket_thm_residency_acc;
1638  uint64_t vr_thm_residency_acc;
1639  uint64_t hbm_thm_residency_acc;
1640 
1641  /* Number of current partition */
1642  uint16_t num_partition;
1643 
1644  /* XCP (Graphic Cluster Partitions) metrics stats */
1645  struct amdsmi_gpu_xcp_metrics_t xcp_stats[AMDSMI_MAX_NUM_XCP];
1646 
1647  /* PCIE other end recovery counter */
1648  uint32_t pcie_lc_perf_other_end_recovery;
1649 
1652 
1653 
1654 #define MAX_AMDSMI_NAME_LENGTH 64
1655 
1659 typedef struct {
1660  char name[MAX_AMDSMI_NAME_LENGTH];
1661  uint64_t value;
1663 
1667 typedef enum {
1668  AMDSMI_REG_XGMI,
1669  AMDSMI_REG_WAFL,
1670  AMDSMI_REG_PCIE,
1671  AMDSMI_REG_USR,
1672  AMDSMI_REG_USR1,
1674 
1678 typedef struct {
1679  uint32_t ras_eeprom_version;
1680  // PARITY error(bit 0), Single Bit correctable (bit1),
1681  // Double bit error detection (bit2), Poison (bit 3).
1684 
1688 typedef struct {
1691  uint64_t deferred_count;
1692  uint64_t reserved[5];
1694 
1698 typedef struct {
1699  uint32_t process_id;
1700  uint32_t pasid;
1701  uint64_t vram_usage;
1702  uint64_t sdma_usage;
1703  uint32_t cu_occupancy;
1705 
1706 
1707 typedef struct {
1708  uint32_t count;
1709  amdsmi_processor_handle processor_list[AMDSMI_MAX_DEVICES];
1710  uint64_t reserved[15];
1712 
1713 
1716 #define AMDSMI_DEFAULT_VARIANT 0xFFFFFFFFFFFFFFFF
1717 
1718 #ifdef ENABLE_ESMI_LIB
1722 typedef struct {
1723  uint8_t debug;
1724  uint8_t minor;
1725  uint8_t major;
1726  uint8_t unused;
1728 
1732 typedef struct {
1733  uint32_t max_bw;
1734  uint32_t utilized_bw;
1735  uint32_t utilized_pct;
1737 
1741 typedef struct {
1742  uint8_t range : 3;
1743  uint8_t ref_rate : 1;
1745 
1749 typedef struct {
1750  uint16_t power : 15;
1751  uint16_t update_rate : 9;
1752  uint8_t dimm_addr;
1754 
1758 typedef struct {
1759  uint16_t sensor : 11;
1760  uint16_t update_rate : 9;
1761  uint8_t dimm_addr;
1762  float temp;
1764 
1768 typedef enum {
1769  AGG_BW0 = 1,
1770  RD_BW0 = 2,
1771  WR_BW0 = 4
1773 
1781 typedef struct {
1783  char *link_name;
1785 
1790 typedef struct {
1791  uint8_t max_dpm_level;
1792  uint8_t min_dpm_level;
1794 
1798 typedef struct __attribute__((__packed__)){
1799  uint32_t accumulation_counter;
1800 
1801  /* TEMPERATURE */
1802  uint32_t max_socket_temperature;
1803  uint32_t max_vr_temperature;
1804  uint32_t max_hbm_temperature;
1805  uint64_t max_socket_temperature_acc;
1806  uint64_t max_vr_temperature_acc;
1807  uint64_t max_hbm_temperature_acc;
1808 
1809  /* POWER */
1810  uint32_t socket_power_limit;
1811  uint32_t max_socket_power_limit;
1812  uint32_t socket_power;
1813 
1814  /* ENERGY */
1815  uint64_t timestamp;
1816  uint64_t socket_energy_acc;
1817  uint64_t ccd_energy_acc;
1818  uint64_t xcd_energy_acc;
1819  uint64_t aid_energy_acc;
1820  uint64_t hbm_energy_acc;
1821 
1822  /* FREQUENCY */
1823  uint32_t cclk_frequency_limit;
1824  uint32_t gfxclk_frequency_limit;
1825  uint32_t fclk_frequency;
1826  uint32_t uclk_frequency;
1827  uint32_t socclk_frequency[4];
1828  uint32_t vclk_frequency[4];
1829  uint32_t dclk_frequency[4];
1830  uint32_t lclk_frequency[4];
1831  uint64_t gfxclk_frequency_acc[8];
1832  uint64_t cclk_frequency_acc[96];
1833 
1834  /* FREQUENCY RANGE */
1835  uint32_t max_cclk_frequency;
1836  uint32_t min_cclk_frequency;
1837  uint32_t max_gfxclk_frequency;
1838  uint32_t min_gfxclk_frequency;
1839  uint32_t fclk_frequency_table[4];
1840  uint32_t uclk_frequency_table[4];
1841  uint32_t socclk_frequency_table[4];
1842  uint32_t vclk_frequency_table[4];
1843  uint32_t dclk_frequency_table[4];
1844  uint32_t lclk_frequency_table[4];
1845  uint32_t max_lclk_dpm_range;
1846  uint32_t min_lclk_dpm_range;
1847 
1848  /* XGMI */
1849  uint32_t xgmi_width;
1850  uint32_t xgmi_bitrate;
1851  uint64_t xgmi_read_bandwidth_acc[8];
1852  uint64_t xgmi_write_bandwidth_acc[8];
1853 
1854  /* ACTIVITY */
1855  uint32_t socket_c0_residency;
1856  uint32_t socket_gfx_busy;
1857  uint32_t dram_bandwidth_utilization;
1858  uint64_t socket_c0_residency_acc;
1859  uint64_t socket_gfx_busy_acc;
1860  uint64_t dram_bandwidth_acc;
1861  uint32_t max_dram_bandwidth;
1862  uint64_t dram_bandwidth_utilization_acc;
1863  uint64_t pcie_bandwidth_acc[4];
1864 
1865  /* THROTTLERS */
1866  uint32_t prochot_residency_acc;
1867  uint32_t ppt_residency_acc;
1868  uint32_t socket_thm_residency_acc;
1869  uint32_t vr_thm_residency_acc;
1870  uint32_t hbm_thm_residency_acc;
1871  uint32_t spare;
1872 
1873  /* New items at the end to maintain driver compatibility */
1874  uint32_t gfxclk_frequency[8];
1875 } amdsmi_hsmp_metrics_table_t;
1876 
1880 static char* const amdsmi_hsmp_freqlimit_src_names[] = {
1881  "cHTC-Active",
1882  "PROCHOT",
1883  "TDC limit",
1884  "PPT Limit",
1885  "OPN Max",
1886  "Reliability Limit",
1887  "APML Agent",
1888  "HSMP Agent"
1889 };
1890 #endif
1891 
1892 /*****************************************************************************/
1919 amdsmi_status_t amdsmi_init(uint64_t init_flags);
1920 
1933 
1936 /*****************************************************************************/
1972  amdsmi_socket_handle* socket_handles);
1973 
1974 #ifdef ENABLE_ESMI_LIB
2001  amdsmi_processor_handle *processor_handles);
2002 #endif
2003 
2022  amdsmi_socket_handle socket_handle,
2023  size_t len, char *name);
2024 
2025 #ifdef ENABLE_ESMI_LIB
2043  amdsmi_processor_handle processor_handle,
2044  size_t len, char *name);
2045 
2068  uint32_t* processor_count, uint32_t* nr_cpusockets,
2069  uint32_t* nr_cpucores, uint32_t* nr_gpus);
2070 
2090 amdsmi_status_t amdsmi_get_processor_handles_by_type(amdsmi_socket_handle socket_handle,
2091  processor_type_t processor_type,
2092  amdsmi_processor_handle* processor_handles,
2093  uint32_t* processor_count);
2094 #endif
2095 
2130 amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle,
2131  uint32_t *processor_count,
2132  amdsmi_processor_handle* processor_handles);
2133 
2134 #ifdef ENABLE_ESMI_LIB
2159  amdsmi_processor_handle* processor_handles);
2160 #endif
2161 
2180  processor_type_t* processor_type);
2181 
2198  amdsmi_processor_handle* processor_handle);
2199 
2202 /*****************************************************************************/
2234 
2251 
2286  size_t len);
2287 
2313  uint32_t len);
2314 
2337 
2372 amdsmi_get_gpu_subsystem_name(amdsmi_processor_handle processor_handle, char *name, size_t len);
2373 
2376 /*****************************************************************************/
2403  amdsmi_pcie_bandwidth_t *bandwidth);
2404 
2442 
2465  int32_t *numa_node);
2466 
2492  uint64_t *received, uint64_t *max_pkt_sz);
2493 
2516  uint64_t *counter);
2517 
2520 /*****************************************************************************/
2559  uint64_t bw_bitmask);
2560 
2563 /*****************************************************************************/
2599 amdsmi_get_energy_count(amdsmi_processor_handle processor_handle, uint64_t *energy_accumulator,
2600  float *counter_resolution, uint64_t *timestamp);
2601 
2604 /*****************************************************************************/
2630  amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap);
2631 
2652  amdsmi_set_gpu_power_profile(amdsmi_processor_handle processor_handle, uint32_t reserved,
2654 
2657 /*****************************************************************************/
2688  uint64_t *total);
2689 
2714  uint64_t *used);
2715 
2736 amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *num_pages,
2738 
2752  amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature);
2753 
2754 
2780  amdsmi_gpu_block_t block,
2781  amdsmi_ras_err_state_t *state);
2782 
2818  uint32_t *num_pages,
2819  amdsmi_retired_page_record_t *records);
2820 
2854  uint32_t sensor_ind, int64_t *speed);
2855 
2882  uint32_t sensor_ind, int64_t *speed);
2883 
2909  uint32_t sensor_ind, uint64_t *max_speed);
2910 
2941  amdsmi_temperature_type_t sensor_type,
2942  amdsmi_temperature_metric_t metric, int64_t *temperature);
2943 
2957  amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info);
2958 
2989  amdsmi_voltage_type_t sensor_type,
2990  amdsmi_voltage_metric_t metric, int64_t *voltage);
2991 
2994 /*****************************************************************************/
3015 amdsmi_status_t amdsmi_reset_gpu_fan(amdsmi_processor_handle processor_handle, uint32_t sensor_ind);
3016 
3040  uint32_t sensor_ind, uint64_t speed);
3041 
3044 /*****************************************************************************/
3079  amdsmi_utilization_counter_t utilization_counters[],
3080  uint32_t count,
3081  uint64_t *timestamp);
3082 
3105  amdsmi_dev_perf_level_t *perf);
3106 
3129 
3153  uint32_t *od);
3154 
3177  uint32_t *od);
3178 
3202 
3216 
3240 
3261 
3283  amdsmi_gpu_metrics_t *pgpu_metrics);
3284 
3317  amdsmi_processor_handle processor_handle,
3318  amdsmi_name_value_t** pm_metrics,
3319  uint32_t *num_of_metrics);
3320 
3355  amdsmi_processor_handle processor_handle,
3356  amdsmi_reg_type_t reg_type,
3357  amdsmi_name_value_t** reg_metrics,
3358  uint32_t *num_of_metrics);
3359 
3386  uint64_t minclkvalue,
3387  uint64_t maxclkvalue,
3388  amdsmi_clk_type_t clkType);
3389 
3411  amdsmi_clk_type_t clk_type,
3412  amdsmi_clk_limit_type_t limit_type,
3413  uint64_t clk_value);
3414 
3426 
3450  amdsmi_freq_ind_t level,
3451  uint64_t clkvalue,
3452  amdsmi_clk_type_t clkType);
3453 
3476  uint32_t vpoint,
3477  uint64_t clkvalue,
3478  uint64_t voltvalue);
3479 
3518  uint32_t *num_regions, amdsmi_freq_volt_region_t *buffer);
3519 
3554  amdsmi_get_gpu_power_profile_presets(amdsmi_processor_handle processor_handle, uint32_t sensor_ind,
3556 
3559 /*****************************************************************************/
3587 
3627 
3663  amdsmi_clk_type_t clk_type, uint64_t freq_bitmask);
3664 
3683  amdsmi_dpm_policy_t* policy);
3684 
3705  uint32_t policy_id);
3706 
3725  amdsmi_dpm_policy_t* xgmi_plpd);
3726 
3747  uint32_t plpd_id);
3748 
3749 
3768  uint32_t* pisolate);
3769 
3788  uint32_t pisolate);
3789 
3807 
3810 /*****************************************************************************/
3832 
3835 /*****************************************************************************/
3868 
3896  uint64_t *enabled_blocks);
3897 
3923  amdsmi_gpu_block_t block,
3924  amdsmi_ras_err_state_t *state);
3925 
3942 amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string);
3943 
3946 /*****************************************************************************/
4067 
4096  amdsmi_event_handle_t *evnt_handle);
4097 
4114 
4136  amdsmi_counter_command_t cmd, void *cmd_args);
4137 
4158  amdsmi_counter_value_t *value);
4159 
4182  amdsmi_event_group_t grp, uint32_t *available);
4183 
4186 /*****************************************************************************/
4224 
4245 
4278 amdsmi_get_gpu_compute_process_gpus(uint32_t pid, uint32_t *dv_indices,
4279  uint32_t *num_devices);
4280 
4283 /*****************************************************************************/
4313 
4330 
4333 /*****************************************************************************/
4352  amdsmi_link_metrics_t *link_metrics);
4353 
4372 amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node);
4373 
4396  uint64_t *weight);
4397 
4423  amdsmi_processor_handle processor_handle_dst,
4424  uint64_t *min_bandwidth,
4425  uint64_t *max_bandwidth);
4426 
4453  amdsmi_processor_handle processor_handle_dst,
4454  uint64_t *hops, amdsmi_io_link_type_t *type);
4455 
4478  amdsmi_processor_handle processor_handle_dst,
4479  bool *accessible);
4480 
4481 
4508  amdsmi_processor_handle processor_handle_dst,
4510 
4513 /*****************************************************************************/
4552  char *compute_partition, uint32_t len);
4553 
4580  amdsmi_compute_partition_type_t compute_partition);
4581  // end of compute_partition
4583 
4584 /*****************************************************************************/
4623  char *memory_partition, uint32_t len);
4624 
4650  amdsmi_memory_partition_type_t memory_partition);
4651  // end of memory_partition
4653 
4654 /*****************************************************************************/
4660 // TODO: declare rest of partition profile functions and complete doc commentary.
4661 /*
4662  Get the current accelerator partition profile. The function will return current profile.
4663 */
4665 amdsmi_get_gpu_accelerator_partition_profile(amdsmi_processor_handle processor_handle,
4667  uint32_t *partition_id);
4668  // end of accelerator_partition_profile
4670 
4671 /*****************************************************************************/
4695 
4726 
4766  uint32_t *num_elem, amdsmi_evt_notification_data_t *data);
4767 
4785 
4802 
4820 amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid);
4821 
4822 /*****************************************************************************/
4846 
4849 /*****************************************************************************/
4873 
4892 
4906  amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info);
4907 
4922 
4939 amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind,
4940  amdsmi_power_cap_info_t *info);
4941 
4955  amdsmi_pcie_info_t *info);
4956 
4972 
4975 /*****************************************************************************/
4993 
5009 
5012 /*****************************************************************************/
5032 
5048 
5062 
5082 
5099 
5120 
5121 
5124 /*****************************************************************************/
5170  // Note: If the reserved size for processes is smaller than the number of
5171  // actual processes running. The AMDSMI_STATUS_OUT_OF_RESOURCES is
5172  // an indication the caller should handle the situation (resize).
5173  // The max_processes is always changed to reflect the actual size of
5174  // list of processes running, so the caller knows where it is at.
5175  //
5177 amdsmi_get_gpu_process_list(amdsmi_processor_handle processor_handle, uint32_t *max_processes, amdsmi_proc_info_t *list);
5178 
5181 /*****************************************************************************/
5202 
5231  amdsmi_link_type_t link_type,
5232  amdsmi_topology_nearest_t* topology_nearest_info);
5233 
5234 
5235 #ifdef ENABLE_ESMI_LIB
5236 /*****************************************************************************/
5253  uint64_t *penergy);
5254 
5267  uint64_t *penergy);
5268 
5271 /*****************************************************************************/
5285 amdsmi_status_t amdsmi_get_threads_per_core(uint32_t *threads_per_core);
5286 
5298  amdsmi_smu_fw_version_t *amdsmi_smu_fw);
5299 
5311  uint32_t *proto_ver);
5312 
5325  uint32_t *prochot);
5326 
5341  uint32_t *fclk, uint32_t *mclk);
5342 
5355  uint32_t *cclk);
5356 
5371  uint16_t *freq, char **src_type);
5372 
5387  uint16_t *fmax, uint16_t *fmin);
5388 
5401  uint32_t *freq);
5402 
5405 /*****************************************************************************/
5422  uint32_t *ppower);
5423 
5436  uint32_t *pcap);
5437 
5450  uint32_t *pmax);
5451 
5464  uint32_t *power);
5465 
5478  uint32_t pcap);
5479 
5492  uint8_t mode);
5493 
5496 /*****************************************************************************/
5513  uint32_t *pboostlimit);
5514 
5527  uint32_t *pc0_residency);
5528 
5541  uint32_t boostlimit);
5542 
5555  uint32_t boostlimit);
5556 
5559 /*****************************************************************************/
5575  amdsmi_ddr_bw_metrics_t *ddr_bw);
5576 
5579 /*****************************************************************************/
5596  uint32_t *ptmon);
5597 
5600 /*****************************************************************************/
5617  uint8_t dimm_addr,
5619 
5632  uint8_t dimm_addr,
5633  amdsmi_dimm_power_t *dimm_pow);
5634 
5647  uint8_t dimm_addr,
5648  amdsmi_dimm_thermal_t *dimm_temp);
5649 
5652 /*****************************************************************************/
5668  uint8_t min, uint8_t max);
5669 
5672 /*****************************************************************************/
5689  uint8_t min_link_width, uint8_t max_link_width);
5690 
5693 /*****************************************************************************/
5708 
5721  uint8_t pstate);
5722 
5736  uint8_t nbio_id, uint8_t min, uint8_t max);
5737 
5750  uint8_t nbio_id, amdsmi_dpm_level_t *nbio);
5751 
5764  uint8_t rate_ctrl, uint8_t *prev_mode);
5765 
5778  uint8_t max_pstate, uint8_t min_pstate);
5779 
5782 /*****************************************************************************/
5799  amdsmi_link_id_bw_type_t link, uint32_t *io_bw);
5800 
5813  amdsmi_link_id_bw_type_t link, uint32_t *xgmi_bw);
5814 
5817 /*****************************************************************************/
5833  uint32_t *metrics_version);
5834 
5846  amdsmi_hsmp_metrics_table_t *metrics_table);
5847 
5850 /*****************************************************************************/
5867  uint32_t *pcore_ind);
5868 
5877 
5886 
5902 amdsmi_status_t amdsmi_get_esmi_err_msg(amdsmi_status_t status, const char **status_string);
5903 #endif
5905 #ifdef __cplusplus
5906 }
5907 #endif // __cplusplus
5908 #endif // INCLUDE_AMDSMI_H_
#define AMDSMI_MAX_DATE_LENGTH
Definition: amdsmi.h:80
amdsmi_evt_notification_type_t
Definition: amdsmi.h:966
@ AMDSMI_EVT_NOTIF_NONE
Not used.
Definition: amdsmi.h:967
@ AMDSMI_EVT_NOTIF_VMFAULT
VM page fault.
Definition: amdsmi.h:968
#define AMDSMI_MAX_NUM_CLKS
This should match MAX_NUM_CLKS.
Definition: amdsmi.h:118
#define AMDSMI_MAX_NUM_XGMI_LINKS
This should match MAX_NUM_XGMI_LINKS.
Definition: amdsmi.h:123
amdsmi_freq_ind_t
The values of this enum are used as frequency identifiers.
Definition: amdsmi.h:1168
@ AMDSMI_FREQ_IND_INVALID
An invalid frequency index.
Definition: amdsmi.h:1171
@ AMDSMI_FREQ_IND_MAX
Index used for the maximum frequency value.
Definition: amdsmi.h:1170
@ AMDSMI_FREQ_IND_MIN
Index used for the minimum frequency value.
Definition: amdsmi.h:1169
amdsmi_reg_type_t
This register type for register table.
Definition: amdsmi.h:1667
uintptr_t amdsmi_event_handle_t
Available clock types.
Definition: amdsmi.h:860
amdsmi_memory_type_t
Types of memory.
Definition: amdsmi.h:1155
@ AMDSMI_MEM_TYPE_VRAM
VRAM memory.
Definition: amdsmi.h:1158
@ AMDSMI_MEM_TYPE_VIS_VRAM
VRAM memory that is visible.
Definition: amdsmi.h:1159
@ AMDSMI_MEM_TYPE_GTT
GTT memory.
Definition: amdsmi.h:1160
amdsmi_accelerator_partition_type_t
Accelerator Partition. This enum is used to identify various accelerator partitioning settings.
Definition: amdsmi.h:308
@ AMDSMI_ACCELERATOR_PARTITION_DPX
together with shared memory
Definition: amdsmi.h:312
@ AMDSMI_ACCELERATOR_PARTITION_QPX
work together with shared memory
Definition: amdsmi.h:316
@ AMDSMI_ACCELERATOR_PARTITION_SPX
together with shared memory
Definition: amdsmi.h:310
@ AMDSMI_ACCELERATOR_PARTITION_TPX
work together with shared memory
Definition: amdsmi.h:314
@ AMDSMI_ACCELERATOR_PARTITION_CPX
shared memory
Definition: amdsmi.h:318
amdsmi_status_t amdsmi_get_gpu_device_uuid(amdsmi_processor_handle processor_handle, unsigned int *uuid_length, char *uuid)
Returns the UUID of the device.
amdsmi_clk_type_t
Clock types.
Definition: amdsmi.h:287
@ AMDSMI_CLK_TYPE_SYS
System clock.
Definition: amdsmi.h:288
@ AMDSMI_CLK_TYPE_DCEF
Display Controller Engine clock.
Definition: amdsmi.h:293
@ AMDSMI_CLK_TYPE_DF
running on a separate clock)
Definition: amdsmi.h:291
#define MAX_EVENT_NOTIFICATION_MSG_SIZE
Maximum number of characters an event notification message will be.
Definition: amdsmi.h:984
#define AMDSMI_MAX_NUM_XCP
This should match AMDSMI_MAX_NUM_XCP; XCP - Accelerated Compute Processor, also referred to as the Gr...
Definition: amdsmi.h:166
amdsmi_io_link_type_t
Types for IO Link.
Definition: amdsmi.h:1203
@ AMDSMI_IOLINK_TYPE_SIZE
Max of IO Link types.
Definition: amdsmi.h:1208
@ AMDSMI_IOLINK_TYPE_UNDEFINED
unknown type.
Definition: amdsmi.h:1204
@ AMDSMI_IOLINK_TYPE_NUMIOLINKTYPES
Number of IO Link types.
Definition: amdsmi.h:1207
@ AMDSMI_IOLINK_TYPE_XGMI
XGMI.
Definition: amdsmi.h:1206
@ AMDSMI_IOLINK_TYPE_PCIEXPRESS
PCI Express.
Definition: amdsmi.h:1205
amdsmi_init_flags_t
Initialization flags.
Definition: amdsmi.h:69
@ AMDSMI_INIT_ALL_PROCESSORS
Initialize all processors.
Definition: amdsmi.h:70
#define AMDSMI_MAX_NUM_XCC
This should match AMDSMI_MAX_NUM_XCC; XCC - Accelerated Compute Core, the collection of compute units...
Definition: amdsmi.h:154
#define AMDSMI_NUM_HBM_INSTANCES
This should match NUM_HBM_INSTANCES.
Definition: amdsmi.h:108
amdsmi_event_group_t
Enum denoting an event group. The value of the enum is the base value for all the event enums in the ...
Definition: amdsmi.h:868
@ AMDSMI_EVNT_GRP_XGMI
Data Fabric (XGMI) related events.
Definition: amdsmi.h:869
@ AMDSMI_EVNT_GRP_XGMI_DATA_OUT
XGMI Outbound data.
Definition: amdsmi.h:870
amdsmi_ras_err_state_t
The current ECC state.
Definition: amdsmi.h:1138
@ AMDSMI_RAS_ERR_STATE_PARITY
ECC errors present, but type unknown.
Definition: amdsmi.h:1141
@ AMDSMI_RAS_ERR_STATE_SING_C
Single correctable error.
Definition: amdsmi.h:1142
@ AMDSMI_RAS_ERR_STATE_MULT_UC
Multiple uncorrectable errors.
Definition: amdsmi.h:1143
@ AMDSMI_RAS_ERR_STATE_POISON
page. Treat as uncorrectable.
Definition: amdsmi.h:1144
@ AMDSMI_RAS_ERR_STATE_ENABLED
ECC is enabled.
Definition: amdsmi.h:1146
@ AMDSMI_RAS_ERR_STATE_NONE
No current errors.
Definition: amdsmi.h:1139
@ AMDSMI_RAS_ERR_STATE_DISABLED
ECC is disabled.
Definition: amdsmi.h:1140
amdsmi_io_bw_encoding_t
xGMI Bandwidth Encoding types
Definition: amdsmi.h:1768
@ AGG_BW0
Aggregate Bandwidth.
Definition: amdsmi.h:1769
@ RD_BW0
Read Bandwidth.
Definition: amdsmi.h:1770
@ WR_BW0
Write Bandwdith.
Definition: amdsmi.h:1771
amdsmi_event_type_t
Event type enum. Events belonging to a particular event group amdsmi_event_group_t should begin enume...
Definition: amdsmi.h:880
@ AMDSMI_EVNT_XGMI_0_BEATS_TX
Data beats sent to neighbor 0; Each beat represents 32 bytes.
Definition: amdsmi.h:903
@ AMDSMI_EVNT_XGMI_DATA_OUT_3
Outbound beats to neighbor 3.
Definition: amdsmi.h:935
@ AMDSMI_EVNT_XGMI_0_NOP_TX
NOPs sent to neighbor 0.
Definition: amdsmi.h:884
@ AMDSMI_EVNT_XGMI_1_NOP_TX
NOPs sent to neighbor 1.
Definition: amdsmi.h:904
@ AMDSMI_EVNT_XGMI_0_RESPONSE_TX
neighbor 0
Definition: amdsmi.h:887
@ AMDSMI_EVNT_XGMI_1_BEATS_TX
Definition: amdsmi.h:909
@ AMDSMI_EVNT_XGMI_DATA_OUT_4
Outbound beats to neighbor 4.
Definition: amdsmi.h:936
@ AMDSMI_EVNT_XGMI_DATA_OUT_1
Outbound beats to neighbor 1.
Definition: amdsmi.h:933
@ AMDSMI_EVNT_XGMI_DATA_OUT_2
Outbound beats to neighbor 2.
Definition: amdsmi.h:934
@ AMDSMI_EVNT_XGMI_1_REQUEST_TX
neighbor 1
Definition: amdsmi.h:905
@ AMDSMI_EVNT_XGMI_DATA_OUT_5
Outbound beats to neighbor 5.
Definition: amdsmi.h:937
@ AMDSMI_EVNT_XGMI_0_REQUEST_TX
neighbor 0
Definition: amdsmi.h:885
@ AMDSMI_EVNT_XGMI_1_RESPONSE_TX
neighbor 1
Definition: amdsmi.h:907
processor_type_t
Processor types detectable by AMD SMI AMDSMI_PROCESSOR_TYPE_AMD_CPU - CPU Socket is a physical compon...
Definition: amdsmi.h:217
#define AMDSMI_MAX_UTILIZATION_VALUES
The utilization counter data.
Definition: amdsmi.h:1240
amdsmi_fw_block_t
The values of this enum are used to identify the various firmware blocks.
Definition: amdsmi.h:383
amdsmi_memory_page_status_t
Reserved Memory Page States.
Definition: amdsmi.h:1191
@ AMDSMI_MEM_PAGE_STATUS_UNRESERVABLE
Unable to reserve this page.
Definition: amdsmi.h:1197
@ AMDSMI_MEM_PAGE_STATUS_RESERVED
and not available for use
Definition: amdsmi.h:1192
@ AMDSMI_MEM_PAGE_STATUS_PENDING
Definition: amdsmi.h:1194
amdsmi_xgmi_status_t
XGMI Status.
Definition: amdsmi.h:1177
amdsmi_dev_perf_level_t
PowerPlay performance levels.
Definition: amdsmi.h:824
@ AMDSMI_DEV_PERF_LEVEL_STABLE_STD
clocks
Definition: amdsmi.h:834
@ AMDSMI_DEV_PERF_LEVEL_STABLE_PEAK
Stable power state with peak clocks.
Definition: amdsmi.h:836
@ AMDSMI_DEV_PERF_LEVEL_AUTO
Performance level is "auto".
Definition: amdsmi.h:825
@ AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_SCLK
system clock
Definition: amdsmi.h:839
@ AMDSMI_DEV_PERF_LEVEL_STABLE_MIN_MCLK
memory clock
Definition: amdsmi.h:837
@ AMDSMI_DEV_PERF_LEVEL_DETERMINISM
Performance determinism state.
Definition: amdsmi.h:841
@ AMDSMI_DEV_PERF_LEVEL_LOW
regardless of workload
Definition: amdsmi.h:828
@ AMDSMI_DEV_PERF_LEVEL_HIGH
regardless of workload
Definition: amdsmi.h:830
@ AMDSMI_DEV_PERF_LEVEL_MANUAL
setting the AMDSMI_CLK_TYPE_SYS speed
Definition: amdsmi.h:832
@ AMDSMI_DEV_PERF_LEVEL_UNKNOWN
Unknown performance level.
Definition: amdsmi.h:845
amdsmi_utilization_counter_type_t
The utilization counter type.
Definition: amdsmi.h:1214
@ AMDSMI_COARSE_GRAIN_MEM_ACTIVITY
Memory Activity.
Definition: amdsmi.h:1218
@ AMDSMI_UTILIZATION_COUNTER_FIRST
Corse grain activity counters.
Definition: amdsmi.h:1215
@ AMDSMI_COARSE_DECODER_ACTIVITY
Fine grain activity counters.
Definition: amdsmi.h:1219
amdsmi_memory_partition_type_t
Memory Partitions. This enum is used to identify various memory partition types.
Definition: amdsmi.h:344
@ AMDSMI_MEMORY_PARTITION_NPS8
Definition: amdsmi.h:354
@ AMDSMI_MEMORY_PARTITION_NPS1
accross all 8 HBM stacks (all stacks/1).
Definition: amdsmi.h:346
@ AMDSMI_MEMORY_PARTITION_NPS2
Definition: amdsmi.h:348
@ AMDSMI_MEMORY_PARTITION_NPS4
Definition: amdsmi.h:351
amdsmi_voltage_metric_t
Voltage Metrics. This enum is used to identify various Volatge metrics. Corresponding values will be ...
Definition: amdsmi.h:1043
@ AMDSMI_VOLT_LOWEST
Historical minimum voltage.
Definition: amdsmi.h:1052
@ AMDSMI_VOLT_MAX_CRIT
Voltage critical max value.
Definition: amdsmi.h:1050
@ AMDSMI_VOLT_HIGHEST
Historical maximum voltage.
Definition: amdsmi.h:1053
@ AMDSMI_VOLT_MIN
Voltage min value.
Definition: amdsmi.h:1049
@ AMDSMI_VOLT_AVERAGE
Average voltage.
Definition: amdsmi.h:1051
@ AMDSMI_VOLT_CURRENT
Voltage current value.
Definition: amdsmi.h:1044
@ AMDSMI_VOLT_MAX
Voltage max value.
Definition: amdsmi.h:1047
@ AMDSMI_VOLT_MIN_CRIT
Voltage critical min value.
Definition: amdsmi.h:1048
uint64_t amdsmi_bit_field_t
Bitfield used in various AMDSMI calls.
Definition: amdsmi.h:1186
amdsmi_voltage_type_t
This ennumeration is used to indicate which type of voltage reading should be obtained.
Definition: amdsmi.h:1062
@ AMDSMI_VOLT_TYPE_INVALID
Invalid type.
Definition: amdsmi.h:1068
@ AMDSMI_VOLT_TYPE_VDDGFX
voltage
Definition: amdsmi.h:1065
amdsmi_clk_limit_type_t
The clk limit type.
Definition: amdsmi.h:1130
void * amdsmi_processor_handle
opaque handler point to underlying implementation
Definition: amdsmi.h:205
amdsmi_cache_property_type_t
cache properties
Definition: amdsmi.h:619
amdsmi_status_t
Error codes returned by amdsmi functions.
Definition: amdsmi.h:232
@ AMDSMI_STATUS_NOT_INIT
Device not initialized.
Definition: amdsmi.h:257
@ AMDSMI_STATUS_NON_AMD_CPU
System has different cpu than AMD.
Definition: amdsmi.h:266
@ AMDSMI_STATUS_INVAL
Invalid parameters.
Definition: amdsmi.h:235
@ AMDSMI_STATUS_BUSY
Device busy.
Definition: amdsmi.h:255
@ AMDSMI_STATUS_UNKNOWN_ERROR
An unknown error occurred.
Definition: amdsmi.h:281
@ AMDSMI_STATUS_DRIVER_NOT_LOADED
Processor driver not loaded.
Definition: amdsmi.h:259
@ AMDSMI_STATUS_FILE_ERROR
Problem accessing a file.
Definition: amdsmi.h:248
@ AMDSMI_STATUS_DRM_ERROR
Error when call libdrm.
Definition: amdsmi.h:240
@ AMDSMI_STATUS_ARG_PTR_NULL
Parsed argument is invalid.
Definition: amdsmi.h:275
@ AMDSMI_STATUS_IO
I/O Error.
Definition: amdsmi.h:246
@ AMDSMI_STATUS_NO_HSMP_DRV
HSMP driver not found.
Definition: amdsmi.h:269
@ AMDSMI_STATUS_HSMP_TIMEOUT
HSMP message is timedout.
Definition: amdsmi.h:272
@ AMDSMI_STATUS_NO_DATA
No data was found for a given input.
Definition: amdsmi.h:261
@ AMDSMI_STATUS_RETRY
Retry operation.
Definition: amdsmi.h:243
@ AMDSMI_STATUS_UNEXPECTED_SIZE
An unexpected amount of data was read.
Definition: amdsmi.h:263
@ AMDSMI_STATUS_SETTING_UNAVAILABLE
Setting is not available.
Definition: amdsmi.h:277
@ AMDSMI_STATUS_FILE_NOT_FOUND
file or directory not found
Definition: amdsmi.h:274
@ AMDSMI_STATUS_INTERNAL_EXCEPTION
An internal exception was caught.
Definition: amdsmi.h:250
@ AMDSMI_STATUS_NO_HSMP_SUP
HSMP not supported.
Definition: amdsmi.h:270
@ AMDSMI_STATUS_MAP_ERROR
The internal library error did not map to a status code.
Definition: amdsmi.h:280
@ AMDSMI_STATUS_FAIL_LOAD_SYMBOL
Fail to load symbol.
Definition: amdsmi.h:239
@ AMDSMI_STATUS_INSUFFICIENT_SIZE
Not enough resources were available for the operation.
Definition: amdsmi.h:262
@ AMDSMI_STATUS_INIT_ERROR
An error occurred when initializing internal data structures.
Definition: amdsmi.h:252
@ AMDSMI_STATUS_OUT_OF_RESOURCES
Not enough memory.
Definition: amdsmi.h:249
@ AMDSMI_STATUS_NO_SLOT
No more free slot.
Definition: amdsmi.h:258
@ AMDSMI_STATUS_NO_MSR_DRV
MSR driver not found.
Definition: amdsmi.h:268
@ AMDSMI_STATUS_INTERRUPT
An interrupt occurred during execution of function.
Definition: amdsmi.h:245
@ AMDSMI_STATUS_SUCCESS
Call succeeded.
Definition: amdsmi.h:233
@ AMDSMI_STATUS_NO_ENERGY_DRV
Energy driver not found.
Definition: amdsmi.h:267
@ AMDSMI_STATUS_ADDRESS_FAULT
Bad address.
Definition: amdsmi.h:247
@ AMDSMI_STATUS_NOT_YET_IMPLEMENTED
Not implemented yet.
Definition: amdsmi.h:237
@ AMDSMI_STATUS_NO_DRV
No Energy and HSMP driver present.
Definition: amdsmi.h:273
@ AMDSMI_STATUS_NO_PERM
Permission Denied.
Definition: amdsmi.h:244
@ AMDSMI_STATUS_NOT_FOUND
Device Not found.
Definition: amdsmi.h:256
@ AMDSMI_STATUS_FAIL_LOAD_MODULE
Fail to load lib.
Definition: amdsmi.h:238
@ AMDSMI_STATUS_AMDGPU_RESTART_ERR
AMDGPU restart failed.
Definition: amdsmi.h:276
@ AMDSMI_STATUS_NOT_SUPPORTED
Command not supported.
Definition: amdsmi.h:236
@ AMDSMI_STATUS_UNEXPECTED_DATA
The data read or provided to function is not what was expected.
Definition: amdsmi.h:264
@ AMDSMI_STATUS_API_FAILED
API call failed.
Definition: amdsmi.h:241
@ AMDSMI_STATUS_TIMEOUT
Timeout in API call.
Definition: amdsmi.h:242
@ AMDSMI_STATUS_NO_HSMP_MSG_SUP
HSMP message/feature not supported.
Definition: amdsmi.h:271
@ AMDSMI_STATUS_INPUT_OUT_OF_BOUNDS
The provided input is out of allowable or safe range.
Definition: amdsmi.h:251
@ AMDSMI_STATUS_REFCOUNT_OVERFLOW
An internal reference counter exceeded INT32_MAX.
Definition: amdsmi.h:253
#define AMDSMI_MAX_NUM_JPEG
This should match AMDSMI_MAX_NUM_JPEG (8*4=32)
Definition: amdsmi.h:143
amdsmi_temperature_metric_t
Temperature Metrics. This enum is used to identify various temperature metrics. Corresponding values ...
Definition: amdsmi.h:1000
@ AMDSMI_TEMP_CRITICAL_HYST
Definition: amdsmi.h:1014
@ AMDSMI_TEMP_CRITICAL
greater than corresponding temp_max values.
Definition: amdsmi.h:1012
@ AMDSMI_TEMP_OFFSET
Definition: amdsmi.h:1030
@ AMDSMI_TEMP_EMERGENCY
Definition: amdsmi.h:1017
@ AMDSMI_TEMP_LOWEST
temperature reading by the chip.
Definition: amdsmi.h:1032
@ AMDSMI_TEMP_CRIT_MIN
Definition: amdsmi.h:1024
@ AMDSMI_TEMP_EMERGENCY_HYST
Definition: amdsmi.h:1021
@ AMDSMI_TEMP_CURRENT
Temperature current value.
Definition: amdsmi.h:1001
@ AMDSMI_TEMP_MIN
Temperature min value.
Definition: amdsmi.h:1005
@ AMDSMI_TEMP_HIGHEST
Historical maximum temperature.
Definition: amdsmi.h:1033
@ AMDSMI_TEMP_CRIT_MIN_HYST
Definition: amdsmi.h:1027
@ AMDSMI_TEMP_MIN_HYST
Definition: amdsmi.h:1009
@ AMDSMI_TEMP_MAX_HYST
Definition: amdsmi.h:1006
@ AMDSMI_TEMP_MAX
Temperature max value.
Definition: amdsmi.h:1004
amdsmi_gpu_block_t
This enum is used to identify different GPU blocks.
Definition: amdsmi.h:1096
@ AMDSMI_GPU_BLOCK_XGMI_WAFL
XGMI block.
Definition: amdsmi.h:1108
@ AMDSMI_GPU_BLOCK_LAST
Definition: amdsmi.h:1121
@ AMDSMI_GPU_BLOCK_GFX
GFX block.
Definition: amdsmi.h:1103
@ AMDSMI_GPU_BLOCK_IH
IH block.
Definition: amdsmi.h:1118
@ AMDSMI_GPU_BLOCK_VCN
VCN block.
Definition: amdsmi.h:1116
@ AMDSMI_GPU_BLOCK_INVALID
Definition: amdsmi.h:1097
@ AMDSMI_GPU_BLOCK_MP0
MP0 block.
Definition: amdsmi.h:1112
@ AMDSMI_GPU_BLOCK_HDP
HDP block.
Definition: amdsmi.h:1107
@ AMDSMI_GPU_BLOCK_MPIO
MPIO block.
Definition: amdsmi.h:1119
@ AMDSMI_GPU_BLOCK_ATHUB
ATHUB block.
Definition: amdsmi.h:1105
@ AMDSMI_GPU_BLOCK_MP1
MP1 block.
Definition: amdsmi.h:1113
@ AMDSMI_GPU_BLOCK_PCIE_BIF
PCIE_BIF block.
Definition: amdsmi.h:1106
@ AMDSMI_GPU_BLOCK_SDMA
SDMA block.
Definition: amdsmi.h:1102
@ AMDSMI_GPU_BLOCK_JPEG
JPEG block.
Definition: amdsmi.h:1117
@ AMDSMI_GPU_BLOCK_UMC
UMC block.
Definition: amdsmi.h:1101
@ AMDSMI_GPU_BLOCK_FUSE
Fuse block.
Definition: amdsmi.h:1114
@ AMDSMI_GPU_BLOCK_DF
DF block.
Definition: amdsmi.h:1109
@ AMDSMI_GPU_BLOCK_MMHUB
MMHUB block.
Definition: amdsmi.h:1104
@ AMDSMI_GPU_BLOCK_SMN
SMN block.
Definition: amdsmi.h:1110
@ AMDSMI_GPU_BLOCK_SEM
SEM block.
Definition: amdsmi.h:1111
@ AMDSMI_GPU_BLOCK_MCA
MCA block.
Definition: amdsmi.h:1115
struct __attribute__((__packed__))
HSMP Metrics table (supported only with hsmp proto version 6).
Definition: amdsmi.h:1798
amdsmi_status_t amdsmi_get_gpu_device_bdf(amdsmi_processor_handle processor_handle, amdsmi_bdf_t *bdf)
Returns BDF of the given device.
amdsmi_power_type_t
Power types.
Definition: amdsmi.h:1230
@ AMDSMI_INVALID_POWER
Invalid / Undetected Power.
Definition: amdsmi.h:1233
@ AMDSMI_CURRENT_POWER
Current / Instant Power.
Definition: amdsmi.h:1232
@ AMDSMI_AVERAGE_POWER
Average Power.
Definition: amdsmi.h:1231
amdsmi_temperature_type_t
This enumeration is used to indicate from which part of the device a temperature reading should be ob...
Definition: amdsmi.h:365
#define AMDSMI_MAX_NUM_FREQUENCIES
Guaranteed maximum possible number of supported frequencies.
Definition: amdsmi.h:813
amdsmi_counter_command_t
Definition: amdsmi.h:946
@ AMDSMI_CNTR_CMD_STOP
be used before reading.
Definition: amdsmi.h:948
@ AMDSMI_CNTR_CMD_START
Start the counter.
Definition: amdsmi.h:947
amdsmi_power_profile_preset_masks_t
Pre-set Profile Selections. These bitmasks can be AND'd with the amdsmi_power_profile_status_t....
Definition: amdsmi.h:1077
@ AMDSMI_PWR_PROF_PRST_COMPUTE_MASK
Compute Saving Profile.
Definition: amdsmi.h:1081
@ AMDSMI_PWR_PROF_PRST_POWER_SAVING_MASK
Power Saving Profile.
Definition: amdsmi.h:1080
@ AMDSMI_PWR_PROF_PRST_VIDEO_MASK
Video Power Profile.
Definition: amdsmi.h:1079
@ AMDSMI_PWR_PROF_PRST_BOOTUP_DEFAULT
Default Boot Up Profile.
Definition: amdsmi.h:1086
@ AMDSMI_PWR_PROF_PRST_LAST
Invalid power profile.
Definition: amdsmi.h:1087
@ AMDSMI_PWR_PROF_PRST_CUSTOM_MASK
Custom Power Profile.
Definition: amdsmi.h:1078
@ AMDSMI_PWR_PROF_PRST_VR_MASK
VR Power Profile.
Definition: amdsmi.h:1082
#define AMDSMI_MAX_NUM_GFX_CLKS
This should match MAX_NUM_GFX_CLKS.
Definition: amdsmi.h:128
amdsmi_status_t amdsmi_get_link_topology_nearest(amdsmi_processor_handle processor_handle, amdsmi_link_type_t link_type, amdsmi_topology_nearest_t *topology_nearest_info)
Retrieve the set of GPUs that are nearest to a given device at a specific interconnectivity level.
#define AMDSMI_NUM_VOLTAGE_CURVE_POINTS
The number of points that make up a voltage-frequency curve definition.
Definition: amdsmi.h:820
amdsmi_compute_partition_type_t
Compute Partition. This enum is used to identify various compute partitioning settings.
Definition: amdsmi.h:326
@ AMDSMI_COMPUTE_PARTITION_QPX
work together with shared memory
Definition: amdsmi.h:334
@ AMDSMI_COMPUTE_PARTITION_TPX
Definition: amdsmi.h:332
@ AMDSMI_COMPUTE_PARTITION_CPX
Definition: amdsmi.h:336
@ AMDSMI_COMPUTE_PARTITION_SPX
Definition: amdsmi.h:328
@ AMDSMI_COMPUTE_PARTITION_DPX
Definition: amdsmi.h:330
#define AMDSMI_MAX_NUM_VCN
This should match MAX_NUM_VCN.
Definition: amdsmi.h:113
amdsmi_status_t amdsmi_get_processor_info(amdsmi_processor_handle processor_handle, size_t len, char *name)
Get information about the given processor.
amdsmi_status_t amdsmi_get_processor_handles(amdsmi_socket_handle socket_handle, uint32_t *processor_count, amdsmi_processor_handle *processor_handles)
Get the list of the processor handles associated to a socket.
amdsmi_status_t amdsmi_get_processor_type(amdsmi_processor_handle processor_handle, processor_type_t *processor_type)
Get the processor type of the processor_handle.
amdsmi_status_t amdsmi_get_socket_info(amdsmi_socket_handle socket_handle, size_t len, char *name)
Get information about the given socket.
amdsmi_status_t amdsmi_get_cpu_handles(uint32_t *cpu_count, amdsmi_processor_handle *processor_handles)
Get the list of cpu handles in the system.
amdsmi_status_t amdsmi_get_cpucore_handles(uint32_t *cores_count, amdsmi_processor_handle *processor_handles)
Get the list of the cpu core handles in a system.
amdsmi_status_t amdsmi_get_socket_handles(uint32_t *socket_count, amdsmi_socket_handle *socket_handles)
Get the list of socket handles in the system.
amdsmi_status_t amdsmi_get_processor_handle_from_bdf(amdsmi_bdf_t bdf, amdsmi_processor_handle *processor_handle)
Get processor handle with the matching bdf.
amdsmi_status_t amdsmi_get_processor_handles_by_type(amdsmi_socket_handle socket_handle, processor_type_t processor_type, amdsmi_processor_handle *processor_handles, uint32_t *processor_count)
Get processor list as per processor type.
amdsmi_status_t amdsmi_get_processor_count_from_handles(amdsmi_processor_handle *processor_handles, uint32_t *processor_count, uint32_t *nr_cpusockets, uint32_t *nr_cpucores, uint32_t *nr_gpus)
Get respective processor counts from the processor handles.
amdsmi_status_t amdsmi_status_code_to_string(amdsmi_status_t status, const char **status_string)
Get a description of a provided AMDSMI error status.
amdsmi_status_t amdsmi_get_gpu_ecc_status(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state)
Retrieve the ECC status for a GPU block. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_error_count_t *ec)
Retrieve the error counts for a GPU block. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_ecc_enabled(amdsmi_processor_handle processor_handle, uint64_t *enabled_blocks)
Retrieve the enabled ECC bit-mask. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_event_notification_mask(amdsmi_processor_handle processor_handle, uint64_t mask)
Specify which events to collect for a device.
amdsmi_status_t amdsmi_stop_gpu_event_notification(amdsmi_processor_handle processor_handle)
Close any file handles and free any resources used by event notification for a GPU.
amdsmi_status_t amdsmi_init_gpu_event_notification(amdsmi_processor_handle processor_handle)
Prepare to collect event notifications for a GPU.
amdsmi_status_t amdsmi_get_gpu_event_notification(int timeout_ms, uint32_t *num_elem, amdsmi_evt_notification_data_t *data)
Collect event notifications, waiting a specified amount of time.
amdsmi_status_t amdsmi_topo_get_numa_node_number(amdsmi_processor_handle processor_handle, uint32_t *numa_node)
Retrieve the NUMA CPU node number for a device.
amdsmi_status_t amdsmi_topo_get_link_type(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *hops, amdsmi_io_link_type_t *type)
Retrieve the hops and the connection type between 2 GPUs.
amdsmi_status_t amdsmi_topo_get_p2p_status(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, amdsmi_io_link_type_t *type, amdsmi_p2p_capability_t *cap)
Retrieve connection type and P2P capabilities between 2 GPUs.
amdsmi_status_t amdsmi_get_minmax_bandwidth_between_processors(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *min_bandwidth, uint64_t *max_bandwidth)
Retreive minimal and maximal io link bandwidth between 2 GPUs.
amdsmi_status_t amdsmi_is_P2P_accessible(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, bool *accessible)
Return P2P availability status between 2 GPUs.
amdsmi_status_t amdsmi_get_link_metrics(amdsmi_processor_handle processor_handle, amdsmi_link_metrics_t *link_metrics)
Return link metric information.
amdsmi_status_t amdsmi_topo_get_link_weight(amdsmi_processor_handle processor_handle_src, amdsmi_processor_handle processor_handle_dst, uint64_t *weight)
Retrieve the weight for a connection between 2 GPUs.
amdsmi_status_t amdsmi_get_gpu_subsystem_name(amdsmi_processor_handle processor_handle, char *name, size_t len)
Get the name string for the device subsytem.
amdsmi_status_t amdsmi_get_gpu_revision(amdsmi_processor_handle processor_handle, uint16_t *revision)
Get the device revision associated with the device.
amdsmi_status_t amdsmi_get_gpu_vendor_name(amdsmi_processor_handle processor_handle, char *name, size_t len)
Get the name string for a give vendor ID.
amdsmi_status_t amdsmi_get_gpu_id(amdsmi_processor_handle processor_handle, uint16_t *id)
Get the device id associated with the device with provided device handler.
amdsmi_status_t amdsmi_get_gpu_vram_vendor(amdsmi_processor_handle processor_handle, char *brand, uint32_t len)
Get the vram vendor string of a device.
amdsmi_status_t amdsmi_get_gpu_subsystem_id(amdsmi_processor_handle processor_handle, uint16_t *id)
Get the subsystem device id associated with the device with provided processor handle.
amdsmi_status_t amdsmi_shut_down(void)
Shutdown the AMD SMI library.
amdsmi_status_t amdsmi_init(uint64_t init_flags)
Initialize the AMD SMI library.
amdsmi_status_t amdsmi_get_gpu_memory_total(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *total)
Get the total amount of memory that exists.
amdsmi_status_t amdsmi_get_gpu_ras_block_features_enabled(amdsmi_processor_handle processor_handle, amdsmi_gpu_block_t block, amdsmi_ras_err_state_t *state)
Returns if RAS features are enabled or disabled for given block. It is not supported on virtual machi...
amdsmi_status_t amdsmi_get_gpu_bad_page_info(amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *info)
Get the bad pages of a processor. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_memory_reserved_pages(amdsmi_processor_handle processor_handle, uint32_t *num_pages, amdsmi_retired_page_record_t *records)
Get information about reserved ("retired") memory pages. It is not supported on virtual machine guest...
amdsmi_status_t amdsmi_get_gpu_memory_usage(amdsmi_processor_handle processor_handle, amdsmi_memory_type_t mem_type, uint64_t *used)
Get the current memory usage.
amdsmi_status_t amdsmi_get_gpu_ras_feature_info(amdsmi_processor_handle processor_handle, amdsmi_ras_feature_t *ras_feature)
Returns RAS features info.
amdsmi_status_t amdsmi_get_hsmp_metrics_table(amdsmi_processor_handle processor_handle, amdsmi_hsmp_metrics_table_t *metrics_table)
Get HSMP metrics table.
amdsmi_status_t amdsmi_get_hsmp_metrics_table_version(amdsmi_processor_handle processor_handle, uint32_t *metrics_version)
Get HSMP metrics table version.
amdsmi_status_t amdsmi_set_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, uint64_t bw_bitmask)
Control the set of allowed PCIe bandwidths that can be used. It is not supported on virtual machine g...
amdsmi_status_t amdsmi_get_gpu_topo_numa_affinity(amdsmi_processor_handle processor_handle, int32_t *numa_node)
Get the NUMA node associated with a device.
amdsmi_status_t amdsmi_get_gpu_pci_throughput(amdsmi_processor_handle processor_handle, uint64_t *sent, uint64_t *received, uint64_t *max_pkt_sz)
Get PCIe traffic information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_pci_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_pcie_bandwidth_t *bandwidth)
Get the list of possible PCIe bandwidths that are available. It is not supported on virtual machine g...
amdsmi_status_t amdsmi_get_gpu_pci_replay_counter(amdsmi_processor_handle processor_handle, uint64_t *counter)
Get PCIe replay counter.
amdsmi_status_t amdsmi_get_gpu_bdf_id(amdsmi_processor_handle processor_handle, uint64_t *bdfid)
Get the unique PCI device identifier associated for a device.
amdsmi_status_t amdsmi_get_gpu_available_counters(amdsmi_processor_handle processor_handle, amdsmi_event_group_t grp, uint32_t *available)
Get the number of currently available counters. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_read_counter(amdsmi_event_handle_t evt_handle, amdsmi_counter_value_t *value)
Read the current value of a performance counter.
amdsmi_status_t amdsmi_gpu_control_counter(amdsmi_event_handle_t evt_handle, amdsmi_counter_command_t cmd, void *cmd_args)
Issue performance counter control commands. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_counter_group_supported(amdsmi_processor_handle processor_handle, amdsmi_event_group_t group)
Tell if an event group is supported by a given device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_gpu_destroy_counter(amdsmi_event_handle_t evnt_handle)
Deallocate a performance counter object.
amdsmi_status_t amdsmi_gpu_create_counter(amdsmi_processor_handle processor_handle, amdsmi_event_type_t type, amdsmi_event_handle_t *evnt_handle)
Create a performance counter object.
amdsmi_status_t amdsmi_get_xgmi_plpd(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *xgmi_plpd)
Get the xgmi per-link power down policy parameter for the processor.
amdsmi_status_t amdsmi_clean_gpu_local_data(amdsmi_processor_handle processor_handle)
Clean up local data in LDS/GPRs.
amdsmi_status_t amdsmi_set_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t perf_lvl)
Set the PowerPlay performance level associated with the device with provided processor handle with th...
amdsmi_status_t amdsmi_get_soc_pstate(amdsmi_processor_handle processor_handle, amdsmi_dpm_policy_t *policy)
Get the soc pstate policy for the processor.
amdsmi_status_t amdsmi_set_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t od)
Set the overdrive percent associated with the device with provided processor handle with the provided...
amdsmi_status_t amdsmi_set_gpu_process_isolation(amdsmi_processor_handle processor_handle, uint32_t pisolate)
Enable/disable the system Process Isolation.
amdsmi_status_t amdsmi_set_soc_pstate(amdsmi_processor_handle processor_handle, uint32_t policy_id)
Set the soc pstate policy for the processor.
amdsmi_status_t amdsmi_get_gpu_process_isolation(amdsmi_processor_handle processor_handle, uint32_t *pisolate)
Get the status of the Process Isolation.
amdsmi_status_t amdsmi_set_clk_freq(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, uint64_t freq_bitmask)
Control the set of allowed frequencies that can be used for the specified clock. It is not supported ...
amdsmi_status_t amdsmi_set_xgmi_plpd(amdsmi_processor_handle processor_handle, uint32_t plpd_id)
Set the xgmi per-link power down policy parameter for the processor.
amdsmi_status_t amdsmi_get_gpu_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_metrics_t *pgpu_metrics)
This function retrieves the gpu metrics information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_power_profile_presets(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_profile_status_t *status)
Get the list of available preset power profiles and an indication of which profile is currently activ...
amdsmi_status_t amdsmi_set_gpu_clk_limit(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_limit_type_t limit_type, uint64_t clk_value)
This function sets the clock sets the clock min/max level.
amdsmi_status_t amdsmi_get_gpu_pm_metrics_info(amdsmi_processor_handle processor_handle, amdsmi_name_value_t **pm_metrics, uint32_t *num_of_metrics)
Get the pm metrics table with provided device index.
amdsmi_status_t amdsmi_get_utilization_count(amdsmi_processor_handle processor_handle, amdsmi_utilization_counter_t utilization_counters[], uint32_t count, uint64_t *timestamp)
Get coarse grain utilization counter of the specified device.
amdsmi_status_t amdsmi_get_gpu_metrics_header_info(amdsmi_processor_handle processor_handle, amd_metrics_table_header_t *header_value)
Get the 'metrics_header_info' from the GPU metrics associated with the device.
amdsmi_status_t amdsmi_reset_gpu(amdsmi_processor_handle processor_handle)
Reset the gpu associated with the device with provided processor handle. It is not supported on virtu...
amdsmi_status_t amdsmi_set_gpu_od_volt_info(amdsmi_processor_handle processor_handle, uint32_t vpoint, uint64_t clkvalue, uint64_t voltvalue)
This function sets 1 of the 3 voltage curve points. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_clk_range(amdsmi_processor_handle processor_handle, uint64_t minclkvalue, uint64_t maxclkvalue, amdsmi_clk_type_t clkType)
This function sets the clock range information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_gpu_mem_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od)
Get the GPU memory clock overdrive percent associated with the device with provided processor handle....
amdsmi_status_t amdsmi_get_clk_freq(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_frequencies_t *f)
Get the list of possible system clock speeds of device for a specified clock type....
void amdsmi_free_name_value_pairs(void *p)
Frees heap memory allocated by reg_table and pm_metrics.
amdsmi_status_t amdsmi_get_gpu_perf_level(amdsmi_processor_handle processor_handle, amdsmi_dev_perf_level_t *perf)
Get the performance level of the device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_perf_determinism_mode(amdsmi_processor_handle processor_handle, uint64_t clkvalue)
Enter performance determinism mode with provided processor handle. It is not supported on virtual mac...
amdsmi_status_t amdsmi_get_gpu_od_volt_info(amdsmi_processor_handle processor_handle, amdsmi_od_volt_freq_data_t *odv)
This function retrieves the overdrive GFX & MCLK information. If valid for the GPU it will also popul...
amdsmi_status_t amdsmi_get_gpu_od_volt_curve_regions(amdsmi_processor_handle processor_handle, uint32_t *num_regions, amdsmi_freq_volt_region_t *buffer)
This function will retrieve the current valid regions in the frequency/voltage space....
amdsmi_status_t amdsmi_get_gpu_reg_table_info(amdsmi_processor_handle processor_handle, amdsmi_reg_type_t reg_type, amdsmi_name_value_t **reg_metrics, uint32_t *num_of_metrics)
Get the register metrics table with provided device index and register type.
amdsmi_status_t amdsmi_get_gpu_overdrive_level(amdsmi_processor_handle processor_handle, uint32_t *od)
Get the overdrive percent associated with the device with provided processor handle....
amdsmi_status_t amdsmi_set_gpu_od_clk_info(amdsmi_processor_handle processor_handle, amdsmi_freq_ind_t level, uint64_t clkvalue, amdsmi_clk_type_t clkType)
This function sets the clock frequency information. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_gpu_fan_speed(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t speed)
Set the fan speed for the specified device with the provided speed, in RPMs. It is not supported on v...
amdsmi_status_t amdsmi_reset_gpu_fan(amdsmi_processor_handle processor_handle, uint32_t sensor_ind)
Reset the fan to automatic driver control. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_temp_metric(amdsmi_processor_handle processor_handle, amdsmi_temperature_type_t sensor_type, amdsmi_temperature_metric_t metric, int64_t *temperature)
Get the temperature metric value for the specified metric, from the specified temperature sensor on t...
amdsmi_status_t amdsmi_get_gpu_fan_speed(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed)
Get the fan speed for the specified device as a value relative to AMDSMI_MAX_FAN_SPEED....
amdsmi_status_t amdsmi_get_gpu_fan_speed_max(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t *max_speed)
Get the max. fan speed of the device with provided processor handle. It is not supported on virtual m...
amdsmi_status_t amdsmi_get_gpu_cache_info(amdsmi_processor_handle processor_handle, amdsmi_gpu_cache_info_t *info)
Returns gpu cache info.
amdsmi_status_t amdsmi_get_gpu_fan_rpms(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, int64_t *speed)
Get the fan speed in RPMs of the device with the specified processor handle and 0-based sensor index....
amdsmi_status_t amdsmi_get_gpu_volt_metric(amdsmi_processor_handle processor_handle, amdsmi_voltage_type_t sensor_type, amdsmi_voltage_metric_t metric, int64_t *voltage)
Get the voltage metric value for the specified metric, from the specified voltage sensor on the speci...
amdsmi_status_t amdsmi_set_gpu_power_profile(amdsmi_processor_handle processor_handle, uint32_t reserved, amdsmi_power_profile_preset_masks_t profile)
Set the power performance profile. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_set_power_cap(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, uint64_t cap)
Set the maximum gpu power cap value. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_energy_count(amdsmi_processor_handle processor_handle, uint64_t *energy_accumulator, float *counter_resolution, uint64_t *timestamp)
Get the energy accumulator counter of the processor with provided processor handle....
amdsmi_status_t amdsmi_get_gpu_compute_process_info(amdsmi_process_info_t *procs, uint32_t *num_items)
Get process information about processes currently using GPU.
amdsmi_status_t amdsmi_get_gpu_compute_process_info_by_pid(uint32_t pid, amdsmi_process_info_t *proc)
Get process information about a specific process.
amdsmi_status_t amdsmi_get_gpu_compute_process_gpus(uint32_t pid, uint32_t *dv_indices, uint32_t *num_devices)
Get the device indices currently being used by a process.
amdsmi_status_t amdsmi_get_lib_version(amdsmi_version_t *version)
Get the build version information for the currently running build of AMDSMI.
amdsmi_status_t amdsmi_gpu_xgmi_error_status(amdsmi_processor_handle processor_handle, amdsmi_xgmi_status_t *status)
Retrieve the XGMI error status for a device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_reset_gpu_xgmi_error(amdsmi_processor_handle processor_handle)
Reset the XGMI error status for a device. It is not supported on virtual machine guest.
amdsmi_status_t amdsmi_get_power_cap_info(amdsmi_processor_handle processor_handle, uint32_t sensor_ind, amdsmi_power_cap_info_t *info)
Returns the power caps as currently configured in the system. Power in units of uW....
amdsmi_status_t amdsmi_get_pcie_info(amdsmi_processor_handle processor_handle, amdsmi_pcie_info_t *info)
Returns the PCIe info for the GPU.
amdsmi_status_t amdsmi_get_gpu_vram_info(amdsmi_processor_handle processor_handle, amdsmi_vram_info_t *info)
Returns vram info.
amdsmi_status_t amdsmi_get_gpu_kfd_info(amdsmi_processor_handle processor_handle, amdsmi_kfd_info_t *info)
Returns the KFD (Kernel Fusion Driver) information for the device.
amdsmi_status_t amdsmi_get_gpu_board_info(amdsmi_processor_handle processor_handle, amdsmi_board_info_t *info)
Returns the board part number and board information for the requested device.
amdsmi_status_t amdsmi_get_gpu_asic_info(amdsmi_processor_handle processor_handle, amdsmi_asic_info_t *info)
Returns the ASIC information for the device.
amdsmi_status_t amdsmi_get_xgmi_info(amdsmi_processor_handle processor_handle, amdsmi_xgmi_info_t *info)
Returns XGMI information for the GPU.
amdsmi_status_t amdsmi_get_cpu_family(uint32_t *cpu_family)
Get CPU family.
amdsmi_status_t amdsmi_first_online_core_on_cpu_socket(amdsmi_processor_handle processor_handle, uint32_t *pcore_ind)
Get first online core on socket.
amdsmi_status_t amdsmi_get_cpu_model(uint32_t *cpu_model)
Get CPU model.
amdsmi_status_t amdsmi_get_esmi_err_msg(amdsmi_status_t status, const char **status_string)
Get a description of provided AMDSMI error status for esmi errors.
amdsmi_status_t amdsmi_get_cpu_current_io_bandwidth(amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *io_bw)
Get current input output bandwidth.
amdsmi_status_t amdsmi_get_cpu_current_xgmi_bw(amdsmi_processor_handle processor_handle, amdsmi_link_id_bw_type_t link, uint32_t *xgmi_bw)
Get current input output bandwidth.
amdsmi_status_t amdsmi_set_gpu_compute_partition(amdsmi_processor_handle processor_handle, amdsmi_compute_partition_type_t compute_partition)
Modifies a selected device's compute partition setting.
amdsmi_status_t amdsmi_get_gpu_compute_partition(amdsmi_processor_handle processor_handle, char *compute_partition, uint32_t len)
Retrieves the current compute partitioning for a desired device.
amdsmi_status_t amdsmi_get_cpu_ddr_bw(amdsmi_processor_handle processor_handle, amdsmi_ddr_bw_metrics_t *ddr_bw)
Get the DDR bandwidth data.
amdsmi_status_t amdsmi_get_cpu_dimm_power_consumption(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_power_t *dimm_pow)
Get DIMM power consumption.
amdsmi_status_t amdsmi_get_cpu_dimm_temp_range_and_refresh_rate(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_temp_range_refresh_rate_t *rate)
Get DIMM temperature range and refresh rate.
amdsmi_status_t amdsmi_get_cpu_dimm_thermal_sensor(amdsmi_processor_handle processor_handle, uint8_t dimm_addr, amdsmi_dimm_thermal_t *dimm_temp)
Get DIMM thermal sensor value.
amdsmi_status_t amdsmi_get_gpu_total_ecc_count(amdsmi_processor_handle processor_handle, amdsmi_error_count_t *ec)
Returns the total number of ECC errors (correctable, uncorrectable and deferred) in the given GPU....
amdsmi_status_t amdsmi_get_cpu_socket_energy(amdsmi_processor_handle processor_handle, uint64_t *penergy)
Get the socket energy for a given socket.
amdsmi_status_t amdsmi_get_cpu_core_energy(amdsmi_processor_handle processor_handle, uint64_t *penergy)
Get the core energy for a given core.
amdsmi_status_t amdsmi_get_gpu_vbios_info(amdsmi_processor_handle processor_handle, amdsmi_vbios_info_t *info)
Returns the static information for the vBIOS on the device.
amdsmi_status_t amdsmi_get_fw_info(amdsmi_processor_handle processor_handle, amdsmi_fw_info_t *info)
Returns the firmware versions running on the device.
amdsmi_status_t amdsmi_set_cpu_gmi3_link_width_range(amdsmi_processor_handle processor_handle, uint8_t min_link_width, uint8_t max_link_width)
Set gmi3 link width range.
amdsmi_status_t amdsmi_get_power_info(amdsmi_processor_handle processor_handle, amdsmi_power_info_t *info)
Returns the current power and voltage of the GPU. The voltage is in units of mV and the power in unit...
amdsmi_status_t amdsmi_get_gpu_vram_usage(amdsmi_processor_handle processor_handle, amdsmi_vram_usage_t *info)
Returns the VRAM usage (both total and used memory) in MegaBytes.
amdsmi_status_t amdsmi_get_gpu_activity(amdsmi_processor_handle processor_handle, amdsmi_engine_usage_t *info)
Returns the current usage of the GPU engines (GFX, MM and MEM). Each usage is reported as a percentag...
amdsmi_status_t amdsmi_get_clock_info(amdsmi_processor_handle processor_handle, amdsmi_clk_type_t clk_type, amdsmi_clk_info_t *info)
Returns the measurements of the clocks in the GPU for the GFX and multimedia engines and Memory....
amdsmi_status_t amdsmi_get_violation_status(amdsmi_processor_handle processor_handle, amdsmi_violation_status_t *info)
Returns the violations for a processor.
amdsmi_status_t amdsmi_is_gpu_power_management_enabled(amdsmi_processor_handle processor_handle, bool *enabled)
Returns is power management enabled.
amdsmi_status_t amdsmi_get_gpu_memory_partition(amdsmi_processor_handle processor_handle, char *memory_partition, uint32_t len)
Retrieves the current memory partition for a desired device.
amdsmi_status_t amdsmi_set_gpu_memory_partition(amdsmi_processor_handle processor_handle, amdsmi_memory_partition_type_t memory_partition)
Modifies a selected device's current memory partition setting.
amdsmi_status_t amdsmi_set_cpu_core_boostlimit(amdsmi_processor_handle processor_handle, uint32_t boostlimit)
Set the core boostlimit value.
amdsmi_status_t amdsmi_get_cpu_socket_c0_residency(amdsmi_processor_handle processor_handle, uint32_t *pc0_residency)
Get the socket c0 residency.
amdsmi_status_t amdsmi_set_cpu_socket_boostlimit(amdsmi_processor_handle processor_handle, uint32_t boostlimit)
Set the socket boostlimit value.
amdsmi_status_t amdsmi_get_cpu_core_boostlimit(amdsmi_processor_handle processor_handle, uint32_t *pboostlimit)
Get the core boost limit.
amdsmi_status_t amdsmi_get_cpu_socket_power_cap_max(amdsmi_processor_handle processor_handle, uint32_t *pmax)
Get the maximum power cap value for a given socket.
amdsmi_status_t amdsmi_set_cpu_socket_power_cap(amdsmi_processor_handle processor_handle, uint32_t pcap)
Set the power cap value for a given socket.
amdsmi_status_t amdsmi_get_cpu_socket_power(amdsmi_processor_handle processor_handle, uint32_t *ppower)
Get the socket power.
amdsmi_status_t amdsmi_get_cpu_socket_power_cap(amdsmi_processor_handle processor_handle, uint32_t *pcap)
Get the socket power cap.
amdsmi_status_t amdsmi_get_cpu_pwr_svi_telemetry_all_rails(amdsmi_processor_handle processor_handle, uint32_t *power)
Get the SVI based power telemetry for all rails.
amdsmi_status_t amdsmi_set_cpu_pwr_efficiency_mode(amdsmi_processor_handle processor_handle, uint8_t mode)
Set the power efficiency profile policy.
amdsmi_status_t amdsmi_get_gpu_process_list(amdsmi_processor_handle processor_handle, uint32_t *max_processes, amdsmi_proc_info_t *list)
Returns the list of processes running on a given GPU including itself.
amdsmi_status_t amdsmi_cpu_apb_disable(amdsmi_processor_handle processor_handle, uint8_t pstate)
Disable APB.
amdsmi_status_t amdsmi_set_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle, uint8_t nbio_id, uint8_t min, uint8_t max)
Set NBIO lclk dpm level value.
amdsmi_status_t amdsmi_set_cpu_pcie_link_rate(amdsmi_processor_handle processor_handle, uint8_t rate_ctrl, uint8_t *prev_mode)
Set pcie link rate.
amdsmi_status_t amdsmi_get_cpu_socket_lclk_dpm_level(amdsmi_processor_handle processor_handle, uint8_t nbio_id, amdsmi_dpm_level_t *nbio)
Get NBIO LCLK dpm level.
amdsmi_status_t amdsmi_set_cpu_df_pstate_range(amdsmi_processor_handle processor_handle, uint8_t max_pstate, uint8_t min_pstate)
Set df pstate range.
amdsmi_status_t amdsmi_cpu_apb_enable(amdsmi_processor_handle processor_handle)
Enable APB.
amdsmi_status_t amdsmi_get_gpu_driver_info(amdsmi_processor_handle processor_handle, amdsmi_driver_info_t *info)
Returns the driver version information.
amdsmi_status_t amdsmi_get_cpu_fclk_mclk(amdsmi_processor_handle processor_handle, uint32_t *fclk, uint32_t *mclk)
Get Data fabric clock and Memory clock in MHz.
amdsmi_status_t amdsmi_get_cpu_prochot_status(amdsmi_processor_handle processor_handle, uint32_t *prochot)
Get normalized status of the processor's PROCHOT status.
amdsmi_status_t amdsmi_get_cpu_hsmp_proto_ver(amdsmi_processor_handle processor_handle, uint32_t *proto_ver)
Get HSMP protocol Version.
amdsmi_status_t amdsmi_get_cpu_smu_fw_version(amdsmi_processor_handle processor_handle, amdsmi_smu_fw_version_t *amdsmi_smu_fw)
Get SMU Firmware Version.
amdsmi_status_t amdsmi_get_cpu_socket_current_active_freq_limit(amdsmi_processor_handle processor_handle, uint16_t *freq, char **src_type)
Get current active frequency limit of the socket.
amdsmi_status_t amdsmi_get_cpu_core_current_freq_limit(amdsmi_processor_handle processor_handle, uint32_t *freq)
Get socket frequency limit of the core.
amdsmi_status_t amdsmi_get_threads_per_core(uint32_t *threads_per_core)
Get Number of threads Per Core.
amdsmi_status_t amdsmi_get_cpu_socket_freq_range(amdsmi_processor_handle processor_handle, uint16_t *fmax, uint16_t *fmin)
Get socket frequency range.
amdsmi_status_t amdsmi_get_cpu_cclk_limit(amdsmi_processor_handle processor_handle, uint32_t *cclk)
Get core clock in MHz.
amdsmi_status_t amdsmi_get_cpu_socket_temperature(amdsmi_processor_handle processor_handle, uint32_t *ptmon)
Get socket temperature.
amdsmi_status_t amdsmi_set_cpu_xgmi_width(amdsmi_processor_handle processor_handle, uint8_t min, uint8_t max)
Set xgmi width.
The following structures hold the gpu metrics values for a device.
Definition: amdsmi.h:1424
Possible Memory Partition Modes. This union is used to identify various memory partitioning settings.
Definition: amdsmi.h:691
Definition: amdsmi.h:650
Definition: amdsmi.h:738
Definition: amdsmi.h:757
Definition: amdsmi.h:955
uint64_t time_enabled
Definition: amdsmi.h:957
uint64_t time_running
Definition: amdsmi.h:959
uint64_t value
Counter value.
Definition: amdsmi.h:956
DDR bandwidth metrics.
Definition: amdsmi.h:1732
uint32_t max_bw
DDR Maximum theoritical bandwidth in GB/s.
Definition: amdsmi.h:1733
uint32_t utilized_bw
DDR bandwidth utilization in GB/s.
Definition: amdsmi.h:1734
uint32_t utilized_pct
DDR bandwidth utilization in % of theoritical max.
Definition: amdsmi.h:1735
DIMM Power(mW), power update rate(ms) and dimm address.
Definition: amdsmi.h:1749
uint8_t dimm_addr
Dimm address[7:0](8 bit data)
Definition: amdsmi.h:1752
uint16_t update_rate
Time since last update[16:8](9 bit data)
Definition: amdsmi.h:1751
uint16_t power
Dimm power consumption[31:17](15 bits data)
Definition: amdsmi.h:1750
DIMM temperature(°C) and update rate(ms) and dimm address.
Definition: amdsmi.h:1758
uint16_t sensor
Dimm thermal sensor[31:21](11 bit data)
Definition: amdsmi.h:1759
float temp
temperature in degree celcius
Definition: amdsmi.h:1762
uint16_t update_rate
Time since last update[16:8](9 bit data)
Definition: amdsmi.h:1760
uint8_t dimm_addr
Dimm address[7:0](8 bit data)
Definition: amdsmi.h:1761
max and min LCLK DPM level on a given NBIO ID. Valid max and min DPM level values are 0 - 1.
Definition: amdsmi.h:1790
uint8_t min_dpm_level
Min LCLK DPM level[7:0](8 bit data)
Definition: amdsmi.h:1792
uint8_t max_dpm_level
Max LCLK DPM level[15:8](8 bit data)
Definition: amdsmi.h:1791
The dpm policy.
Definition: amdsmi.h:1314
This structure holds information about dpm policies.
Definition: amdsmi.h:1324
uint32_t num_supported
Definition: amdsmi.h:1328
uint32_t current
Definition: amdsmi.h:1333
Definition: amdsmi.h:732
Definition: amdsmi.h:772
This structure holds error counts.
Definition: amdsmi.h:1688
uint64_t uncorrectable_count
Accumulated uncorrectable errors.
Definition: amdsmi.h:1690
uint64_t correctable_count
Accumulated correctable errors.
Definition: amdsmi.h:1689
uint64_t deferred_count
Accumulated deferred errors.
Definition: amdsmi.h:1691
Definition: amdsmi.h:989
amdsmi_processor_handle processor_handle
Handler of device that corresponds to the event.
Definition: amdsmi.h:990
amdsmi_evt_notification_type_t event
Event type.
Definition: amdsmi.h:991
This structure holds 2 amdsmi_range_t's, one for frequency and one for voltage. These 2 ranges indica...
Definition: amdsmi.h:1384
amdsmi_range_t freq_range
The frequency range for this VDDC Curve point.
Definition: amdsmi.h:1385
amdsmi_range_t volt_range
The voltage range for this VDDC Curve point.
Definition: amdsmi.h:1386
This structure holds information about clock frequencies.
Definition: amdsmi.h:1288
uint32_t current
Definition: amdsmi.h:1302
uint32_t num_supported
Definition: amdsmi.h:1297
bool has_deep_sleep
Definition: amdsmi.h:1292
Definition: amdsmi.h:553
Definition: amdsmi.h:642
Definition: amdsmi.h:640
Definition: amdsmi.h:629
Definition: amdsmi.h:627
Definition: amdsmi.h:1449
The following structures hold the gpu statistics for a device.
Definition: amdsmi.h:1438
Definition: amdsmi.h:664
This structure holds the name value pairs.
Definition: amdsmi.h:1659
uint64_t value
Use uint64_t to make it universal.
Definition: amdsmi.h:1661
Definition: amdsmi.h:676
This structure represents a point on the frequency-voltage plane.
Definition: amdsmi.h:1374
uint64_t frequency
Frequency coordinate (in Hz)
Definition: amdsmi.h:1375
uint64_t voltage
Voltage coordinate (in mV)
Definition: amdsmi.h:1376
Definition: amdsmi.h:1392
This structure holds the frequency-voltage values for a device.
Definition: amdsmi.h:1403
amdsmi_range_t curr_mclk_range
Definition: amdsmi.h:1405
amdsmi_range_t mclk_freq_limits
The range possible of MCLK values.
Definition: amdsmi.h:1408
uint32_t num_regions
The number of voltage curve regions.
Definition: amdsmi.h:1414
amdsmi_range_t curr_sclk_range
The current SCLK frequency range.
Definition: amdsmi.h:1404
amdsmi_range_t sclk_freq_limits
The range possible of SCLK values.
Definition: amdsmi.h:1407
amdsmi_od_volt_curve_t curve
The current voltage curve.
Definition: amdsmi.h:1413
IO Link P2P Capability.
Definition: amdsmi.h:803
This structure holds information about the possible PCIe bandwidths. Specifically,...
Definition: amdsmi.h:1347
amdsmi_frequencies_t transfer_rate
Definition: amdsmi.h:1351
Definition: amdsmi.h:584
uint64_t pcie_nak_received_count
total number of NAKs issued on the PCIe link by the receiver
Definition: amdsmi.h:592
uint64_t pcie_replay_count
total number of the replays issued on the PCIe link
Definition: amdsmi.h:588
uint16_t pcie_width
current PCIe width
Definition: amdsmi.h:585
uint32_t pcie_speed
current PCIe speed in MT/s
Definition: amdsmi.h:586
uint32_t pcie_bandwidth
current instantaneous PCIe bandwidth in Mb/s
Definition: amdsmi.h:587
uint64_t pcie_l0_to_recovery_count
total number of times the PCIe link transitioned from L0 to the recovery state
Definition: amdsmi.h:589
uint64_t pcie_nak_sent_count
total number of NAKs issued on the PCIe link by the device
Definition: amdsmi.h:591
uint64_t pcie_replay_roll_over_count
total number of replay rollovers issued on the PCIe link
Definition: amdsmi.h:590
uint32_t pcie_lc_perf_other_end_recovery_count
PCIe other end recovery counter.
Definition: amdsmi.h:593
Definition: amdsmi.h:577
uint16_t max_pcie_width
maximum number of PCIe lanes
Definition: amdsmi.h:578
amdsmi_card_form_factor_t slot_type
card form factor
Definition: amdsmi.h:581
uint32_t max_pcie_speed
maximum PCIe speed
Definition: amdsmi.h:579
uint32_t pcie_interface_version
PCIe interface version.
Definition: amdsmi.h:580
Definition: amdsmi.h:576
Definition: amdsmi.h:599
uint64_t power_cap
current power cap (uW)
Definition: amdsmi.h:600
uint64_t dpm_cap
dpm power cap (MHz)
Definition: amdsmi.h:602
uint64_t max_power_cap
maximum power cap (uW)
Definition: amdsmi.h:604
uint64_t default_power_cap
default power cap (uW)
Definition: amdsmi.h:601
uint64_t min_power_cap
minimum power cap (uW)
Definition: amdsmi.h:603
Definition: amdsmi.h:747
This structure contains information about which power profiles are supported by the system for a give...
Definition: amdsmi.h:1268
amdsmi_bit_field_t available_profiles
Definition: amdsmi.h:1272
amdsmi_power_profile_preset_masks_t current
Definition: amdsmi.h:1277
uint32_t num_profiles
Definition: amdsmi.h:1282
Definition: amdsmi.h:785
Definition: amdsmi.h:790
Definition: amdsmi.h:781
This structure contains information specific to a process.
Definition: amdsmi.h:1698
uint64_t sdma_usage
SDMA usage in microseconds.
Definition: amdsmi.h:1702
uint32_t process_id
Process ID.
Definition: amdsmi.h:1699
uint32_t cu_occupancy
Compute Unit usage in percent.
Definition: amdsmi.h:1703
uint32_t pasid
PASID.
Definition: amdsmi.h:1700
uint64_t vram_usage
VRAM usage.
Definition: amdsmi.h:1701
This structure represents a range (e.g., frequencies or voltages).
Definition: amdsmi.h:510
uint64_t lower_bound
Lower bound of range.
Definition: amdsmi.h:511
uint64_t upper_bound
Upper bound of range.
Definition: amdsmi.h:512
This structure holds ras feature.
Definition: amdsmi.h:1678
uint32_t ecc_correction_schema_flag
ecc_correction_schema mask
Definition: amdsmi.h:1682
Reserved Memory Page Record.
Definition: amdsmi.h:1252
uint64_t page_size
Page size.
Definition: amdsmi.h:1254
amdsmi_memory_page_status_t status
Page "reserved" status.
Definition: amdsmi.h:1255
uint64_t page_address
Start address of page.
Definition: amdsmi.h:1253
This structure holds SMU Firmware version information.
Definition: amdsmi.h:1722
uint8_t debug
SMU fw Debug version number.
Definition: amdsmi.h:1723
uint8_t major
SMU fw Major version number.
Definition: amdsmi.h:1725
uint8_t unused
reserved fields
Definition: amdsmi.h:1726
uint8_t minor
SMU fw Minor version number.
Definition: amdsmi.h:1724
temperature range and refresh rate metrics of a DIMM
Definition: amdsmi.h:1741
uint8_t range
temp range[2:0](3 bit data)
Definition: amdsmi.h:1742
uint8_t ref_rate
DDR refresh rate mode[3](1 bit data)
Definition: amdsmi.h:1743
Definition: amdsmi.h:1707
Definition: amdsmi.h:1241
amdsmi_utilization_counter_type_t type
Utilization counter type.
Definition: amdsmi.h:1242
uint64_t value
Coarse grain activity counter value (average)
Definition: amdsmi.h:1243
Definition: amdsmi.h:608
This structure holds version information.
Definition: amdsmi.h:1363
uint32_t minor
Minor version.
Definition: amdsmi.h:1366
uint32_t major
Major version.
Definition: amdsmi.h:1365
const char * build
Full Build version string.
Definition: amdsmi.h:1368
uint32_t year
Last 2 digits of the Year released.
Definition: amdsmi.h:1364
uint32_t release
Patch, build or stepping version.
Definition: amdsmi.h:1367
This structure hold violation status information.
Definition: amdsmi.h:532
uint8_t active_hbm_thrm
High Bandwidth Memory (HBM) thermal violation; 1 = active 0 = not active; Max uint8 means unsupported...
Definition: amdsmi.h:550
uint8_t active_socket_thrm
Socket thermal violation; 1 = active 0 = not active; Max uint8 means unsupported.
Definition: amdsmi.h:548
uint64_t acc_ppt_pwr
PVIOL; Current accumulated Package Power Tracking (PPT) count; Max uint64 means unsupported.
Definition: amdsmi.h:537
uint64_t acc_hbm_thrm
Current accumulated High Bandwidth Memory (HBM) thermal count; Max uint64 means unsupported.
Definition: amdsmi.h:540
uint64_t per_hbm_thrm
High Bandwidth Memory (HBM) thermal violation % (greater than 0% is a violation); Max uint64 means un...
Definition: amdsmi.h:545
uint64_t per_prochot_thrm
Processor hot violation % (greater than 0% is a violation); Max uint64 means unsupported.
Definition: amdsmi.h:541
uint8_t active_vr_thrm
Voltage regulator violation; 1 = active 0 = not active; Max uint8 means unsupported.
Definition: amdsmi.h:549
uint64_t per_ppt_pwr
PVIOL; Package Power Tracking (PPT) violation % (greater than 0% is a violation); Max uint64 means un...
Definition: amdsmi.h:542
uint64_t acc_vr_thrm
Current accumulated voltage regulator count; Max uint64 means unsupported.
Definition: amdsmi.h:539
uint64_t per_socket_thrm
TVIOL; Socket thermal violation % (greater than 0% is a violation); Max uint64 means unsupported.
Definition: amdsmi.h:543
uint64_t per_vr_thrm
Voltage regulator violation % (greater than 0% is a violation); Max uint64 means unsupported.
Definition: amdsmi.h:544
uint8_t active_prochot_thrm
Processor hot violation; 1 = active 0 = not active; Max uint8 means unsupported.
Definition: amdsmi.h:546
uint64_t acc_counter
Current accumulated counter; Max uint64 means unsupported.
Definition: amdsmi.h:535
uint64_t reference_timestamp
Represents CPU timestamp in microseconds (uS)
Definition: amdsmi.h:533
uint8_t active_ppt_pwr
Package Power Tracking (PPT) violation; 1 = active 0 = not active; Max uint8 means unsupported.
Definition: amdsmi.h:547
uint64_t acc_socket_thrm
TVIOL; Current accumulated Socket thermal count; Max uint64 means unsupported.
Definition: amdsmi.h:538
uint64_t violation_timestamp
Violation time in milliseconds (ms)
Definition: amdsmi.h:534
uint64_t acc_prochot_thrm
Current accumulated processor hot violation count; Max uint64 means unsupported.
Definition: amdsmi.h:536
Definition: amdsmi.h:723
Definition: amdsmi.h:524
Definition: amdsmi.h:516
Definition: amdsmi.h:559
Possible Memory Partition Modes. This union is used to identify various memory partitioning settings.
Definition: amdsmi.h:675